455 lines
10 KiB
C
455 lines
10 KiB
C
/*
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* Driver for NEC VR4100 series Real Time Clock unit.
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*
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* Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/log2.h>
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#include <asm/div64.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
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MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
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MODULE_LICENSE("GPL v2");
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/* RTC 1 registers */
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#define ETIMELREG 0x00
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#define ETIMEMREG 0x02
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#define ETIMEHREG 0x04
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/* RFU */
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#define ECMPLREG 0x08
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#define ECMPMREG 0x0a
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#define ECMPHREG 0x0c
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/* RFU */
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#define RTCL1LREG 0x10
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#define RTCL1HREG 0x12
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#define RTCL1CNTLREG 0x14
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#define RTCL1CNTHREG 0x16
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#define RTCL2LREG 0x18
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#define RTCL2HREG 0x1a
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#define RTCL2CNTLREG 0x1c
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#define RTCL2CNTHREG 0x1e
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/* RTC 2 registers */
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#define TCLKLREG 0x00
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#define TCLKHREG 0x02
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#define TCLKCNTLREG 0x04
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#define TCLKCNTHREG 0x06
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/* RFU */
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#define RTCINTREG 0x1e
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#define TCLOCK_INT 0x08
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#define RTCLONG2_INT 0x04
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#define RTCLONG1_INT 0x02
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#define ELAPSEDTIME_INT 0x01
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#define RTC_FREQUENCY 32768
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#define MAX_PERIODIC_RATE 6553
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static void __iomem *rtc1_base;
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static void __iomem *rtc2_base;
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#define rtc1_read(offset) readw(rtc1_base + (offset))
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#define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
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#define rtc2_read(offset) readw(rtc2_base + (offset))
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#define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
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static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
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static DEFINE_SPINLOCK(rtc_lock);
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static char rtc_name[] = "RTC";
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static unsigned long periodic_count;
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static unsigned int alarm_enabled;
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static int aie_irq;
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static int pie_irq;
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static inline unsigned long read_elapsed_second(void)
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{
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unsigned long first_low, first_mid, first_high;
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unsigned long second_low, second_mid, second_high;
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do {
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first_low = rtc1_read(ETIMELREG);
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first_mid = rtc1_read(ETIMEMREG);
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first_high = rtc1_read(ETIMEHREG);
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second_low = rtc1_read(ETIMELREG);
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second_mid = rtc1_read(ETIMEMREG);
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second_high = rtc1_read(ETIMEHREG);
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} while (first_low != second_low || first_mid != second_mid ||
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first_high != second_high);
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return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
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}
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static inline void write_elapsed_second(unsigned long sec)
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{
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spin_lock_irq(&rtc_lock);
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rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
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rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
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rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
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spin_unlock_irq(&rtc_lock);
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}
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static void vr41xx_rtc_release(struct device *dev)
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{
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spin_lock_irq(&rtc_lock);
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rtc1_write(ECMPLREG, 0);
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rtc1_write(ECMPMREG, 0);
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rtc1_write(ECMPHREG, 0);
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rtc1_write(RTCL1LREG, 0);
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rtc1_write(RTCL1HREG, 0);
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spin_unlock_irq(&rtc_lock);
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disable_irq(aie_irq);
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disable_irq(pie_irq);
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}
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static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
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{
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unsigned long epoch_sec, elapsed_sec;
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epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
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elapsed_sec = read_elapsed_second();
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rtc_time_to_tm(epoch_sec + elapsed_sec, time);
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return 0;
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}
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static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
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{
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unsigned long epoch_sec, current_sec;
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epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
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current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
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time->tm_hour, time->tm_min, time->tm_sec);
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write_elapsed_second(current_sec - epoch_sec);
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return 0;
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}
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static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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{
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unsigned long low, mid, high;
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struct rtc_time *time = &wkalrm->time;
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spin_lock_irq(&rtc_lock);
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low = rtc1_read(ECMPLREG);
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mid = rtc1_read(ECMPMREG);
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high = rtc1_read(ECMPHREG);
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wkalrm->enabled = alarm_enabled;
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spin_unlock_irq(&rtc_lock);
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rtc_time_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
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return 0;
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}
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static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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{
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unsigned long alarm_sec;
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struct rtc_time *time = &wkalrm->time;
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alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
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time->tm_hour, time->tm_min, time->tm_sec);
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spin_lock_irq(&rtc_lock);
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if (alarm_enabled)
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disable_irq(aie_irq);
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rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
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rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
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rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
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if (wkalrm->enabled)
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enable_irq(aie_irq);
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alarm_enabled = wkalrm->enabled;
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spin_unlock_irq(&rtc_lock);
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return 0;
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}
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static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
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{
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unsigned long count;
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if (!is_power_of_2(freq))
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return -EINVAL;
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count = RTC_FREQUENCY;
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do_div(count, freq);
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periodic_count = count;
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spin_lock_irq(&rtc_lock);
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rtc1_write(RTCL1LREG, count);
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rtc1_write(RTCL1HREG, count >> 16);
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spin_unlock_irq(&rtc_lock);
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return 0;
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}
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static int vr41xx_rtc_irq_set_state(struct device *dev, int enabled)
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{
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if (enabled)
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enable_irq(pie_irq);
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else
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disable_irq(pie_irq);
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return 0;
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}
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static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
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{
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switch (cmd) {
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case RTC_AIE_ON:
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spin_lock_irq(&rtc_lock);
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if (!alarm_enabled) {
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enable_irq(aie_irq);
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alarm_enabled = 1;
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}
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spin_unlock_irq(&rtc_lock);
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break;
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case RTC_AIE_OFF:
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spin_lock_irq(&rtc_lock);
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if (alarm_enabled) {
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disable_irq(aie_irq);
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alarm_enabled = 0;
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}
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spin_unlock_irq(&rtc_lock);
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break;
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case RTC_EPOCH_READ:
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return put_user(epoch, (unsigned long __user *)arg);
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case RTC_EPOCH_SET:
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/* Doesn't support before 1900 */
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if (arg < 1900)
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return -EINVAL;
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epoch = arg;
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break;
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default:
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return -ENOIOCTLCMD;
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}
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return 0;
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}
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static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
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{
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struct platform_device *pdev = (struct platform_device *)dev_id;
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struct rtc_device *rtc = platform_get_drvdata(pdev);
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rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
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rtc_update_irq(rtc, 1, RTC_AF);
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return IRQ_HANDLED;
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}
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static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
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{
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struct platform_device *pdev = (struct platform_device *)dev_id;
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struct rtc_device *rtc = platform_get_drvdata(pdev);
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unsigned long count = periodic_count;
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rtc2_write(RTCINTREG, RTCLONG1_INT);
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rtc1_write(RTCL1LREG, count);
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rtc1_write(RTCL1HREG, count >> 16);
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rtc_update_irq(rtc, 1, RTC_PF);
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return IRQ_HANDLED;
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}
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static const struct rtc_class_ops vr41xx_rtc_ops = {
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.release = vr41xx_rtc_release,
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.ioctl = vr41xx_rtc_ioctl,
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.read_time = vr41xx_rtc_read_time,
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.set_time = vr41xx_rtc_set_time,
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.read_alarm = vr41xx_rtc_read_alarm,
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.set_alarm = vr41xx_rtc_set_alarm,
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.irq_set_freq = vr41xx_rtc_irq_set_freq,
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.irq_set_state = vr41xx_rtc_irq_set_state,
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};
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static int __devinit rtc_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct rtc_device *rtc;
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int retval;
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if (pdev->num_resources != 4)
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return -EBUSY;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -EBUSY;
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rtc1_base = ioremap(res->start, res->end - res->start + 1);
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if (!rtc1_base)
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return -EBUSY;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (!res) {
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retval = -EBUSY;
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goto err_rtc1_iounmap;
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}
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rtc2_base = ioremap(res->start, res->end - res->start + 1);
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if (!rtc2_base) {
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retval = -EBUSY;
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goto err_rtc1_iounmap;
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}
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rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE);
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if (IS_ERR(rtc)) {
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retval = PTR_ERR(rtc);
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goto err_iounmap_all;
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}
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rtc->max_user_freq = MAX_PERIODIC_RATE;
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spin_lock_irq(&rtc_lock);
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rtc1_write(ECMPLREG, 0);
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rtc1_write(ECMPMREG, 0);
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rtc1_write(ECMPHREG, 0);
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rtc1_write(RTCL1LREG, 0);
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rtc1_write(RTCL1HREG, 0);
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spin_unlock_irq(&rtc_lock);
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aie_irq = platform_get_irq(pdev, 0);
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if (aie_irq <= 0) {
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retval = -EBUSY;
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goto err_device_unregister;
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}
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retval = request_irq(aie_irq, elapsedtime_interrupt, IRQF_DISABLED,
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"elapsed_time", pdev);
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if (retval < 0)
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goto err_device_unregister;
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pie_irq = platform_get_irq(pdev, 1);
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if (pie_irq <= 0)
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goto err_free_irq;
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retval = request_irq(pie_irq, rtclong1_interrupt, IRQF_DISABLED,
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"rtclong1", pdev);
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if (retval < 0)
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goto err_free_irq;
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platform_set_drvdata(pdev, rtc);
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disable_irq(aie_irq);
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disable_irq(pie_irq);
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printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
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return 0;
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err_free_irq:
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free_irq(aie_irq, pdev);
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err_device_unregister:
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rtc_device_unregister(rtc);
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err_iounmap_all:
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iounmap(rtc2_base);
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rtc2_base = NULL;
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err_rtc1_iounmap:
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iounmap(rtc1_base);
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rtc1_base = NULL;
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return retval;
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}
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static int __devexit rtc_remove(struct platform_device *pdev)
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{
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struct rtc_device *rtc;
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rtc = platform_get_drvdata(pdev);
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if (rtc)
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rtc_device_unregister(rtc);
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platform_set_drvdata(pdev, NULL);
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free_irq(aie_irq, pdev);
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free_irq(pie_irq, pdev);
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if (rtc1_base)
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iounmap(rtc1_base);
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if (rtc2_base)
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iounmap(rtc2_base);
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return 0;
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}
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/* work with hotplug and coldplug */
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MODULE_ALIAS("platform:RTC");
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static struct platform_driver rtc_platform_driver = {
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.probe = rtc_probe,
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.remove = __devexit_p(rtc_remove),
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.driver = {
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.name = rtc_name,
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.owner = THIS_MODULE,
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},
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};
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static int __init vr41xx_rtc_init(void)
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{
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return platform_driver_register(&rtc_platform_driver);
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}
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static void __exit vr41xx_rtc_exit(void)
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{
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platform_driver_unregister(&rtc_platform_driver);
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}
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module_init(vr41xx_rtc_init);
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module_exit(vr41xx_rtc_exit);
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