320 lines
8.6 KiB
C
320 lines
8.6 KiB
C
/*
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* Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
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* Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
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* Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved.
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* Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2004 Voltaire, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/init.h>
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#include <linux/hardirq.h>
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#include <linux/mlx4/cmd.h>
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#include <linux/mlx4/cq.h>
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#include "mlx4.h"
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#include "icm.h"
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struct mlx4_cq_context {
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__be32 flags;
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u16 reserved1[3];
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__be16 page_offset;
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__be32 logsize_usrpage;
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__be16 cq_period;
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__be16 cq_max_count;
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u8 reserved2[3];
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u8 comp_eqn;
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u8 log_page_size;
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u8 reserved3[2];
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u8 mtt_base_addr_h;
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__be32 mtt_base_addr_l;
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__be32 last_notified_index;
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__be32 solicit_producer_index;
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__be32 consumer_index;
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__be32 producer_index;
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u32 reserved4[2];
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__be64 db_rec_addr;
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};
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#define MLX4_CQ_STATUS_OK ( 0 << 28)
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#define MLX4_CQ_STATUS_OVERFLOW ( 9 << 28)
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#define MLX4_CQ_STATUS_WRITE_FAIL (10 << 28)
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#define MLX4_CQ_FLAG_CC ( 1 << 18)
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#define MLX4_CQ_FLAG_OI ( 1 << 17)
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#define MLX4_CQ_STATE_ARMED ( 9 << 8)
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#define MLX4_CQ_STATE_ARMED_SOL ( 6 << 8)
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#define MLX4_EQ_STATE_FIRED (10 << 8)
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void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn)
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{
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struct mlx4_cq *cq;
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cq = radix_tree_lookup(&mlx4_priv(dev)->cq_table.tree,
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cqn & (dev->caps.num_cqs - 1));
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if (!cq) {
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mlx4_warn(dev, "Completion event for bogus CQ %08x\n", cqn);
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return;
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}
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++cq->arm_sn;
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cq->comp(cq);
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}
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void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type)
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{
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struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table;
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struct mlx4_cq *cq;
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spin_lock(&cq_table->lock);
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cq = radix_tree_lookup(&cq_table->tree, cqn & (dev->caps.num_cqs - 1));
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if (cq)
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atomic_inc(&cq->refcount);
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spin_unlock(&cq_table->lock);
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if (!cq) {
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mlx4_warn(dev, "Async event for bogus CQ %08x\n", cqn);
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return;
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}
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cq->event(cq, event_type);
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if (atomic_dec_and_test(&cq->refcount))
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complete(&cq->free);
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}
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static int mlx4_SW2HW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
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int cq_num)
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{
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return mlx4_cmd(dev, mailbox->dma, cq_num, 0, MLX4_CMD_SW2HW_CQ,
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MLX4_CMD_TIME_CLASS_A);
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}
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static int mlx4_MODIFY_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
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int cq_num, u32 opmod)
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{
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return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, MLX4_CMD_MODIFY_CQ,
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MLX4_CMD_TIME_CLASS_A);
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}
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static int mlx4_HW2SW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
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int cq_num)
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{
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return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, cq_num,
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mailbox ? 0 : 1, MLX4_CMD_HW2SW_CQ,
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MLX4_CMD_TIME_CLASS_A);
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}
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int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
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u16 count, u16 period)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_cq_context *cq_context;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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cq_context = mailbox->buf;
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memset(cq_context, 0, sizeof *cq_context);
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cq_context->cq_max_count = cpu_to_be16(count);
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cq_context->cq_period = cpu_to_be16(period);
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err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 1);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_modify);
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int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
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int entries, struct mlx4_mtt *mtt)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_cq_context *cq_context;
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u64 mtt_addr;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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cq_context = mailbox->buf;
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memset(cq_context, 0, sizeof *cq_context);
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cq_context->logsize_usrpage = cpu_to_be32(ilog2(entries) << 24);
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cq_context->log_page_size = mtt->page_shift - 12;
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mtt_addr = mlx4_mtt_addr(dev, mtt);
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cq_context->mtt_base_addr_h = mtt_addr >> 32;
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cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
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err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 0);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_resize);
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int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
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struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq,
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unsigned vector, int collapsed)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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struct mlx4_cq_table *cq_table = &priv->cq_table;
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_cq_context *cq_context;
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u64 mtt_addr;
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int err;
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if (vector >= dev->caps.num_comp_vectors)
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return -EINVAL;
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cq->vector = vector;
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cq->cqn = mlx4_bitmap_alloc(&cq_table->bitmap);
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if (cq->cqn == -1)
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return -ENOMEM;
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err = mlx4_table_get(dev, &cq_table->table, cq->cqn);
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if (err)
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goto err_out;
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err = mlx4_table_get(dev, &cq_table->cmpt_table, cq->cqn);
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if (err)
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goto err_put;
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spin_lock_irq(&cq_table->lock);
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err = radix_tree_insert(&cq_table->tree, cq->cqn, cq);
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spin_unlock_irq(&cq_table->lock);
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if (err)
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goto err_cmpt_put;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox)) {
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err = PTR_ERR(mailbox);
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goto err_radix;
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}
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cq_context = mailbox->buf;
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memset(cq_context, 0, sizeof *cq_context);
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cq_context->flags = cpu_to_be32(!!collapsed << 18);
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cq_context->logsize_usrpage = cpu_to_be32((ilog2(nent) << 24) | uar->index);
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cq_context->comp_eqn = priv->eq_table.eq[vector].eqn;
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cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
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mtt_addr = mlx4_mtt_addr(dev, mtt);
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cq_context->mtt_base_addr_h = mtt_addr >> 32;
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cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
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cq_context->db_rec_addr = cpu_to_be64(db_rec);
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err = mlx4_SW2HW_CQ(dev, mailbox, cq->cqn);
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mlx4_free_cmd_mailbox(dev, mailbox);
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if (err)
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goto err_radix;
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cq->cons_index = 0;
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cq->arm_sn = 1;
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cq->uar = uar;
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atomic_set(&cq->refcount, 1);
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init_completion(&cq->free);
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return 0;
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err_radix:
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spin_lock_irq(&cq_table->lock);
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radix_tree_delete(&cq_table->tree, cq->cqn);
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spin_unlock_irq(&cq_table->lock);
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err_cmpt_put:
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mlx4_table_put(dev, &cq_table->cmpt_table, cq->cqn);
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err_put:
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mlx4_table_put(dev, &cq_table->table, cq->cqn);
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err_out:
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mlx4_bitmap_free(&cq_table->bitmap, cq->cqn);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_alloc);
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void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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struct mlx4_cq_table *cq_table = &priv->cq_table;
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int err;
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err = mlx4_HW2SW_CQ(dev, NULL, cq->cqn);
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if (err)
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mlx4_warn(dev, "HW2SW_CQ failed (%d) for CQN %06x\n", err, cq->cqn);
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synchronize_irq(priv->eq_table.eq[cq->vector].irq);
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spin_lock_irq(&cq_table->lock);
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radix_tree_delete(&cq_table->tree, cq->cqn);
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spin_unlock_irq(&cq_table->lock);
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if (atomic_dec_and_test(&cq->refcount))
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complete(&cq->free);
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wait_for_completion(&cq->free);
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mlx4_table_put(dev, &cq_table->table, cq->cqn);
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mlx4_bitmap_free(&cq_table->bitmap, cq->cqn);
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_free);
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int mlx4_init_cq_table(struct mlx4_dev *dev)
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{
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struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table;
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int err;
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spin_lock_init(&cq_table->lock);
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INIT_RADIX_TREE(&cq_table->tree, GFP_ATOMIC);
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err = mlx4_bitmap_init(&cq_table->bitmap, dev->caps.num_cqs,
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dev->caps.num_cqs - 1, dev->caps.reserved_cqs, 0);
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if (err)
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return err;
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return 0;
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}
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void mlx4_cleanup_cq_table(struct mlx4_dev *dev)
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{
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/* Nothing to do to clean up radix_tree */
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mlx4_bitmap_cleanup(&mlx4_priv(dev)->cq_table.bitmap);
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}
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