297 lines
6.7 KiB
C
297 lines
6.7 KiB
C
/*
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* Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
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*
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* (c) 2002-2003 Saito.K & Jeanne
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*
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* Dustin McIntire (dustin@sensoria.com)
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* Derived from arch/i386/kernel/pci-*.c which bore the message:
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* (c) 1999--2000 Martin Mares <mj@ucw.cz>
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/errno.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <asm/mpc1211/pci.h>
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static struct resource mpcpci_io_resource = {
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"MPCPCI IO",
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0x00000000,
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0xffffffff,
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IORESOURCE_IO
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};
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static struct resource mpcpci_mem_resource = {
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"MPCPCI mem",
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0x00000000,
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0xffffffff,
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IORESOURCE_MEM
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};
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static struct pci_ops pci_direct_conf1;
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struct pci_channel board_pci_channels[] = {
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{&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
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{NULL, NULL, NULL, 0, 0},
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};
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/*
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* Direct access to PCI hardware...
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*/
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#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
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/*
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* Functions for accessing PCI configuration space with type 1 accesses
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*/
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static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
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{
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u32 word;
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unsigned long flags;
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/*
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* PCIPDR may only be accessed as 32 bit words,
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* so we must do byte alignment by hand
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*/
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local_irq_save(flags);
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writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
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word = readl(PCIPDR);
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local_irq_restore(flags);
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switch (size) {
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case 1:
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switch (where & 0x3) {
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case 3:
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*value = (u8)(word >> 24);
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break;
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case 2:
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*value = (u8)(word >> 16);
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break;
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case 1:
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*value = (u8)(word >> 8);
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break;
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default:
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*value = (u8)word;
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break;
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}
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break;
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case 2:
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switch (where & 0x3) {
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case 3:
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*value = (u16)(word >> 24);
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local_irq_save(flags);
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writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
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word = readl(PCIPDR);
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local_irq_restore(flags);
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*value |= ((word & 0xff) << 8);
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break;
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case 2:
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*value = (u16)(word >> 16);
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break;
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case 1:
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*value = (u16)(word >> 8);
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break;
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default:
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*value = (u16)word;
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break;
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}
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break;
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case 4:
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*value = word;
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break;
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}
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PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
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return PCIBIOS_SUCCESSFUL;
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}
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/*
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* Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
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* We'll allow an odd byte offset, though it should be illegal.
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*/
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static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
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{
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u32 word,mask = 0;
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unsigned long flags;
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u32 shift = (where & 3) * 8;
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if(size == 1) {
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mask = ((1 << 8) - 1) << shift; // create the byte mask
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} else if(size == 2){
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if(shift == 24)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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mask = ((1 << 16) - 1) << shift; // create the word mask
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}
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local_irq_save(flags);
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writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
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if(size == 4){
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writel(value, PCIPDR);
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local_irq_restore(flags);
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PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
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return PCIBIOS_SUCCESSFUL;
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}
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word = readl(PCIPDR);
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word &= ~mask;
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word |= ((value << shift) & mask);
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writel(word, PCIPDR);
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local_irq_restore(flags);
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PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
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return PCIBIOS_SUCCESSFUL;
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}
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#undef CONFIG_CMD
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static struct pci_ops pci_direct_conf1 = {
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.read = pci_conf1_read,
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.write = pci_conf1_write,
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};
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static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
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{
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dev->resource[0].start = 0x1f0;
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dev->resource[0].end = 0x1f7;
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dev->resource[0].flags = IORESOURCE_IO;
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dev->resource[1].start = 0x3f6;
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dev->resource[1].end = 0x3f6;
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dev->resource[1].flags = IORESOURCE_IO;
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dev->resource[2].start = 0x170;
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dev->resource[2].end = 0x177;
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dev->resource[2].flags = IORESOURCE_IO;
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dev->resource[3].start = 0x376;
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dev->resource[3].end = 0x376;
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dev->resource[3].flags = IORESOURCE_IO;
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dev->resource[4].start = 0xf000;
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dev->resource[4].end = 0xf00f;
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dev->resource[4].flags = IORESOURCE_IO;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
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char * __devinit pcibios_setup(char *str)
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{
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return str;
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}
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/*
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* Called after each bus is probed, but before its children
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* are examined.
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*/
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void __init pcibios_fixup_bus(struct pci_bus *b)
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{
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pci_read_bridge_bases(b);
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}
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/*
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* IRQ functions
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*/
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static inline u8 bridge_swizzle(u8 pin, u8 slot)
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{
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return (((pin-1) + slot) % 4) + 1;
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}
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static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
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{
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return (((pin-1) - slot) & 3) + 1;
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}
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static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
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{
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unsigned long flags;
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u8 pin = *pinp;
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u32 word;
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for ( ; dev->bus->self; dev = dev->bus->self) {
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if (!pin)
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continue;
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if (dev->bus->number == 1) {
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local_irq_save(flags);
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writel(0x80000000 | 0x2c, PCIPAR);
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word = readl(PCIPDR);
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local_irq_restore(flags);
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word >>= 16;
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if (word == 0x0001)
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pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
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else
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pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
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} else
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pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
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}
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*pinp = pin;
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return PCI_SLOT(dev->devfn);
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}
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static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq = -1;
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/* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
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if (dev->bus->number == 0) {
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switch (slot) {
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case 13: irq = 9; break; /* USB */
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case 22: irq = 10; break; /* LAN */
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default: irq = 0; break;
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}
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} else {
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switch (pin) {
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case 0: irq = 0; break;
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case 1: irq = 7; break;
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case 2: irq = 9; break;
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case 3: irq = 10; break;
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case 4: irq = 11; break;
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}
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}
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if( irq < 0 ) {
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PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
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return irq;
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}
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PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
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return irq;
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}
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void __init pcibios_fixup_irqs(void)
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{
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pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
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}
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void pcibios_align_resource(void *data, struct resource *res,
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unsigned long size, unsigned long align)
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{
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unsigned long start = res->start;
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if (res->flags & IORESOURCE_IO) {
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if (start >= 0x10000UL) {
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if ((start & 0xffffUL) < 0x4000UL) {
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start = (start & 0xffff0000UL) + 0x4000UL;
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} else if ((start & 0xffffUL) >= 0xf000UL) {
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start = (start & 0xffff0000UL) + 0x10000UL;
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}
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res->start = start;
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} else {
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if (start & 0x300) {
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start = (start + 0x3ff) & ~0x3ff;
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res->start = start;
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}
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}
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}
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}
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