1100 lines
26 KiB
C
1100 lines
26 KiB
C
/*
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* x86 SMP booting functions
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*
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* (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
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* (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
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* Copyright 2001 Andi Kleen, SuSE Labs.
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*
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* Much of the core SMP work is based on previous work by Thomas Radke, to
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* whom a great many thanks are extended.
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*
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* Thanks to Intel for making available several different Pentium,
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* Pentium Pro and Pentium-II/Xeon MP machines.
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* Original development of Linux SMP code supported by Caldera.
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*
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* This code is released under the GNU General Public License version 2
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*
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* Fixes
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* Felix Koop : NR_CPUS used properly
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* Jose Renau : Handle single CPU case.
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* Alan Cox : By repeated request 8) - Total BogoMIP report.
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* Greg Wright : Fix for kernel stacks panic.
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* Erich Boleyn : MP v1.4 and additional changes.
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* Matthias Sattler : Changes for 2.1 kernel map.
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* Michel Lespinasse : Changes for 2.1 kernel map.
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* Michael Chastain : Change trampoline.S to gnu as.
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* Alan Cox : Dumb bug: 'B' step PPro's are fine
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* Ingo Molnar : Added APIC timers, based on code
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* from Jose Renau
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* Ingo Molnar : various cleanups and rewrites
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* Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
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* Maciej W. Rozycki : Bits for genuine 82489DX APICs
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* Andi Kleen : Changed for SMP boot into long mode.
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* Rusty Russell : Hacked into shape for new "hotplug" boot process.
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* Andi Kleen : Converted to new state machine.
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* Various cleanups.
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* Probably mostly hotplug CPU ready now.
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* Ashok Raj : CPU hotplug support
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/kernel_stat.h>
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#include <linux/bootmem.h>
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#include <linux/thread_info.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mc146818rtc.h>
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#include <linux/smp.h>
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#include <linux/kdebug.h>
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#include <asm/mtrr.h>
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#include <asm/pgalloc.h>
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#include <asm/desc.h>
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#include <asm/tlbflush.h>
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#include <asm/proto.h>
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#include <asm/nmi.h>
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#include <asm/irq.h>
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#include <asm/hw_irq.h>
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#include <asm/numa.h>
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/* Number of siblings per CPU package */
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int smp_num_siblings = 1;
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EXPORT_SYMBOL(smp_num_siblings);
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/* Last level cache ID of each logical CPU */
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DEFINE_PER_CPU(u8, cpu_llc_id) = BAD_APICID;
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/* Bitmask of currently online CPUs */
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cpumask_t cpu_online_map __read_mostly;
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EXPORT_SYMBOL(cpu_online_map);
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/*
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* Private maps to synchronize booting between AP and BP.
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* Probably not needed anymore, but it makes for easier debugging. -AK
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*/
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cpumask_t cpu_callin_map;
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cpumask_t cpu_callout_map;
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EXPORT_SYMBOL(cpu_callout_map);
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cpumask_t cpu_possible_map;
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EXPORT_SYMBOL(cpu_possible_map);
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/* Per CPU bogomips and other parameters */
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DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
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EXPORT_PER_CPU_SYMBOL(cpu_info);
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/* Set when the idlers are all forked */
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int smp_threads_ready;
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/* representing HT siblings of each logical CPU */
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DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
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EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
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/* representing HT and core siblings of each logical CPU */
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DEFINE_PER_CPU(cpumask_t, cpu_core_map);
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EXPORT_PER_CPU_SYMBOL(cpu_core_map);
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/*
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* Trampoline 80x86 program as an array.
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*/
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extern const unsigned char trampoline_data[];
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extern const unsigned char trampoline_end[];
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/* State of each CPU */
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DEFINE_PER_CPU(int, cpu_state) = { 0 };
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/*
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* Store all idle threads, this can be reused instead of creating
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* a new thread. Also avoids complicated thread destroy functionality
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* for idle threads.
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*/
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struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
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#define get_idle_for_cpu(x) (idle_thread_array[(x)])
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#define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
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/*
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* Currently trivial. Write the real->protected mode
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* bootstrap into the page concerned. The caller
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* has made sure it's suitably aligned.
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*/
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static unsigned long __cpuinit setup_trampoline(void)
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{
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void *tramp = __va(SMP_TRAMPOLINE_BASE);
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memcpy(tramp, trampoline_data, trampoline_end - trampoline_data);
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return virt_to_phys(tramp);
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}
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/*
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* The bootstrap kernel entry code has set these up. Save them for
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* a given CPU
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*/
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static void __cpuinit smp_store_cpu_info(int id)
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{
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struct cpuinfo_x86 *c = &cpu_data(id);
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*c = boot_cpu_data;
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c->cpu_index = id;
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identify_cpu(c);
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print_cpu_info(c);
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}
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static atomic_t init_deasserted __cpuinitdata;
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/*
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* Report back to the Boot Processor.
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* Running on AP.
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*/
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void __cpuinit smp_callin(void)
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{
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int cpuid, phys_id;
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unsigned long timeout;
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/*
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* If waken up by an INIT in an 82489DX configuration
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* we may get here before an INIT-deassert IPI reaches
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* our local APIC. We have to wait for the IPI or we'll
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* lock up on an APIC access.
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*/
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while (!atomic_read(&init_deasserted))
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cpu_relax();
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/*
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* (This works even if the APIC is not enabled.)
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*/
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phys_id = GET_APIC_ID(apic_read(APIC_ID));
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cpuid = smp_processor_id();
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if (cpu_isset(cpuid, cpu_callin_map)) {
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panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
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phys_id, cpuid);
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}
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Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
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/*
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* STARTUP IPIs are fragile beasts as they might sometimes
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* trigger some glue motherboard logic. Complete APIC bus
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* silence for 1 second, this overestimates the time the
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* boot CPU is spending to send the up to 2 STARTUP IPIs
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* by a factor of two. This should be enough.
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*/
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/*
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* Waiting 2s total for startup (udelay is not yet working)
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*/
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timeout = jiffies + 2*HZ;
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while (time_before(jiffies, timeout)) {
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/*
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* Has the boot CPU finished it's STARTUP sequence?
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*/
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if (cpu_isset(cpuid, cpu_callout_map))
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break;
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cpu_relax();
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}
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if (!time_before(jiffies, timeout)) {
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panic("smp_callin: CPU%d started up but did not get a callout!\n",
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cpuid);
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}
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/*
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* the boot CPU has finished the init stage and is spinning
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* on callin_map until we finish. We are free to set up this
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* CPU, first the APIC. (this is probably redundant on most
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* boards)
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*/
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Dprintk("CALLIN, before setup_local_APIC().\n");
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setup_local_APIC();
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/*
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* Get our bogomips.
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*
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* Need to enable IRQs because it can take longer and then
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* the NMI watchdog might kill us.
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*/
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local_irq_enable();
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calibrate_delay();
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local_irq_disable();
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Dprintk("Stack at about %p\n",&cpuid);
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/*
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* Save our processor parameters
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*/
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smp_store_cpu_info(cpuid);
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/*
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* Allow the master to continue.
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*/
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cpu_set(cpuid, cpu_callin_map);
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}
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/* maps the cpu to the sched domain representing multi-core */
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cpumask_t cpu_coregroup_map(int cpu)
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{
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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/*
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* For perf, we return last level cache shared map.
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* And for power savings, we return cpu_core_map
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*/
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if (sched_mc_power_savings || sched_smt_power_savings)
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return per_cpu(cpu_core_map, cpu);
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else
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return c->llc_shared_map;
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}
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/* representing cpus for which sibling maps can be computed */
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static cpumask_t cpu_sibling_setup_map;
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static inline void set_cpu_sibling_map(int cpu)
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{
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int i;
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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cpu_set(cpu, cpu_sibling_setup_map);
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if (smp_num_siblings > 1) {
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for_each_cpu_mask(i, cpu_sibling_setup_map) {
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if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
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c->cpu_core_id == cpu_data(i).cpu_core_id) {
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cpu_set(i, per_cpu(cpu_sibling_map, cpu));
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cpu_set(cpu, per_cpu(cpu_sibling_map, i));
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cpu_set(i, per_cpu(cpu_core_map, cpu));
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cpu_set(cpu, per_cpu(cpu_core_map, i));
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cpu_set(i, c->llc_shared_map);
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cpu_set(cpu, cpu_data(i).llc_shared_map);
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}
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}
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} else {
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cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
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}
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cpu_set(cpu, c->llc_shared_map);
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if (current_cpu_data.x86_max_cores == 1) {
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per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
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c->booted_cores = 1;
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return;
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}
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for_each_cpu_mask(i, cpu_sibling_setup_map) {
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if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
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per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
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cpu_set(i, c->llc_shared_map);
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cpu_set(cpu, cpu_data(i).llc_shared_map);
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}
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if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
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cpu_set(i, per_cpu(cpu_core_map, cpu));
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cpu_set(cpu, per_cpu(cpu_core_map, i));
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/*
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* Does this new cpu bringup a new core?
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*/
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if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
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/*
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* for each core in package, increment
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* the booted_cores for this new cpu
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*/
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if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
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c->booted_cores++;
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/*
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* increment the core count for all
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* the other cpus in this package
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*/
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if (i != cpu)
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cpu_data(i).booted_cores++;
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} else if (i != cpu && !c->booted_cores)
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c->booted_cores = cpu_data(i).booted_cores;
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}
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}
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}
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/*
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* Setup code on secondary processor (after comming out of the trampoline)
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*/
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void __cpuinit start_secondary(void)
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{
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/*
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* Dont put anything before smp_callin(), SMP
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* booting is too fragile that we want to limit the
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* things done here to the most necessary things.
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*/
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cpu_init();
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preempt_disable();
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smp_callin();
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/* otherwise gcc will move up the smp_processor_id before the cpu_init */
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barrier();
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/*
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* Check TSC sync first:
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*/
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check_tsc_sync_target();
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if (nmi_watchdog == NMI_IO_APIC) {
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disable_8259A_irq(0);
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enable_NMI_through_LVT0(NULL);
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enable_8259A_irq(0);
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}
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/*
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* The sibling maps must be set before turing the online map on for
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* this cpu
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*/
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set_cpu_sibling_map(smp_processor_id());
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/*
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* We need to hold call_lock, so there is no inconsistency
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* between the time smp_call_function() determines number of
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* IPI recipients, and the time when the determination is made
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* for which cpus receive the IPI in genapic_flat.c. Holding this
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* lock helps us to not include this cpu in a currently in progress
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* smp_call_function().
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*/
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lock_ipi_call_lock();
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spin_lock(&vector_lock);
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/* Setup the per cpu irq handling data structures */
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__setup_vector_irq(smp_processor_id());
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/*
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* Allow the master to continue.
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*/
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cpu_set(smp_processor_id(), cpu_online_map);
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per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
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spin_unlock(&vector_lock);
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unlock_ipi_call_lock();
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setup_secondary_APIC_clock();
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cpu_idle();
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}
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extern volatile unsigned long init_rsp;
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extern void (*initial_code)(void);
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#ifdef APIC_DEBUG
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static void inquire_remote_apic(int apicid)
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{
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unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
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char *names[] = { "ID", "VERSION", "SPIV" };
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int timeout;
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unsigned int status;
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printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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printk("... APIC #%d %s: ", apicid, names[i]);
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/*
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* Wait for idle.
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*/
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status = safe_apic_wait_icr_idle();
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if (status)
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printk("a previous APIC delivery may have failed\n");
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
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apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
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timeout = 0;
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do {
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udelay(100);
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status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
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} while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
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switch (status) {
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case APIC_ICR_RR_VALID:
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status = apic_read(APIC_RRR);
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printk("%08x\n", status);
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break;
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default:
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printk("failed\n");
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}
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}
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}
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#endif
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/*
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* Kick the secondary to wake up.
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*/
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static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
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{
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unsigned long send_status, accept_status = 0;
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int maxlvt, num_starts, j;
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Dprintk("Asserting INIT.\n");
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/*
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* Turn INIT on target chip
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*/
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/*
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* Send IPI
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*/
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apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
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| APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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mdelay(10);
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Dprintk("Deasserting INIT.\n");
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/* Target chip */
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Send IPI */
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apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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mb();
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atomic_set(&init_deasserted, 1);
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num_starts = 2;
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/*
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* Run STARTUP IPI loop.
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*/
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Dprintk("#startup loops: %d.\n", num_starts);
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maxlvt = get_maxlvt();
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for (j = 1; j <= num_starts; j++) {
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Dprintk("Sending STARTUP #%d.\n",j);
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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Dprintk("After apic_write.\n");
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/*
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* STARTUP IPI
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*/
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/* Target chip */
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Boot on the stack */
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/* Kick the second */
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apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
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/*
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* Give the other CPU some time to accept the IPI.
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*/
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udelay(300);
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Dprintk("Startup point 1.\n");
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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/*
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* Give the other CPU some time to accept the IPI.
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*/
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udelay(200);
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/*
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* Due to the Pentium erratum 3AP.
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*/
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if (maxlvt > 3) {
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apic_write(APIC_ESR, 0);
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}
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accept_status = (apic_read(APIC_ESR) & 0xEF);
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if (send_status || accept_status)
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break;
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}
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Dprintk("After Startup.\n");
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if (send_status)
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printk(KERN_ERR "APIC never delivered???\n");
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if (accept_status)
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printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
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|
|
return (send_status | accept_status);
|
|
}
|
|
|
|
struct create_idle {
|
|
struct work_struct work;
|
|
struct task_struct *idle;
|
|
struct completion done;
|
|
int cpu;
|
|
};
|
|
|
|
static void __cpuinit do_fork_idle(struct work_struct *work)
|
|
{
|
|
struct create_idle *c_idle =
|
|
container_of(work, struct create_idle, work);
|
|
|
|
c_idle->idle = fork_idle(c_idle->cpu);
|
|
complete(&c_idle->done);
|
|
}
|
|
|
|
/*
|
|
* Boot one CPU.
|
|
*/
|
|
static int __cpuinit do_boot_cpu(int cpu, int apicid)
|
|
{
|
|
unsigned long boot_error;
|
|
int timeout;
|
|
unsigned long start_rip;
|
|
struct create_idle c_idle = {
|
|
.work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
|
|
.cpu = cpu,
|
|
.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
|
|
};
|
|
|
|
/* allocate memory for gdts of secondary cpus. Hotplug is considered */
|
|
if (!cpu_gdt_descr[cpu].address &&
|
|
!(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
|
|
printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
|
|
return -1;
|
|
}
|
|
|
|
/* Allocate node local memory for AP pdas */
|
|
if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
|
|
struct x8664_pda *newpda, *pda;
|
|
int node = cpu_to_node(cpu);
|
|
pda = cpu_pda(cpu);
|
|
newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
|
|
node);
|
|
if (newpda) {
|
|
memcpy(newpda, pda, sizeof (struct x8664_pda));
|
|
cpu_pda(cpu) = newpda;
|
|
} else
|
|
printk(KERN_ERR
|
|
"Could not allocate node local PDA for CPU %d on node %d\n",
|
|
cpu, node);
|
|
}
|
|
|
|
alternatives_smp_switch(1);
|
|
|
|
c_idle.idle = get_idle_for_cpu(cpu);
|
|
|
|
if (c_idle.idle) {
|
|
c_idle.idle->thread.rsp = (unsigned long) (((struct pt_regs *)
|
|
(THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
|
|
init_idle(c_idle.idle, cpu);
|
|
goto do_rest;
|
|
}
|
|
|
|
/*
|
|
* During cold boot process, keventd thread is not spun up yet.
|
|
* When we do cpu hot-add, we create idle threads on the fly, we should
|
|
* not acquire any attributes from the calling context. Hence the clean
|
|
* way to create kernel_threads() is to do that from keventd().
|
|
* We do the current_is_keventd() due to the fact that ACPI notifier
|
|
* was also queuing to keventd() and when the caller is already running
|
|
* in context of keventd(), we would end up with locking up the keventd
|
|
* thread.
|
|
*/
|
|
if (!keventd_up() || current_is_keventd())
|
|
c_idle.work.func(&c_idle.work);
|
|
else {
|
|
schedule_work(&c_idle.work);
|
|
wait_for_completion(&c_idle.done);
|
|
}
|
|
|
|
if (IS_ERR(c_idle.idle)) {
|
|
printk("failed fork for CPU %d\n", cpu);
|
|
return PTR_ERR(c_idle.idle);
|
|
}
|
|
|
|
set_idle_for_cpu(cpu, c_idle.idle);
|
|
|
|
do_rest:
|
|
|
|
cpu_pda(cpu)->pcurrent = c_idle.idle;
|
|
|
|
start_rip = setup_trampoline();
|
|
|
|
init_rsp = c_idle.idle->thread.rsp;
|
|
per_cpu(init_tss,cpu).rsp0 = init_rsp;
|
|
initial_code = start_secondary;
|
|
clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
|
|
|
|
printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
|
|
cpus_weight(cpu_present_map),
|
|
apicid);
|
|
|
|
/*
|
|
* This grunge runs the startup process for
|
|
* the targeted processor.
|
|
*/
|
|
|
|
atomic_set(&init_deasserted, 0);
|
|
|
|
Dprintk("Setting warm reset code and vector.\n");
|
|
|
|
CMOS_WRITE(0xa, 0xf);
|
|
local_flush_tlb();
|
|
Dprintk("1.\n");
|
|
*((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
|
|
Dprintk("2.\n");
|
|
*((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
|
|
Dprintk("3.\n");
|
|
|
|
/*
|
|
* Be paranoid about clearing APIC errors.
|
|
*/
|
|
apic_write(APIC_ESR, 0);
|
|
apic_read(APIC_ESR);
|
|
|
|
/*
|
|
* Status is now clean
|
|
*/
|
|
boot_error = 0;
|
|
|
|
/*
|
|
* Starting actual IPI sequence...
|
|
*/
|
|
boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
|
|
|
|
if (!boot_error) {
|
|
/*
|
|
* allow APs to start initializing.
|
|
*/
|
|
Dprintk("Before Callout %d.\n", cpu);
|
|
cpu_set(cpu, cpu_callout_map);
|
|
Dprintk("After Callout %d.\n", cpu);
|
|
|
|
/*
|
|
* Wait 5s total for a response
|
|
*/
|
|
for (timeout = 0; timeout < 50000; timeout++) {
|
|
if (cpu_isset(cpu, cpu_callin_map))
|
|
break; /* It has booted */
|
|
udelay(100);
|
|
}
|
|
|
|
if (cpu_isset(cpu, cpu_callin_map)) {
|
|
/* number CPUs logically, starting from 1 (BSP is 0) */
|
|
Dprintk("CPU has booted.\n");
|
|
} else {
|
|
boot_error = 1;
|
|
if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
|
|
== 0xA5)
|
|
/* trampoline started but...? */
|
|
printk("Stuck ??\n");
|
|
else
|
|
/* trampoline code not run */
|
|
printk("Not responding.\n");
|
|
#ifdef APIC_DEBUG
|
|
inquire_remote_apic(apicid);
|
|
#endif
|
|
}
|
|
}
|
|
if (boot_error) {
|
|
cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
|
|
clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
|
|
clear_node_cpumask(cpu); /* was set by numa_add_cpu */
|
|
cpu_clear(cpu, cpu_present_map);
|
|
cpu_clear(cpu, cpu_possible_map);
|
|
per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
|
|
return -EIO;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
cycles_t cacheflush_time;
|
|
unsigned long cache_decay_ticks;
|
|
|
|
/*
|
|
* Cleanup possible dangling ends...
|
|
*/
|
|
static __cpuinit void smp_cleanup_boot(void)
|
|
{
|
|
/*
|
|
* Paranoid: Set warm reset code and vector here back
|
|
* to default values.
|
|
*/
|
|
CMOS_WRITE(0, 0xf);
|
|
|
|
/*
|
|
* Reset trampoline flag
|
|
*/
|
|
*((volatile int *) phys_to_virt(0x467)) = 0;
|
|
}
|
|
|
|
/*
|
|
* Fall back to non SMP mode after errors.
|
|
*
|
|
* RED-PEN audit/test this more. I bet there is more state messed up here.
|
|
*/
|
|
static __init void disable_smp(void)
|
|
{
|
|
cpu_present_map = cpumask_of_cpu(0);
|
|
cpu_possible_map = cpumask_of_cpu(0);
|
|
if (smp_found_config)
|
|
phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
|
|
else
|
|
phys_cpu_present_map = physid_mask_of_physid(0);
|
|
cpu_set(0, per_cpu(cpu_sibling_map, 0));
|
|
cpu_set(0, per_cpu(cpu_core_map, 0));
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
int additional_cpus __initdata = -1;
|
|
|
|
/*
|
|
* cpu_possible_map should be static, it cannot change as cpu's
|
|
* are onlined, or offlined. The reason is per-cpu data-structures
|
|
* are allocated by some modules at init time, and dont expect to
|
|
* do this dynamically on cpu arrival/departure.
|
|
* cpu_present_map on the other hand can change dynamically.
|
|
* In case when cpu_hotplug is not compiled, then we resort to current
|
|
* behaviour, which is cpu_possible == cpu_present.
|
|
* - Ashok Raj
|
|
*
|
|
* Three ways to find out the number of additional hotplug CPUs:
|
|
* - If the BIOS specified disabled CPUs in ACPI/mptables use that.
|
|
* - The user can overwrite it with additional_cpus=NUM
|
|
* - Otherwise don't reserve additional CPUs.
|
|
* We do this because additional CPUs waste a lot of memory.
|
|
* -AK
|
|
*/
|
|
__init void prefill_possible_map(void)
|
|
{
|
|
int i;
|
|
int possible;
|
|
|
|
if (additional_cpus == -1) {
|
|
if (disabled_cpus > 0)
|
|
additional_cpus = disabled_cpus;
|
|
else
|
|
additional_cpus = 0;
|
|
}
|
|
possible = num_processors + additional_cpus;
|
|
if (possible > NR_CPUS)
|
|
possible = NR_CPUS;
|
|
|
|
printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
|
|
possible,
|
|
max_t(int, possible - num_processors, 0));
|
|
|
|
for (i = 0; i < possible; i++)
|
|
cpu_set(i, cpu_possible_map);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Various sanity checks.
|
|
*/
|
|
static int __init smp_sanity_check(unsigned max_cpus)
|
|
{
|
|
if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
|
|
printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
|
|
hard_smp_processor_id());
|
|
physid_set(hard_smp_processor_id(), phys_cpu_present_map);
|
|
}
|
|
|
|
/*
|
|
* If we couldn't find an SMP configuration at boot time,
|
|
* get out of here now!
|
|
*/
|
|
if (!smp_found_config) {
|
|
printk(KERN_NOTICE "SMP motherboard not detected.\n");
|
|
disable_smp();
|
|
if (APIC_init_uniprocessor())
|
|
printk(KERN_NOTICE "Local APIC not detected."
|
|
" Using dummy APIC emulation.\n");
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* Should not be necessary because the MP table should list the boot
|
|
* CPU too, but we do it for the sake of robustness anyway.
|
|
*/
|
|
if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
|
|
printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
|
|
boot_cpu_id);
|
|
physid_set(hard_smp_processor_id(), phys_cpu_present_map);
|
|
}
|
|
|
|
/*
|
|
* If we couldn't find a local APIC, then get out of here now!
|
|
*/
|
|
if (!cpu_has_apic) {
|
|
printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
|
|
boot_cpu_id);
|
|
printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
|
|
nr_ioapics = 0;
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* If SMP should be disabled, then really disable it!
|
|
*/
|
|
if (!max_cpus) {
|
|
printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
|
|
nr_ioapics = 0;
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Copy apicid's found by MP_processor_info from initial array to the per cpu
|
|
* data area. The x86_cpu_to_apicid_init array is then expendable and the
|
|
* x86_cpu_to_apicid_ptr is zeroed indicating that the static array is no
|
|
* longer available.
|
|
*/
|
|
void __init smp_set_apicids(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_cpu_mask(cpu, cpu_possible_map) {
|
|
if (per_cpu_offset(cpu))
|
|
per_cpu(x86_cpu_to_apicid, cpu) =
|
|
x86_cpu_to_apicid_init[cpu];
|
|
}
|
|
|
|
/* indicate the static array will be going away soon */
|
|
x86_cpu_to_apicid_ptr = NULL;
|
|
}
|
|
|
|
/*
|
|
* Prepare for SMP bootup. The MP table or ACPI has been read
|
|
* earlier. Just do some sanity checking here and enable APIC mode.
|
|
*/
|
|
void __init smp_prepare_cpus(unsigned int max_cpus)
|
|
{
|
|
nmi_watchdog_default();
|
|
current_cpu_data = boot_cpu_data;
|
|
current_thread_info()->cpu = 0; /* needed? */
|
|
smp_set_apicids();
|
|
set_cpu_sibling_map(0);
|
|
|
|
if (smp_sanity_check(max_cpus) < 0) {
|
|
printk(KERN_INFO "SMP disabled\n");
|
|
disable_smp();
|
|
return;
|
|
}
|
|
|
|
|
|
/*
|
|
* Switch from PIC to APIC mode.
|
|
*/
|
|
setup_local_APIC();
|
|
|
|
if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
|
|
panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
|
|
GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
|
|
/* Or can we switch back to PIC here? */
|
|
}
|
|
|
|
/*
|
|
* Now start the IO-APICs
|
|
*/
|
|
if (!skip_ioapic_setup && nr_ioapics)
|
|
setup_IO_APIC();
|
|
else
|
|
nr_ioapics = 0;
|
|
|
|
/*
|
|
* Set up local APIC timer on boot CPU.
|
|
*/
|
|
|
|
setup_boot_APIC_clock();
|
|
}
|
|
|
|
/*
|
|
* Early setup to make printk work.
|
|
*/
|
|
void __init smp_prepare_boot_cpu(void)
|
|
{
|
|
int me = smp_processor_id();
|
|
cpu_set(me, cpu_online_map);
|
|
cpu_set(me, cpu_callout_map);
|
|
per_cpu(cpu_state, me) = CPU_ONLINE;
|
|
}
|
|
|
|
/*
|
|
* Entry point to boot a CPU.
|
|
*/
|
|
int __cpuinit __cpu_up(unsigned int cpu)
|
|
{
|
|
int apicid = cpu_present_to_apicid(cpu);
|
|
unsigned long flags;
|
|
int err;
|
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
|
|
|
|
if (apicid == BAD_APICID || apicid == boot_cpu_id ||
|
|
!physid_isset(apicid, phys_cpu_present_map)) {
|
|
printk("__cpu_up: bad cpu %d\n", cpu);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* Already booted CPU?
|
|
*/
|
|
if (cpu_isset(cpu, cpu_callin_map)) {
|
|
Dprintk("do_boot_cpu %d Already started\n", cpu);
|
|
return -ENOSYS;
|
|
}
|
|
|
|
/*
|
|
* Save current MTRR state in case it was changed since early boot
|
|
* (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
|
|
*/
|
|
mtrr_save_state();
|
|
|
|
per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
|
|
/* Boot it! */
|
|
err = do_boot_cpu(cpu, apicid);
|
|
if (err < 0) {
|
|
Dprintk("do_boot_cpu failed %d\n", err);
|
|
return err;
|
|
}
|
|
|
|
/* Unleash the CPU! */
|
|
Dprintk("waiting for cpu %d\n", cpu);
|
|
|
|
/*
|
|
* Make sure and check TSC sync:
|
|
*/
|
|
local_irq_save(flags);
|
|
check_tsc_sync_source(cpu);
|
|
local_irq_restore(flags);
|
|
|
|
while (!cpu_isset(cpu, cpu_online_map))
|
|
cpu_relax();
|
|
err = 0;
|
|
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* Finish the SMP boot.
|
|
*/
|
|
void __init smp_cpus_done(unsigned int max_cpus)
|
|
{
|
|
smp_cleanup_boot();
|
|
setup_ioapic_dest();
|
|
check_nmi_watchdog();
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
static void remove_siblinginfo(int cpu)
|
|
{
|
|
int sibling;
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu);
|
|
|
|
for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
|
|
cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
|
|
/*
|
|
* last thread sibling in this cpu core going down
|
|
*/
|
|
if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
|
|
cpu_data(sibling).booted_cores--;
|
|
}
|
|
|
|
for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
|
|
cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
|
|
cpus_clear(per_cpu(cpu_sibling_map, cpu));
|
|
cpus_clear(per_cpu(cpu_core_map, cpu));
|
|
c->phys_proc_id = 0;
|
|
c->cpu_core_id = 0;
|
|
cpu_clear(cpu, cpu_sibling_setup_map);
|
|
}
|
|
|
|
void remove_cpu_from_maps(void)
|
|
{
|
|
int cpu = smp_processor_id();
|
|
|
|
cpu_clear(cpu, cpu_callout_map);
|
|
cpu_clear(cpu, cpu_callin_map);
|
|
clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
|
|
clear_node_cpumask(cpu);
|
|
}
|
|
|
|
int __cpu_disable(void)
|
|
{
|
|
int cpu = smp_processor_id();
|
|
|
|
/*
|
|
* Perhaps use cpufreq to drop frequency, but that could go
|
|
* into generic code.
|
|
*
|
|
* We won't take down the boot processor on i386 due to some
|
|
* interrupts only being able to be serviced by the BSP.
|
|
* Especially so if we're not using an IOAPIC -zwane
|
|
*/
|
|
if (cpu == 0)
|
|
return -EBUSY;
|
|
|
|
if (nmi_watchdog == NMI_LOCAL_APIC)
|
|
stop_apic_nmi_watchdog(NULL);
|
|
clear_local_APIC();
|
|
|
|
/*
|
|
* HACK:
|
|
* Allow any queued timer interrupts to get serviced
|
|
* This is only a temporary solution until we cleanup
|
|
* fixup_irqs as we do for IA64.
|
|
*/
|
|
local_irq_enable();
|
|
mdelay(1);
|
|
|
|
local_irq_disable();
|
|
remove_siblinginfo(cpu);
|
|
|
|
spin_lock(&vector_lock);
|
|
/* It's now safe to remove this processor from the online map */
|
|
cpu_clear(cpu, cpu_online_map);
|
|
spin_unlock(&vector_lock);
|
|
remove_cpu_from_maps();
|
|
fixup_irqs(cpu_online_map);
|
|
return 0;
|
|
}
|
|
|
|
void __cpu_die(unsigned int cpu)
|
|
{
|
|
/* We don't do anything here: idle task is faking death itself. */
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < 10; i++) {
|
|
/* They ack this in play_dead by setting CPU_DEAD */
|
|
if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
|
|
printk ("CPU %d is now offline\n", cpu);
|
|
if (1 == num_online_cpus())
|
|
alternatives_smp_switch(0);
|
|
return;
|
|
}
|
|
msleep(100);
|
|
}
|
|
printk(KERN_ERR "CPU %u didn't die...\n", cpu);
|
|
}
|
|
|
|
static __init int setup_additional_cpus(char *s)
|
|
{
|
|
return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
|
|
}
|
|
early_param("additional_cpus", setup_additional_cpus);
|
|
|
|
#else /* ... !CONFIG_HOTPLUG_CPU */
|
|
|
|
int __cpu_disable(void)
|
|
{
|
|
return -ENOSYS;
|
|
}
|
|
|
|
void __cpu_die(unsigned int cpu)
|
|
{
|
|
/* We said "no" in __cpu_disable */
|
|
BUG();
|
|
}
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|