128 lines
3.5 KiB
C
128 lines
3.5 KiB
C
/*
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*
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* Copyright (C) 1999 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/stddef.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/version.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <mach/csp/intcHw_reg.h>
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#include <mach/csp/mm_io.h>
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static void bcmring_mask_irq0(unsigned int irq)
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{
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writel(1 << (irq - IRQ_INTC0_START),
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MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
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}
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static void bcmring_unmask_irq0(unsigned int irq)
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{
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writel(1 << (irq - IRQ_INTC0_START),
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MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
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}
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static void bcmring_mask_irq1(unsigned int irq)
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{
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writel(1 << (irq - IRQ_INTC1_START),
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MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
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}
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static void bcmring_unmask_irq1(unsigned int irq)
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{
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writel(1 << (irq - IRQ_INTC1_START),
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MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
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}
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static void bcmring_mask_irq2(unsigned int irq)
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{
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writel(1 << (irq - IRQ_SINTC_START),
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MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
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}
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static void bcmring_unmask_irq2(unsigned int irq)
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{
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writel(1 << (irq - IRQ_SINTC_START),
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MM_IO_BASE_SINTC + INTCHW_INTENABLE);
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}
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static struct irq_chip bcmring_irq0_chip = {
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.name = "ARM-INTC0",
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.ack = bcmring_mask_irq0,
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.mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
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.unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
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};
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static struct irq_chip bcmring_irq1_chip = {
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.name = "ARM-INTC1",
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.ack = bcmring_mask_irq1,
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.mask = bcmring_mask_irq1,
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.unmask = bcmring_unmask_irq1,
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};
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static struct irq_chip bcmring_irq2_chip = {
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.name = "ARM-SINTC",
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.ack = bcmring_mask_irq2,
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.mask = bcmring_mask_irq2,
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.unmask = bcmring_unmask_irq2,
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};
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static void vic_init(void __iomem *base, struct irq_chip *chip,
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unsigned int irq_start, unsigned int vic_sources)
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{
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unsigned int i;
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for (i = 0; i < 32; i++) {
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unsigned int irq = irq_start + i;
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set_irq_chip(irq, chip);
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set_irq_chip_data(irq, base);
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if (vic_sources & (1 << i)) {
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set_irq_handler(irq, handle_level_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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}
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writel(0, base + INTCHW_INTSELECT);
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writel(0, base + INTCHW_INTENABLE);
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writel(~0, base + INTCHW_INTENCLEAR);
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writel(0, base + INTCHW_IRQSTATUS);
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writel(~0, base + INTCHW_SOFTINTCLEAR);
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}
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void __init bcmring_init_irq(void)
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{
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vic_init((void __iomem *)MM_IO_BASE_INTC0, &bcmring_irq0_chip,
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IRQ_INTC0_START, IRQ_INTC0_VALID_MASK);
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vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
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IRQ_INTC1_START, IRQ_INTC1_VALID_MASK);
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vic_init((void __iomem *)MM_IO_BASE_SINTC, &bcmring_irq2_chip,
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IRQ_SINTC_START, IRQ_SINTC_VALID_MASK);
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/* special cases */
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if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
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set_irq_handler(IRQ_GPIO0, handle_simple_irq);
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}
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if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
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set_irq_handler(IRQ_GPIO1, handle_simple_irq);
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}
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}
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