224 lines
6.2 KiB
C
224 lines
6.2 KiB
C
/*
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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* Copyright © 2006-2008 Intel Corporation
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* Jesse Barnes <jesse.barnes@intel.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/i2c-id.h>
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#include <linux/i2c-algo-bit.h>
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#include "drmP.h"
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#include "drm.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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/* When using bit bashing for I2C, this bit needs to be set to 1 */
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if (!IS_PINEVIEW(dev))
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return;
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if (enable)
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I915_WRITE(DSPCLK_GATE_D,
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I915_READ(DSPCLK_GATE_D) | DPCUNIT_CLOCK_GATE_DISABLE);
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else
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I915_WRITE(DSPCLK_GATE_D,
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I915_READ(DSPCLK_GATE_D) & (~DPCUNIT_CLOCK_GATE_DISABLE));
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}
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/*
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* Intel GPIO access functions
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*/
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#define I2C_RISEFALL_TIME 20
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static int get_clock(void *data)
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{
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struct intel_i2c_chan *chan = data;
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struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
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u32 val;
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val = I915_READ(chan->reg);
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return ((val & GPIO_CLOCK_VAL_IN) != 0);
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}
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static int get_data(void *data)
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{
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struct intel_i2c_chan *chan = data;
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struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
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u32 val;
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val = I915_READ(chan->reg);
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return ((val & GPIO_DATA_VAL_IN) != 0);
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}
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static void set_clock(void *data, int state_high)
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{
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struct intel_i2c_chan *chan = data;
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struct drm_device *dev = chan->drm_dev;
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struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
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u32 reserved = 0, clock_bits;
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/* On most chips, these bits must be preserved in software. */
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if (!IS_I830(dev) && !IS_845G(dev))
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reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
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GPIO_CLOCK_PULLUP_DISABLE);
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if (state_high)
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clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK;
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else
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clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
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GPIO_CLOCK_VAL_MASK;
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I915_WRITE(chan->reg, reserved | clock_bits);
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udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
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}
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static void set_data(void *data, int state_high)
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{
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struct intel_i2c_chan *chan = data;
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struct drm_device *dev = chan->drm_dev;
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struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
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u32 reserved = 0, data_bits;
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/* On most chips, these bits must be preserved in software. */
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if (!IS_I830(dev) && !IS_845G(dev))
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reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
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GPIO_CLOCK_PULLUP_DISABLE);
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if (state_high)
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data_bits = GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK;
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else
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data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
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GPIO_DATA_VAL_MASK;
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I915_WRITE(chan->reg, reserved | data_bits);
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udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
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}
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/* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C
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* engine, but if the BIOS leaves it enabled, then that can break our use
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* of the bit-banging I2C interfaces. This is notably the case with the
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* Mac Mini in EFI mode.
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*/
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void
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intel_i2c_reset_gmbus(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (HAS_PCH_SPLIT(dev)) {
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I915_WRITE(PCH_GMBUS0, 0);
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} else {
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I915_WRITE(GMBUS0, 0);
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}
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}
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/**
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* intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
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* @dev: DRM device
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* @output: driver specific output device
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* @reg: GPIO reg to use
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* @name: name for this bus
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* @slave_addr: slave address (if fixed)
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*
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* Creates and registers a new i2c bus with the Linux i2c layer, for use
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* in output probing and control (e.g. DDC or SDVO control functions).
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*
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* Possible values for @reg include:
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* %GPIOA
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* %GPIOB
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* %GPIOC
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* %GPIOD
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* %GPIOE
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* %GPIOF
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* %GPIOG
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* %GPIOH
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* see PRM for details on how these different busses are used.
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*/
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struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
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const char *name)
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{
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struct intel_i2c_chan *chan;
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chan = kzalloc(sizeof(struct intel_i2c_chan), GFP_KERNEL);
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if (!chan)
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goto out_free;
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chan->drm_dev = dev;
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chan->reg = reg;
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snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name);
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chan->adapter.owner = THIS_MODULE;
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chan->adapter.algo_data = &chan->algo;
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chan->adapter.dev.parent = &dev->pdev->dev;
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chan->algo.setsda = set_data;
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chan->algo.setscl = set_clock;
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chan->algo.getsda = get_data;
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chan->algo.getscl = get_clock;
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chan->algo.udelay = 20;
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chan->algo.timeout = usecs_to_jiffies(2200);
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chan->algo.data = chan;
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i2c_set_adapdata(&chan->adapter, chan);
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if(i2c_bit_add_bus(&chan->adapter))
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goto out_free;
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intel_i2c_reset_gmbus(dev);
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/* JJJ: raise SCL and SDA? */
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intel_i2c_quirk_set(dev, true);
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set_data(chan, 1);
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set_clock(chan, 1);
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intel_i2c_quirk_set(dev, false);
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udelay(20);
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return &chan->adapter;
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out_free:
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kfree(chan);
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return NULL;
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}
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/**
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* intel_i2c_destroy - unregister and free i2c bus resources
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* @output: channel to free
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*
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* Unregister the adapter from the i2c layer, then free the structure.
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*/
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void intel_i2c_destroy(struct i2c_adapter *adapter)
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{
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struct intel_i2c_chan *chan;
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if (!adapter)
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return;
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chan = container_of(adapter,
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struct intel_i2c_chan,
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adapter);
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i2c_del_adapter(&chan->adapter);
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kfree(chan);
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}
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