286 lines
6.4 KiB
C
286 lines
6.4 KiB
C
/*
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* IEEE754 floating point arithmetic
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* double precision: MADDF.f (Fused Multiply Add)
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* MADDF.fmt: FPR[fd] = FPR[fd] + (FPR[fs] x FPR[ft])
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*
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* MIPS floating point support
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* Copyright (C) 2015 Imagination Technologies, Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License.
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*/
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#include "ieee754dp.h"
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enum maddf_flags {
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maddf_negate_product = 1 << 0,
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};
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static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y, enum maddf_flags flags)
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{
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int re;
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int rs;
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u64 rm;
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unsigned lxm;
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unsigned hxm;
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unsigned lym;
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unsigned hym;
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u64 lrm;
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u64 hrm;
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u64 t;
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u64 at;
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int s;
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COMPXDP;
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COMPYDP;
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COMPZDP;
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EXPLODEXDP;
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EXPLODEYDP;
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EXPLODEZDP;
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FLUSHXDP;
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FLUSHYDP;
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FLUSHZDP;
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ieee754_clearcx();
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switch (zc) {
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case IEEE754_CLASS_SNAN:
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754dp_nanxcpt(z);
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case IEEE754_CLASS_DNORM:
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DPDNORMZ;
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/* QNAN and ZERO cases are handled separately below */
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}
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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return ieee754dp_nanxcpt(y);
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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return ieee754dp_nanxcpt(x);
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return y;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return x;
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/*
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* Infinity handling
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*/
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
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if (zc == IEEE754_CLASS_QNAN)
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return z;
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754dp_indef();
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
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if (zc == IEEE754_CLASS_QNAN)
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return z;
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return ieee754dp_inf(xs ^ ys);
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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if (zc == IEEE754_CLASS_INF)
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return ieee754dp_inf(zs);
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/* Multiplication is 0 so just return z */
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return z;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
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DPDNORMX;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
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if (zc == IEEE754_CLASS_QNAN)
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return z;
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else if (zc == IEEE754_CLASS_INF)
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return ieee754dp_inf(zs);
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DPDNORMY;
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break;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
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if (zc == IEEE754_CLASS_QNAN)
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return z;
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else if (zc == IEEE754_CLASS_INF)
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return ieee754dp_inf(zs);
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DPDNORMX;
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break;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
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if (zc == IEEE754_CLASS_QNAN)
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return z;
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else if (zc == IEEE754_CLASS_INF)
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return ieee754dp_inf(zs);
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/* fall through to real computations */
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}
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/* Finally get to do some computation */
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/*
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* Do the multiplication bit first
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*
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* rm = xm * ym, re = xe + ye basically
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*
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* At this point xm and ym should have been normalized.
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*/
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assert(xm & DP_HIDDEN_BIT);
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assert(ym & DP_HIDDEN_BIT);
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re = xe + ye;
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rs = xs ^ ys;
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if (flags & maddf_negate_product)
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rs ^= 1;
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/* shunt to top of word */
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xm <<= 64 - (DP_FBITS + 1);
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ym <<= 64 - (DP_FBITS + 1);
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/*
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* Multiply 64 bits xm, ym to give high 64 bits rm with stickness.
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*/
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/* 32 * 32 => 64 */
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#define DPXMULT(x, y) ((u64)(x) * (u64)y)
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lxm = xm;
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hxm = xm >> 32;
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lym = ym;
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hym = ym >> 32;
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lrm = DPXMULT(lxm, lym);
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hrm = DPXMULT(hxm, hym);
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t = DPXMULT(lxm, hym);
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at = lrm + (t << 32);
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hrm += at < lrm;
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lrm = at;
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hrm = hrm + (t >> 32);
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t = DPXMULT(hxm, lym);
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at = lrm + (t << 32);
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hrm += at < lrm;
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lrm = at;
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hrm = hrm + (t >> 32);
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rm = hrm | (lrm != 0);
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/*
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* Sticky shift down to normal rounding precision.
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*/
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if ((s64) rm < 0) {
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rm = (rm >> (64 - (DP_FBITS + 1 + 3))) |
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((rm << (DP_FBITS + 1 + 3)) != 0);
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re++;
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} else {
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rm = (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) |
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((rm << (DP_FBITS + 1 + 3 + 1)) != 0);
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}
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assert(rm & (DP_HIDDEN_BIT << 3));
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if (zc == IEEE754_CLASS_ZERO)
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return ieee754dp_format(rs, re, rm);
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/* And now the addition */
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assert(zm & DP_HIDDEN_BIT);
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/*
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* Provide guard,round and stick bit space.
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*/
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zm <<= 3;
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if (ze > re) {
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/*
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* Have to shift y fraction right to align.
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*/
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s = ze - re;
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rm = XDPSRS(rm, s);
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re += s;
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} else if (re > ze) {
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/*
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* Have to shift x fraction right to align.
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*/
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s = re - ze;
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zm = XDPSRS(zm, s);
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ze += s;
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}
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assert(ze == re);
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assert(ze <= DP_EMAX);
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if (zs == rs) {
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/*
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* Generate 28 bit result of adding two 27 bit numbers
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* leaving result in xm, xs and xe.
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*/
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zm = zm + rm;
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if (zm >> (DP_FBITS + 1 + 3)) { /* carry out */
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zm = XDPSRS1(zm);
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ze++;
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}
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} else {
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if (zm >= rm) {
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zm = zm - rm;
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} else {
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zm = rm - zm;
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zs = rs;
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}
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if (zm == 0)
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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/*
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* Normalize to rounding precision.
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*/
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while ((zm >> (DP_FBITS + 3)) == 0) {
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zm <<= 1;
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ze--;
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}
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}
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return ieee754dp_format(zs, ze, zm);
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}
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union ieee754dp ieee754dp_maddf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y)
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{
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return _dp_maddf(z, x, y, 0);
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}
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union ieee754dp ieee754dp_msubf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y)
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{
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return _dp_maddf(z, x, y, maddf_negate_product);
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}
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