397 lines
18 KiB
Plaintext
397 lines
18 KiB
Plaintext
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PCI Error Recovery
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------------------
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February 2, 2006
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Current document maintainer:
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Linas Vepstas <linas@austin.ibm.com>
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Many PCI bus controllers are able to detect a variety of hardware
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PCI errors on the bus, such as parity errors on the data and address
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busses, as well as SERR and PERR errors. Some of the more advanced
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chipsets are able to deal with these errors; these include PCI-E chipsets,
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and the PCI-host bridges found on IBM Power4 and Power5-based pSeries
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boxes. A typical action taken is to disconnect the affected device,
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halting all I/O to it. The goal of a disconnection is to avoid system
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corruption; for example, to halt system memory corruption due to DMA's
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to "wild" addresses. Typically, a reconnection mechanism is also
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offered, so that the affected PCI device(s) are reset and put back
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into working condition. The reset phase requires coordination
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between the affected device drivers and the PCI controller chip.
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This document describes a generic API for notifying device drivers
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of a bus disconnection, and then performing error recovery.
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This API is currently implemented in the 2.6.16 and later kernels.
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Reporting and recovery is performed in several steps. First, when
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a PCI hardware error has resulted in a bus disconnect, that event
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is reported as soon as possible to all affected device drivers,
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including multiple instances of a device driver on multi-function
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cards. This allows device drivers to avoid deadlocking in spinloops,
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waiting for some i/o-space register to change, when it never will.
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It also gives the drivers a chance to defer incoming I/O as
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needed.
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Next, recovery is performed in several stages. Most of the complexity
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is forced by the need to handle multi-function devices, that is,
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devices that have multiple device drivers associated with them.
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In the first stage, each driver is allowed to indicate what type
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of reset it desires, the choices being a simple re-enabling of I/O
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or requesting a hard reset (a full electrical #RST of the PCI card).
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If any driver requests a full reset, that is what will be done.
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After a full reset and/or a re-enabling of I/O, all drivers are
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again notified, so that they may then perform any device setup/config
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that may be required. After these have all completed, a final
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"resume normal operations" event is sent out.
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The biggest reason for choosing a kernel-based implementation rather
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than a user-space implementation was the need to deal with bus
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disconnects of PCI devices attached to storage media, and, in particular,
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disconnects from devices holding the root file system. If the root
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file system is disconnected, a user-space mechanism would have to go
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through a large number of contortions to complete recovery. Almost all
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of the current Linux file systems are not tolerant of disconnection
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from/reconnection to their underlying block device. By contrast,
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bus errors are easy to manage in the device driver. Indeed, most
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device drivers already handle very similar recovery procedures;
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for example, the SCSI-generic layer already provides significant
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mechanisms for dealing with SCSI bus errors and SCSI bus resets.
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Detailed Design
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---------------
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Design and implementation details below, based on a chain of
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public email discussions with Ben Herrenschmidt, circa 5 April 2005.
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The error recovery API support is exposed to the driver in the form of
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a structure of function pointers pointed to by a new field in struct
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pci_driver. A driver that fails to provide the structure is "non-aware",
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and the actual recovery steps taken are platform dependent. The
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arch/powerpc implementation will simulate a PCI hotplug remove/add.
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This structure has the form:
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struct pci_error_handlers
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{
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int (*error_detected)(struct pci_dev *dev, enum pci_channel_state);
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int (*mmio_enabled)(struct pci_dev *dev);
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int (*link_reset)(struct pci_dev *dev);
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int (*slot_reset)(struct pci_dev *dev);
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void (*resume)(struct pci_dev *dev);
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};
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The possible channel states are:
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enum pci_channel_state {
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pci_channel_io_normal, /* I/O channel is in normal state */
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pci_channel_io_frozen, /* I/O to channel is blocked */
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pci_channel_io_perm_failure, /* PCI card is dead */
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};
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Possible return values are:
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enum pci_ers_result {
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PCI_ERS_RESULT_NONE, /* no result/none/not supported in device driver */
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PCI_ERS_RESULT_CAN_RECOVER, /* Device driver can recover without slot reset */
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PCI_ERS_RESULT_NEED_RESET, /* Device driver wants slot to be reset. */
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PCI_ERS_RESULT_DISCONNECT, /* Device has completely failed, is unrecoverable */
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PCI_ERS_RESULT_RECOVERED, /* Device driver is fully recovered and operational */
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};
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A driver does not have to implement all of these callbacks; however,
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if it implements any, it must implement error_detected(). If a callback
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is not implemented, the corresponding feature is considered unsupported.
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For example, if mmio_enabled() and resume() aren't there, then it
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is assumed that the driver is not doing any direct recovery and requires
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a reset. If link_reset() is not implemented, the card is assumed as
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not care about link resets. Typically a driver will want to know about
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a slot_reset().
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The actual steps taken by a platform to recover from a PCI error
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event will be platform-dependent, but will follow the general
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sequence described below.
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STEP 0: Error Event
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-------------------
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PCI bus error is detect by the PCI hardware. On powerpc, the slot
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is isolated, in that all I/O is blocked: all reads return 0xffffffff,
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all writes are ignored.
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STEP 1: Notification
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--------------------
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Platform calls the error_detected() callback on every instance of
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every driver affected by the error.
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At this point, the device might not be accessible anymore, depending on
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the platform (the slot will be isolated on powerpc). The driver may
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already have "noticed" the error because of a failing I/O, but this
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is the proper "synchronization point", that is, it gives the driver
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a chance to cleanup, waiting for pending stuff (timers, whatever, etc...)
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to complete; it can take semaphores, schedule, etc... everything but
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touch the device. Within this function and after it returns, the driver
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shouldn't do any new IOs. Called in task context. This is sort of a
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"quiesce" point. See note about interrupts at the end of this doc.
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All drivers participating in this system must implement this call.
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The driver must return one of the following result codes:
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- PCI_ERS_RESULT_CAN_RECOVER:
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Driver returns this if it thinks it might be able to recover
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the HW by just banging IOs or if it wants to be given
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a chance to extract some diagnostic information (see
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mmio_enable, below).
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- PCI_ERS_RESULT_NEED_RESET:
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Driver returns this if it can't recover without a hard
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slot reset.
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- PCI_ERS_RESULT_DISCONNECT:
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Driver returns this if it doesn't want to recover at all.
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The next step taken will depend on the result codes returned by the
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drivers.
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If all drivers on the segment/slot return PCI_ERS_RESULT_CAN_RECOVER,
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then the platform should re-enable IOs on the slot (or do nothing in
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particular, if the platform doesn't isolate slots), and recovery
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proceeds to STEP 2 (MMIO Enable).
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If any driver requested a slot reset (by returning PCI_ERS_RESULT_NEED_RESET),
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then recovery proceeds to STEP 4 (Slot Reset).
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If the platform is unable to recover the slot, the next step
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is STEP 6 (Permanent Failure).
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>>> The current powerpc implementation assumes that a device driver will
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>>> *not* schedule or semaphore in this routine; the current powerpc
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>>> implementation uses one kernel thread to notify all devices;
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>>> thus, if one device sleeps/schedules, all devices are affected.
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>>> Doing better requires complex multi-threaded logic in the error
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>>> recovery implementation (e.g. waiting for all notification threads
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>>> to "join" before proceeding with recovery.) This seems excessively
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>>> complex and not worth implementing.
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>>> The current powerpc implementation doesn't much care if the device
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>>> attempts I/O at this point, or not. I/O's will fail, returning
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>>> a value of 0xff on read, and writes will be dropped. If the device
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>>> driver attempts more than 10K I/O's to a frozen adapter, it will
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>>> assume that the device driver has gone into an infinite loop, and
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>>> it will panic the the kernel. There doesn't seem to be any other
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>>> way of stopping a device driver that insists on spinning on I/O.
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STEP 2: MMIO Enabled
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-------------------
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The platform re-enables MMIO to the device (but typically not the
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DMA), and then calls the mmio_enabled() callback on all affected
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device drivers.
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This is the "early recovery" call. IOs are allowed again, but DMA is
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not (hrm... to be discussed, I prefer not), with some restrictions. This
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is NOT a callback for the driver to start operations again, only to
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peek/poke at the device, extract diagnostic information, if any, and
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eventually do things like trigger a device local reset or some such,
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but not restart operations. This is callback is made if all drivers on
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a segment agree that they can try to recover and if no automatic link reset
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was performed by the HW. If the platform can't just re-enable IOs without
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a slot reset or a link reset, it wont call this callback, and instead
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will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset)
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>>> The following is proposed; no platform implements this yet:
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>>> Proposal: All I/O's should be done _synchronously_ from within
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>>> this callback, errors triggered by them will be returned via
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>>> the normal pci_check_whatever() API, no new error_detected()
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>>> callback will be issued due to an error happening here. However,
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>>> such an error might cause IOs to be re-blocked for the whole
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>>> segment, and thus invalidate the recovery that other devices
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>>> on the same segment might have done, forcing the whole segment
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>>> into one of the next states, that is, link reset or slot reset.
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The driver should return one of the following result codes:
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- PCI_ERS_RESULT_RECOVERED
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Driver returns this if it thinks the device is fully
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functional and thinks it is ready to start
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normal driver operations again. There is no
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guarantee that the driver will actually be
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allowed to proceed, as another driver on the
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same segment might have failed and thus triggered a
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slot reset on platforms that support it.
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- PCI_ERS_RESULT_NEED_RESET
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Driver returns this if it thinks the device is not
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recoverable in it's current state and it needs a slot
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reset to proceed.
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- PCI_ERS_RESULT_DISCONNECT
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Same as above. Total failure, no recovery even after
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reset driver dead. (To be defined more precisely)
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The next step taken depends on the results returned by the drivers.
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If all drivers returned PCI_ERS_RESULT_RECOVERED, then the platform
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proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations).
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If any driver returned PCI_ERS_RESULT_NEED_RESET, then the platform
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proceeds to STEP 4 (Slot Reset)
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>>> The current powerpc implementation does not implement this callback.
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STEP 3: Link Reset
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------------------
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The platform resets the link, and then calls the link_reset() callback
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on all affected device drivers. This is a PCI-Express specific state
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and is done whenever a non-fatal error has been detected that can be
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"solved" by resetting the link. This call informs the driver of the
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reset and the driver should check to see if the device appears to be
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in working condition.
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The driver is not supposed to restart normal driver I/O operations
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at this point. It should limit itself to "probing" the device to
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check it's recoverability status. If all is right, then the platform
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will call resume() once all drivers have ack'd link_reset().
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Result codes:
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(identical to STEP 3 (MMIO Enabled)
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The platform then proceeds to either STEP 4 (Slot Reset) or STEP 5
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(Resume Operations).
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>>> The current powerpc implementation does not implement this callback.
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STEP 4: Slot Reset
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------------------
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The platform performs a soft or hard reset of the device, and then
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calls the slot_reset() callback.
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A soft reset consists of asserting the adapter #RST line and then
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restoring the PCI BAR's and PCI configuration header to a state
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that is equivalent to what it would be after a fresh system
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power-on followed by power-on BIOS/system firmware initialization.
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If the platform supports PCI hotplug, then the reset might be
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performed by toggling the slot electrical power off/on.
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It is important for the platform to restore the PCI config space
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to the "fresh poweron" state, rather than the "last state". After
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a slot reset, the device driver will almost always use its standard
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device initialization routines, and an unusual config space setup
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may result in hung devices, kernel panics, or silent data corruption.
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This call gives drivers the chance to re-initialize the hardware
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(re-download firmware, etc.). At this point, the driver may assume
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that he card is in a fresh state and is fully functional. In
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particular, interrupt generation should work normally.
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Drivers should not yet restart normal I/O processing operations
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at this point. If all device drivers report success on this
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callback, the platform will call resume() to complete the sequence,
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and let the driver restart normal I/O processing.
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A driver can still return a critical failure for this function if
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it can't get the device operational after reset. If the platform
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previously tried a soft reset, it might now try a hard reset (power
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cycle) and then call slot_reset() again. It the device still can't
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be recovered, there is nothing more that can be done; the platform
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will typically report a "permanent failure" in such a case. The
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device will be considered "dead" in this case.
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Drivers for multi-function cards will need to coordinate among
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themselves as to which driver instance will perform any "one-shot"
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or global device initialization. For example, the Symbios sym53cxx2
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driver performs device init only from PCI function 0:
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+ if (PCI_FUNC(pdev->devfn) == 0)
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+ sym_reset_scsi_bus(np, 0);
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Result codes:
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- PCI_ERS_RESULT_DISCONNECT
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Same as above.
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Platform proceeds either to STEP 5 (Resume Operations) or STEP 6 (Permanent
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Failure).
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>>> The current powerpc implementation does not currently try a
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>>> power-cycle reset if the driver returned PCI_ERS_RESULT_DISCONNECT.
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>>> However, it probably should.
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STEP 5: Resume Operations
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-------------------------
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The platform will call the resume() callback on all affected device
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drivers if all drivers on the segment have returned
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PCI_ERS_RESULT_RECOVERED from one of the 3 previous callbacks.
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The goal of this callback is to tell the driver to restart activity,
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that everything is back and running. This callback does not return
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a result code.
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At this point, if a new error happens, the platform will restart
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a new error recovery sequence.
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STEP 6: Permanent Failure
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-------------------------
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A "permanent failure" has occurred, and the platform cannot recover
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the device. The platform will call error_detected() with a
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pci_channel_state value of pci_channel_io_perm_failure.
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The device driver should, at this point, assume the worst. It should
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cancel all pending I/O, refuse all new I/O, returning -EIO to
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higher layers. The device driver should then clean up all of its
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memory and remove itself from kernel operations, much as it would
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during system shutdown.
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The platform will typically notify the system operator of the
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permanent failure in some way. If the device is hotplug-capable,
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the operator will probably want to remove and replace the device.
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Note, however, not all failures are truly "permanent". Some are
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caused by over-heating, some by a poorly seated card. Many
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PCI error events are caused by software bugs, e.g. DMA's to
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wild addresses or bogus split transactions due to programming
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errors. See the discussion in powerpc/eeh-pci-error-recovery.txt
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for additional detail on real-life experience of the causes of
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software errors.
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Conclusion; General Remarks
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---------------------------
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The way those callbacks are called is platform policy. A platform with
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no slot reset capability may want to just "ignore" drivers that can't
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recover (disconnect them) and try to let other cards on the same segment
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recover. Keep in mind that in most real life cases, though, there will
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be only one driver per segment.
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Now, a note about interrupts. If you get an interrupt and your
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device is dead or has been isolated, there is a problem :)
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The current policy is to turn this into a platform policy.
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That is, the recovery API only requires that:
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- There is no guarantee that interrupt delivery can proceed from any
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device on the segment starting from the error detection and until the
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resume callback is sent, at which point interrupts are expected to be
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fully operational.
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- There is no guarantee that interrupt delivery is stopped, that is,
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a driver that gets an interrupt after detecting an error, or that detects
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an error within the interrupt handler such that it prevents proper
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ack'ing of the interrupt (and thus removal of the source) should just
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return IRQ_NOTHANDLED. It's up to the platform to deal with that
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condition, typically by masking the IRQ source during the duration of
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the error handling. It is expected that the platform "knows" which
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interrupts are routed to error-management capable slots and can deal
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with temporarily disabling that IRQ number during error processing (this
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isn't terribly complex). That means some IRQ latency for other devices
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sharing the interrupt, but there is simply no other way. High end
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platforms aren't supposed to share interrupts between many devices
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anyway :)
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>>> Implementation details for the powerpc platform are discussed in
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>>> the file Documentation/powerpc/eeh-pci-error-recovery.txt
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>>> As of this writing, there are six device drivers with patches
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>>> implementing error recovery. Not all of these patches are in
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>>> mainline yet. These may be used as "examples":
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>>>
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>>> drivers/scsi/ipr.c
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>>> drivers/scsi/sym53cxx_2
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>>> drivers/next/e100.c
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>>> drivers/net/e1000
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>>> drivers/net/ixgb
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>>> drivers/net/s2io.c
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The End
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-------
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