248 lines
6.0 KiB
C
248 lines
6.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2012 Red Hat
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*
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* Authors: Matthew Garrett
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* Dave Airlie
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*/
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#ifndef __CIRRUS_DRV_H__
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#define __CIRRUS_DRV_H__
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#include <video/vga.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/ttm/ttm_bo_api.h>
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#include <drm/ttm/ttm_bo_driver.h>
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#include <drm/ttm/ttm_placement.h>
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#include <drm/ttm/ttm_memory.h>
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#include <drm/ttm/ttm_module.h>
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#include <drm/drm_gem.h>
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#define DRIVER_AUTHOR "Matthew Garrett"
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#define DRIVER_NAME "cirrus"
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#define DRIVER_DESC "qemu Cirrus emulation"
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#define DRIVER_DATE "20110418"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 0
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#define CIRRUSFB_CONN_LIMIT 1
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#define RREG8(reg) ioread8(((void __iomem *)cdev->rmmio) + (reg))
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#define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev->rmmio) + (reg))
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#define RREG32(reg) ioread32(((void __iomem *)cdev->rmmio) + (reg))
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#define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev->rmmio) + (reg))
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#define SEQ_INDEX 4
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#define SEQ_DATA 5
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#define WREG_SEQ(reg, v) \
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do { \
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WREG8(SEQ_INDEX, reg); \
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WREG8(SEQ_DATA, v); \
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} while (0) \
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#define CRT_INDEX 0x14
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#define CRT_DATA 0x15
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#define WREG_CRT(reg, v) \
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do { \
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WREG8(CRT_INDEX, reg); \
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WREG8(CRT_DATA, v); \
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} while (0) \
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#define GFX_INDEX 0xe
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#define GFX_DATA 0xf
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#define WREG_GFX(reg, v) \
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do { \
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WREG8(GFX_INDEX, reg); \
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WREG8(GFX_DATA, v); \
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} while (0) \
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/*
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* Cirrus has a "hidden" DAC register that can be accessed by writing to
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* the pixel mask register to reset the state, then reading from the register
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* four times. The next write will then pass to the DAC
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*/
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#define VGA_DAC_MASK 0x6
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#define WREG_HDR(v) \
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do { \
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RREG8(VGA_DAC_MASK); \
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RREG8(VGA_DAC_MASK); \
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RREG8(VGA_DAC_MASK); \
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RREG8(VGA_DAC_MASK); \
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WREG8(VGA_DAC_MASK, v); \
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} while (0) \
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#define CIRRUS_MAX_FB_HEIGHT 4096
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#define CIRRUS_MAX_FB_WIDTH 4096
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#define CIRRUS_DPMS_CLEARED (-1)
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#define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base)
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#define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base)
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struct cirrus_crtc {
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struct drm_crtc base;
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int last_dpms;
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bool enabled;
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};
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struct cirrus_fbdev;
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struct cirrus_mode_info {
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struct cirrus_crtc *crtc;
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/* pointer to fbdev info structure */
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struct cirrus_fbdev *gfbdev;
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};
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struct cirrus_encoder {
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struct drm_encoder base;
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int last_dpms;
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};
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struct cirrus_connector {
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struct drm_connector base;
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};
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struct cirrus_mc {
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resource_size_t vram_size;
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resource_size_t vram_base;
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};
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struct cirrus_device {
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struct drm_device *dev;
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unsigned long flags;
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resource_size_t rmmio_base;
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resource_size_t rmmio_size;
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void __iomem *rmmio;
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struct cirrus_mc mc;
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struct cirrus_mode_info mode_info;
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int num_crtc;
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int fb_mtrr;
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struct {
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struct ttm_bo_device bdev;
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} ttm;
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bool mm_inited;
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};
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struct cirrus_fbdev {
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struct drm_fb_helper helper; /* must be first */
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struct drm_framebuffer *gfb;
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void *sysram;
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int size;
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int x1, y1, x2, y2; /* dirty rect */
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spinlock_t dirty_lock;
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};
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struct cirrus_bo {
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struct ttm_buffer_object bo;
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struct ttm_placement placement;
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struct ttm_bo_kmap_obj kmap;
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struct drm_gem_object gem;
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struct ttm_place placements[3];
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int pin_count;
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};
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#define gem_to_cirrus_bo(gobj) container_of((gobj), struct cirrus_bo, gem)
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static inline struct cirrus_bo *
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cirrus_bo(struct ttm_buffer_object *bo)
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{
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return container_of(bo, struct cirrus_bo, bo);
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}
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#define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
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/* cirrus_main.c */
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int cirrus_device_init(struct cirrus_device *cdev,
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struct drm_device *ddev,
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struct pci_dev *pdev,
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uint32_t flags);
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void cirrus_device_fini(struct cirrus_device *cdev);
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void cirrus_gem_free_object(struct drm_gem_object *obj);
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int cirrus_dumb_mmap_offset(struct drm_file *file,
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struct drm_device *dev,
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uint32_t handle,
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uint64_t *offset);
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int cirrus_gem_create(struct drm_device *dev,
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u32 size, bool iskernel,
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struct drm_gem_object **obj);
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int cirrus_dumb_create(struct drm_file *file,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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int cirrus_framebuffer_init(struct drm_device *dev,
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struct drm_framebuffer *gfb,
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const struct drm_mode_fb_cmd2 *mode_cmd,
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struct drm_gem_object *obj);
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bool cirrus_check_framebuffer(struct cirrus_device *cdev, int width, int height,
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int bpp, int pitch);
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/* cirrus_display.c */
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int cirrus_modeset_init(struct cirrus_device *cdev);
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void cirrus_modeset_fini(struct cirrus_device *cdev);
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/* cirrus_fbdev.c */
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int cirrus_fbdev_init(struct cirrus_device *cdev);
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void cirrus_fbdev_fini(struct cirrus_device *cdev);
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/* cirrus_irq.c */
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void cirrus_driver_irq_preinstall(struct drm_device *dev);
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int cirrus_driver_irq_postinstall(struct drm_device *dev);
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void cirrus_driver_irq_uninstall(struct drm_device *dev);
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irqreturn_t cirrus_driver_irq_handler(int irq, void *arg);
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/* cirrus_kms.c */
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int cirrus_driver_load(struct drm_device *dev, unsigned long flags);
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void cirrus_driver_unload(struct drm_device *dev);
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extern struct drm_ioctl_desc cirrus_ioctls[];
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extern int cirrus_max_ioctl;
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int cirrus_mm_init(struct cirrus_device *cirrus);
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void cirrus_mm_fini(struct cirrus_device *cirrus);
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void cirrus_ttm_placement(struct cirrus_bo *bo, int domain);
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int cirrus_bo_create(struct drm_device *dev, int size, int align,
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uint32_t flags, struct cirrus_bo **pcirrusbo);
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int cirrus_mmap(struct file *filp, struct vm_area_struct *vma);
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static inline int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait)
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{
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int ret;
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ret = ttm_bo_reserve(&bo->bo, true, no_wait, NULL);
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if (ret) {
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if (ret != -ERESTARTSYS && ret != -EBUSY)
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DRM_ERROR("reserve failed %p\n", bo);
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return ret;
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}
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return 0;
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}
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static inline void cirrus_bo_unreserve(struct cirrus_bo *bo)
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{
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ttm_bo_unreserve(&bo->bo);
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}
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int cirrus_bo_push_sysram(struct cirrus_bo *bo);
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int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);
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extern int cirrus_bpp;
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#endif /* __CIRRUS_DRV_H__ */
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