.. |
vdso
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RISC-V: Make __NR_riscv_flush_icache visible to userspace
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2018-01-07 15:14:37 -08:00 |
.gitignore
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RISC-V: Build Infrastructure
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2017-09-26 15:26:49 -07:00 |
Makefile
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RISC-V: Build Infrastructure
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2017-09-26 15:26:49 -07:00 |
asm-offsets.c
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RISC-V: Task implementation
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2017-09-26 15:26:46 -07:00 |
cacheinfo.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
cpu.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
cpufeature.c
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RISC-V: User-facing API
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2017-09-26 15:26:48 -07:00 |
entry.S
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riscv: rename SR_* constants to match the spec
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2018-01-07 15:14:39 -08:00 |
head.S
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RISC-V: move empty_zero_page definition to C and export it
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2017-11-30 10:01:10 -08:00 |
irq.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
module.c
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RISC-V: User-facing API
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2017-09-26 15:26:48 -07:00 |
process.c
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riscv: rename SR_* constants to match the spec
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2018-01-07 15:14:39 -08:00 |
ptrace.c
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RISC-V: User-facing API
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2017-09-26 15:26:48 -07:00 |
reset.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
riscv_ksyms.c
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RISC-V: Export some expected symbols for modules
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2017-11-30 10:01:10 -08:00 |
setup.c
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RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code
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2017-12-11 07:51:09 -08:00 |
signal.c
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RISC-V: User-facing API
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2017-09-26 15:26:48 -07:00 |
smp.c
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RISC-V: Fixes for clean allmodconfig build
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2017-12-01 13:31:31 -08:00 |
smpboot.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
stacktrace.c
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RISC-V: Generic library routines and assembly
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2017-09-26 15:26:45 -07:00 |
sys_riscv.c
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RISC-V: Logical vs Bitwise typo
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2017-12-11 07:51:06 -08:00 |
syscall_table.c
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RISC-V: Make __NR_riscv_flush_icache visible to userspace
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2018-01-07 15:14:37 -08:00 |
time.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
traps.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
vdso.c
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RISC-V: Init and Halt Code
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2017-09-26 15:26:44 -07:00 |
vmlinux.lds.S
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RISC-V: Build Infrastructure
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2017-09-26 15:26:49 -07:00 |