503 lines
13 KiB
C
503 lines
13 KiB
C
/*
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* mtip32xx.h - Header file for the P320 SSD Block Driver
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* Copyright (C) 2011 Micron Technology, Inc.
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*
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* Portions of this code were derived from works subjected to the
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* following copyright:
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* Copyright (C) 2009 Integrated Device Technology, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MTIP32XX_H__
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#define __MTIP32XX_H__
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#include <linux/spinlock.h>
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#include <linux/rwsem.h>
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#include <linux/ata.h>
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#include <linux/interrupt.h>
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#include <linux/genhd.h>
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/* Offset of Subsystem Device ID in pci confoguration space */
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#define PCI_SUBSYSTEM_DEVICEID 0x2E
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/* offset of Device Control register in PCIe extended capabilites space */
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#define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
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/* check for erase mode support during secure erase */
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#define MTIP_SEC_ERASE_MODE 0x2
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/* # of times to retry timed out/failed IOs */
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#define MTIP_MAX_RETRIES 2
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/* Various timeout values in ms */
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#define MTIP_NCQ_CMD_TIMEOUT_MS 15000
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#define MTIP_IOCTL_CMD_TIMEOUT_MS 5000
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#define MTIP_INT_CMD_TIMEOUT_MS 5000
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#define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \
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(MTIP_MAX_RETRIES + 1))
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/* check for timeouts every 500ms */
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#define MTIP_TIMEOUT_CHECK_PERIOD 500
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/* ftl rebuild */
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#define MTIP_FTL_REBUILD_OFFSET 142
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#define MTIP_FTL_REBUILD_MAGIC 0xED51
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#define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
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/* unaligned IO handling */
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#define MTIP_MAX_UNALIGNED_SLOTS 2
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/* Macro to extract the tag bit number from a tag value. */
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#define MTIP_TAG_BIT(tag) (tag & 0x1F)
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/*
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* Macro to extract the tag index from a tag value. The index
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* is used to access the correct s_active/Command Issue register based
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* on the tag value.
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*/
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#define MTIP_TAG_INDEX(tag) (tag >> 5)
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/*
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* Maximum number of scatter gather entries
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* a single command may have.
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*/
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#define MTIP_MAX_SG 504
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/*
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* Maximum number of slot groups (Command Issue & s_active registers)
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* NOTE: This is the driver maximum; check dd->slot_groups for actual value.
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*/
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#define MTIP_MAX_SLOT_GROUPS 8
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/* Internal command tag. */
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#define MTIP_TAG_INTERNAL 0
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/* Micron Vendor ID & P320x SSD Device ID */
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#define PCI_VENDOR_ID_MICRON 0x1344
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#define P320H_DEVICE_ID 0x5150
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#define P320M_DEVICE_ID 0x5151
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#define P320S_DEVICE_ID 0x5152
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#define P325M_DEVICE_ID 0x5153
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#define P420H_DEVICE_ID 0x5160
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#define P420M_DEVICE_ID 0x5161
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#define P425M_DEVICE_ID 0x5163
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/* Driver name and version strings */
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#define MTIP_DRV_NAME "mtip32xx"
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#define MTIP_DRV_VERSION "1.3.1"
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/* Maximum number of minor device numbers per device. */
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#define MTIP_MAX_MINORS 16
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/* Maximum number of supported command slots. */
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#define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
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/*
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* Per-tag bitfield size in longs.
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* Linux bit manipulation functions
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* (i.e. test_and_set_bit, find_next_zero_bit)
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* manipulate memory in longs, so we try to make the math work.
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* take the slot groups and find the number of longs, rounding up.
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* Careful! i386 and x86_64 use different size longs!
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*/
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#define U32_PER_LONG (sizeof(long) / sizeof(u32))
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#define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
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(U32_PER_LONG-1))/U32_PER_LONG)
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/* BAR number used to access the HBA registers. */
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#define MTIP_ABAR 5
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#ifdef DEBUG
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#define dbg_printk(format, arg...) \
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printk(pr_fmt(format), ##arg);
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#else
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#define dbg_printk(format, arg...)
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#endif
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#define MTIP_DFS_MAX_BUF_SIZE 1024
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enum {
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/* below are bit numbers in 'flags' defined in mtip_port */
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MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
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MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
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MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
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MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
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MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */
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MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
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(1 << MTIP_PF_EH_ACTIVE_BIT) |
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(1 << MTIP_PF_SE_ACTIVE_BIT) |
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(1 << MTIP_PF_DM_ACTIVE_BIT) |
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(1 << MTIP_PF_TO_ACTIVE_BIT)),
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MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */
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MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
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MTIP_PF_ISSUE_CMDS_BIT = 5,
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MTIP_PF_REBUILD_BIT = 6,
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MTIP_PF_SVC_THD_STOP_BIT = 8,
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MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
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(1 << MTIP_PF_ISSUE_CMDS_BIT) |
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(1 << MTIP_PF_REBUILD_BIT) |
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(1 << MTIP_PF_SVC_THD_STOP_BIT) |
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(1 << MTIP_PF_TO_ACTIVE_BIT)),
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/* below are bit numbers in 'dd_flag' defined in driver_data */
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MTIP_DDF_SEC_LOCK_BIT = 0,
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MTIP_DDF_REMOVE_PENDING_BIT = 1,
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MTIP_DDF_OVER_TEMP_BIT = 2,
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MTIP_DDF_WRITE_PROTECT_BIT = 3,
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MTIP_DDF_CLEANUP_BIT = 5,
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MTIP_DDF_RESUME_BIT = 6,
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MTIP_DDF_INIT_DONE_BIT = 7,
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MTIP_DDF_REBUILD_FAILED_BIT = 8,
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MTIP_DDF_REMOVAL_BIT = 9,
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MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
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(1 << MTIP_DDF_SEC_LOCK_BIT) |
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(1 << MTIP_DDF_OVER_TEMP_BIT) |
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(1 << MTIP_DDF_WRITE_PROTECT_BIT) |
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(1 << MTIP_DDF_REBUILD_FAILED_BIT)),
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};
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struct smart_attr {
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u8 attr_id;
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__le16 flags;
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u8 cur;
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u8 worst;
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__le32 data;
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u8 res[3];
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} __packed;
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struct mtip_work {
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struct work_struct work;
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void *port;
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int cpu_binding;
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u32 completed;
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} ____cacheline_aligned_in_smp;
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#define DEFINE_HANDLER(group) \
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void mtip_workq_sdbf##group(struct work_struct *work) \
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{ \
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struct mtip_work *w = (struct mtip_work *) work; \
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mtip_workq_sdbfx(w->port, group, w->completed); \
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}
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#define MTIP_TRIM_TIMEOUT_MS 240000
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#define MTIP_MAX_TRIM_ENTRIES 8
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#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
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struct mtip_trim_entry {
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__le32 lba; /* starting lba of region */
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__le16 rsvd; /* unused */
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__le16 range; /* # of 512b blocks to trim */
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} __packed;
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struct mtip_trim {
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/* Array of regions to trim */
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struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
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} __packed;
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/* Register Frame Information Structure (FIS), host to device. */
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struct host_to_dev_fis {
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/*
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* FIS type.
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* - 27h Register FIS, host to device.
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* - 34h Register FIS, device to host.
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* - 39h DMA Activate FIS, device to host.
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* - 41h DMA Setup FIS, bi-directional.
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* - 46h Data FIS, bi-directional.
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* - 58h BIST Activate FIS, bi-directional.
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* - 5Fh PIO Setup FIS, device to host.
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* - A1h Set Device Bits FIS, device to host.
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*/
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unsigned char type;
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unsigned char opts;
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unsigned char command;
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unsigned char features;
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union {
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unsigned char lba_low;
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unsigned char sector;
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};
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union {
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unsigned char lba_mid;
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unsigned char cyl_low;
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};
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union {
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unsigned char lba_hi;
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unsigned char cyl_hi;
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};
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union {
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unsigned char device;
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unsigned char head;
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};
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union {
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unsigned char lba_low_ex;
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unsigned char sector_ex;
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};
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union {
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unsigned char lba_mid_ex;
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unsigned char cyl_low_ex;
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};
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union {
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unsigned char lba_hi_ex;
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unsigned char cyl_hi_ex;
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};
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unsigned char features_ex;
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unsigned char sect_count;
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unsigned char sect_cnt_ex;
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unsigned char res2;
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unsigned char control;
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unsigned int res3;
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};
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/* Command header structure. */
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struct mtip_cmd_hdr {
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/*
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* Command options.
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* - Bits 31:16 Number of PRD entries.
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* - Bits 15:8 Unused in this implementation.
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* - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
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* - Bit 6 Write bit, should be set when writing data to the device.
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* - Bit 5 Unused in this implementation.
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* - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
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*/
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__le32 opts;
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/* This field is unsed when using NCQ. */
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union {
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__le32 byte_count;
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__le32 status;
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};
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/*
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* Lower 32 bits of the command table address associated with this
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* header. The command table addresses must be 128 byte aligned.
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*/
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__le32 ctba;
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/*
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* If 64 bit addressing is used this field is the upper 32 bits
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* of the command table address associated with this command.
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*/
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__le32 ctbau;
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/* Reserved and unused. */
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u32 res[4];
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};
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/* Command scatter gather structure (PRD). */
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struct mtip_cmd_sg {
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/*
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* Low 32 bits of the data buffer address. For P320 this
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* address must be 8 byte aligned signified by bits 2:0 being
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* set to 0.
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*/
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__le32 dba;
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/*
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* When 64 bit addressing is used this field is the upper
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* 32 bits of the data buffer address.
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*/
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__le32 dba_upper;
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/* Unused. */
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__le32 reserved;
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/*
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* Bit 31: interrupt when this data block has been transferred.
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* Bits 30..22: reserved
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* Bits 21..0: byte count (minus 1). For P320 the byte count must be
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* 8 byte aligned signified by bits 2:0 being set to 1.
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*/
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__le32 info;
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};
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struct mtip_port;
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struct mtip_int_cmd;
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/* Structure used to describe a command. */
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struct mtip_cmd {
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void *command; /* ptr to command table entry */
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dma_addr_t command_dma; /* corresponding physical address */
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int scatter_ents; /* Number of scatter list entries used */
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int unaligned; /* command is unaligned on 4k boundary */
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union {
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struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
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struct mtip_int_cmd *icmd;
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};
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int retries; /* The number of retries left for this command. */
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int direction; /* Data transfer direction */
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blk_status_t status;
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};
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/* Structure used to describe a port. */
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struct mtip_port {
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/* Pointer back to the driver data for this port. */
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struct driver_data *dd;
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/*
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* Used to determine if the data pointed to by the
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* identify field is valid.
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*/
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unsigned long identify_valid;
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/* Base address of the memory mapped IO for the port. */
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void __iomem *mmio;
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/* Array of pointers to the memory mapped s_active registers. */
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void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
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/* Array of pointers to the memory mapped completed registers. */
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void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
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/* Array of pointers to the memory mapped Command Issue registers. */
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void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
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/*
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* Pointer to the beginning of the command header memory as used
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* by the driver.
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*/
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void *command_list;
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/*
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* Pointer to the beginning of the command header memory as used
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* by the DMA.
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*/
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dma_addr_t command_list_dma;
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/*
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* Pointer to the beginning of the RX FIS memory as used
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* by the driver.
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*/
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void *rxfis;
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/*
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* Pointer to the beginning of the RX FIS memory as used
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* by the DMA.
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*/
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dma_addr_t rxfis_dma;
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/*
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* Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
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*/
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void *block1;
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/*
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* DMA address of region for RX Fis, Identify, RLE10, and SMART
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*/
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dma_addr_t block1_dma;
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/*
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* Pointer to the beginning of the identify data memory as used
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* by the driver.
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*/
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u16 *identify;
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/*
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* Pointer to the beginning of the identify data memory as used
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* by the DMA.
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*/
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dma_addr_t identify_dma;
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/*
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* Pointer to the beginning of a sector buffer that is used
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* by the driver when issuing internal commands.
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*/
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u16 *sector_buffer;
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/*
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* Pointer to the beginning of a sector buffer that is used
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* by the DMA when the driver issues internal commands.
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*/
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dma_addr_t sector_buffer_dma;
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u16 *log_buf;
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dma_addr_t log_buf_dma;
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u8 *smart_buf;
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dma_addr_t smart_buf_dma;
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/*
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* used to queue commands when an internal command is in progress
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* or error handling is active
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*/
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unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
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/* Used by mtip_service_thread to wait for an event */
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wait_queue_head_t svc_wait;
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/*
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* indicates the state of the port. Also, helps the service thread
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* to determine its action on wake up.
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*/
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unsigned long flags;
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/*
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* Timer used to complete commands that have been active for too long.
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*/
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unsigned long ic_pause_timer;
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/* Counter to control queue depth of unaligned IOs */
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atomic_t cmd_slot_unal;
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/* Spinlock for working around command-issue bug. */
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spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
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};
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/*
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* Driver private data structure.
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*
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* One structure is allocated per probed device.
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*/
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struct driver_data {
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void __iomem *mmio; /* Base address of the HBA registers. */
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int major; /* Major device number. */
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int instance; /* Instance number. First device probed is 0, ... */
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struct gendisk *disk; /* Pointer to our gendisk structure. */
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struct pci_dev *pdev; /* Pointer to the PCI device structure. */
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struct request_queue *queue; /* Our request queue. */
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struct blk_mq_tag_set tags; /* blk_mq tags */
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struct mtip_port *port; /* Pointer to the port data structure. */
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unsigned product_type; /* magic value declaring the product type */
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unsigned slot_groups; /* number of slot groups the product supports */
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unsigned long index; /* Index to determine the disk name */
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unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
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struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
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struct dentry *dfs_node;
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bool trim_supp; /* flag indicating trim support */
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bool sr;
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int numa_node; /* NUMA support */
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char workq_name[32];
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struct workqueue_struct *isr_workq;
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atomic_t irq_workers_active;
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struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
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int isr_binding;
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struct block_device *bdev;
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struct list_head online_list; /* linkage for online list */
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struct list_head remove_list; /* linkage for removing list */
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int unal_qdepth; /* qdepth of unaligned IO queue */
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};
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#endif
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