392 lines
10 KiB
C
392 lines
10 KiB
C
/*
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* s3c24xx/s3c64xx SoC series Camera Interface (CAMIF) driver
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*
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* Copyright (C) 2012 Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
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* Copyright (C) 2012 Tomasz Figa <tomasz.figa@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef CAMIF_CORE_H_
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#define CAMIF_CORE_H_
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/videodev2.h>
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#include <media/media-entity.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-dev.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-mediabus.h>
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#include <media/videobuf2-v4l2.h>
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#include <media/drv-intf/s3c_camif.h>
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#define S3C_CAMIF_DRIVER_NAME "s3c-camif"
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#define CAMIF_REQ_BUFS_MIN 3
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#define CAMIF_MAX_OUT_BUFS 4
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#define CAMIF_MAX_PIX_WIDTH 4096
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#define CAMIF_MAX_PIX_HEIGHT 4096
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#define SCALER_MAX_RATIO 64
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#define CAMIF_DEF_WIDTH 640
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#define CAMIF_DEF_HEIGHT 480
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#define CAMIF_STOP_TIMEOUT 1500 /* ms */
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#define S3C244X_CAMIF_IP_REV 0x20 /* 2.0 */
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#define S3C2450_CAMIF_IP_REV 0x30 /* 3.0 - not implemented, not tested */
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#define S3C6400_CAMIF_IP_REV 0x31 /* 3.1 - not implemented, not tested */
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#define S3C6410_CAMIF_IP_REV 0x32 /* 3.2 */
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/* struct camif_vp::state */
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#define ST_VP_PENDING (1 << 0)
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#define ST_VP_RUNNING (1 << 1)
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#define ST_VP_STREAMING (1 << 2)
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#define ST_VP_SENSOR_STREAMING (1 << 3)
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#define ST_VP_ABORTING (1 << 4)
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#define ST_VP_OFF (1 << 5)
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#define ST_VP_LASTIRQ (1 << 6)
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#define ST_VP_CONFIG (1 << 8)
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#define CAMIF_SD_PAD_SINK 0
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#define CAMIF_SD_PAD_SOURCE_C 1
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#define CAMIF_SD_PAD_SOURCE_P 2
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#define CAMIF_SD_PADS_NUM 3
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enum img_fmt {
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IMG_FMT_RGB565 = 0x0010,
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IMG_FMT_RGB666,
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IMG_FMT_XRGB8888,
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IMG_FMT_YCBCR420 = 0x0020,
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IMG_FMT_YCRCB420,
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IMG_FMT_YCBCR422P,
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IMG_FMT_YCBYCR422 = 0x0040,
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IMG_FMT_YCRYCB422,
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IMG_FMT_CBYCRY422,
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IMG_FMT_CRYCBY422,
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};
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#define img_fmt_is_rgb(x) ((x) & 0x10)
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#define img_fmt_is_ycbcr(x) ((x) & 0x60)
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/* Possible values for struct camif_fmt::flags */
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#define FMT_FL_S3C24XX_CODEC (1 << 0)
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#define FMT_FL_S3C24XX_PREVIEW (1 << 1)
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#define FMT_FL_S3C64XX (1 << 2)
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/**
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* struct camif_fmt - pixel format description
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* @fourcc: fourcc code for this format, 0 if not applicable
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* @color: a corresponding enum img_fmt
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* @colplanes: number of physically contiguous data planes
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* @flags: indicate for which SoCs revisions this format is valid
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* @depth: bits per pixel (total)
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* @ybpp: number of luminance bytes per pixel
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*/
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struct camif_fmt {
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char *name;
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u32 fourcc;
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u32 color;
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u16 colplanes;
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u16 flags;
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u8 depth;
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u8 ybpp;
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};
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/**
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* struct camif_dma_offset - pixel offset information for DMA
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* @initial: offset (in pixels) to first pixel
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* @line: offset (in pixels) from end of line to start of next line
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*/
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struct camif_dma_offset {
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int initial;
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int line;
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};
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/**
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* struct camif_frame - source/target frame properties
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* @f_width: full pixel width
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* @f_height: full pixel height
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* @rect: crop/composition rectangle
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* @dma_offset: DMA offset configuration
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*/
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struct camif_frame {
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u16 f_width;
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u16 f_height;
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struct v4l2_rect rect;
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struct camif_dma_offset dma_offset;
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};
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/* CAMIF clocks enumeration */
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enum {
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CLK_GATE,
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CLK_CAM,
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CLK_MAX_NUM,
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};
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struct vp_pix_limits {
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u16 max_out_width;
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u16 max_sc_out_width;
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u16 out_width_align;
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u16 max_height;
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u8 min_out_width;
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u16 out_hor_offset_align;
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};
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struct camif_pix_limits {
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u16 win_hor_offset_align;
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};
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/**
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* struct s3c_camif_variant - CAMIF variant structure
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* @vp_pix_limits: pixel limits for the codec and preview paths
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* @camif_pix_limits: pixel limits for the camera input interface
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* @ip_revision: the CAMIF IP revision: 0x20 for s3c244x, 0x32 for s3c6410
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*/
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struct s3c_camif_variant {
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struct vp_pix_limits vp_pix_limits[2];
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struct camif_pix_limits pix_limits;
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u8 ip_revision;
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u8 has_img_effect;
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unsigned int vp_offset;
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};
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struct s3c_camif_drvdata {
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const struct s3c_camif_variant *variant;
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unsigned long bus_clk_freq;
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};
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struct camif_scaler {
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u8 scaleup_h;
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u8 scaleup_v;
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u8 copy;
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u8 enable;
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u32 h_shift;
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u32 v_shift;
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u32 pre_h_ratio;
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u32 pre_v_ratio;
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u32 pre_dst_width;
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u32 pre_dst_height;
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u32 main_h_ratio;
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u32 main_v_ratio;
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};
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struct camif_dev;
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/**
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* struct camif_vp - CAMIF data processing path structure (codec/preview)
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* @irq_queue: interrupt handling waitqueue
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* @irq: interrupt number for this data path
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* @camif: pointer to the camif structure
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* @pad: media pad for the video node
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* @vdev video device
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* @ctrl_handler: video node controls handler
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* @owner: file handle that own the streaming
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* @pending_buf_q: pending (empty) buffers queue head
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* @active_buf_q: active (being written) buffers queue head
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* @active_buffers: counter of buffer set up at the DMA engine
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* @buf_index: identifier of a last empty buffer set up in H/W
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* @frame_sequence: image frame sequence counter
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* @reqbufs_count: the number of buffers requested
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* @scaler: the scaler structure
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* @out_fmt: pixel format at this video path output
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* @payload: the output data frame payload size
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* @out_frame: the output pixel resolution
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* @state: the video path's state
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* @fmt_flags: flags determining supported pixel formats
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* @id: CAMIF id, 0 - codec, 1 - preview
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* @rotation: current image rotation value
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* @hflip: apply horizontal flip if set
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* @vflip: apply vertical flip if set
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*/
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struct camif_vp {
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wait_queue_head_t irq_queue;
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int irq;
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struct camif_dev *camif;
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struct media_pad pad;
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struct video_device vdev;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_fh *owner;
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struct vb2_queue vb_queue;
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struct list_head pending_buf_q;
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struct list_head active_buf_q;
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unsigned int active_buffers;
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unsigned int buf_index;
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unsigned int frame_sequence;
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unsigned int reqbufs_count;
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struct camif_scaler scaler;
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const struct camif_fmt *out_fmt;
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unsigned int payload;
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struct camif_frame out_frame;
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unsigned int state;
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u16 fmt_flags;
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u8 id;
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u16 rotation;
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u8 hflip;
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u8 vflip;
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unsigned int offset;
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};
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/* Video processing path enumeration */
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#define VP_CODEC 0
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#define VP_PREVIEW 1
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#define CAMIF_VP_NUM 2
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/**
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* struct camif_dev - the CAMIF driver private data structure
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* @media_dev: top-level media device structure
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* @v4l2_dev: root v4l2_device
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* @subdev: camera interface ("catchcam") subdev
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* @mbus_fmt: camera input media bus format
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* @camif_crop: camera input interface crop rectangle
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* @pads: the camif subdev's media pads
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* @stream_count: the camera interface streaming reference counter
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* @sensor: image sensor data structure
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* @m_pipeline: video entity pipeline description
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* @ctrl_handler: v4l2 control handler (owned by @subdev)
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* @test_pattern: test pattern controls
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* @vp: video path (DMA) description (codec/preview)
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* @variant: variant information for this device
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* @dev: pointer to the CAMIF device struct
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* @pdata: a copy of the driver's platform data
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* @clock: clocks required for the CAMIF operation
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* @lock: mutex protecting this data structure
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* @slock: spinlock protecting CAMIF registers
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* @io_base: start address of the mmaped CAMIF registers
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*/
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struct camif_dev {
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struct media_device media_dev;
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struct v4l2_device v4l2_dev;
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struct v4l2_subdev subdev;
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struct v4l2_mbus_framefmt mbus_fmt;
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struct v4l2_rect camif_crop;
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struct media_pad pads[CAMIF_SD_PADS_NUM];
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int stream_count;
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struct cam_sensor {
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struct v4l2_subdev *sd;
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short power_count;
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short stream_count;
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} sensor;
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struct media_pipeline *m_pipeline;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *ctrl_test_pattern;
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struct {
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struct v4l2_ctrl *ctrl_colorfx;
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struct v4l2_ctrl *ctrl_colorfx_cbcr;
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};
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u8 test_pattern;
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u8 colorfx;
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u8 colorfx_cb;
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u8 colorfx_cr;
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struct camif_vp vp[CAMIF_VP_NUM];
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const struct s3c_camif_variant *variant;
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struct device *dev;
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struct s3c_camif_plat_data pdata;
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struct clk *clock[CLK_MAX_NUM];
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struct mutex lock;
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spinlock_t slock;
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void __iomem *io_base;
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};
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/**
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* struct camif_addr - Y/Cb/Cr DMA start address structure
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* @y: luminance plane dma address
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* @cb: Cb plane dma address
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* @cr: Cr plane dma address
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*/
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struct camif_addr {
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dma_addr_t y;
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dma_addr_t cb;
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dma_addr_t cr;
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};
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/**
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* struct camif_buffer - the camif video buffer structure
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* @vb: vb2 buffer
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* @list: list head for the buffers queue
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* @paddr: DMA start addresses
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* @index: an identifier of this buffer at the DMA engine
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*/
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struct camif_buffer {
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struct vb2_v4l2_buffer vb;
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struct list_head list;
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struct camif_addr paddr;
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unsigned int index;
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};
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const struct camif_fmt *s3c_camif_find_format(struct camif_vp *vp,
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const u32 *pixelformat, int index);
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int s3c_camif_register_video_node(struct camif_dev *camif, int idx);
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void s3c_camif_unregister_video_node(struct camif_dev *camif, int idx);
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irqreturn_t s3c_camif_irq_handler(int irq, void *priv);
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int s3c_camif_create_subdev(struct camif_dev *camif);
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void s3c_camif_unregister_subdev(struct camif_dev *camif);
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int s3c_camif_set_defaults(struct camif_dev *camif);
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int s3c_camif_get_scaler_config(struct camif_vp *vp,
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struct camif_scaler *scaler);
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static inline void camif_active_queue_add(struct camif_vp *vp,
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struct camif_buffer *buf)
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{
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list_add_tail(&buf->list, &vp->active_buf_q);
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vp->active_buffers++;
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}
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static inline struct camif_buffer *camif_active_queue_pop(
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struct camif_vp *vp)
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{
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struct camif_buffer *buf = list_first_entry(&vp->active_buf_q,
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struct camif_buffer, list);
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list_del(&buf->list);
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vp->active_buffers--;
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return buf;
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}
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static inline struct camif_buffer *camif_active_queue_peek(
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struct camif_vp *vp, int index)
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{
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struct camif_buffer *tmp, *buf;
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if (WARN_ON(list_empty(&vp->active_buf_q)))
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return NULL;
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list_for_each_entry_safe(buf, tmp, &vp->active_buf_q, list) {
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if (buf->index == index) {
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list_del(&buf->list);
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vp->active_buffers--;
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return buf;
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}
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}
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return NULL;
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}
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static inline void camif_pending_queue_add(struct camif_vp *vp,
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struct camif_buffer *buf)
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{
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list_add_tail(&buf->list, &vp->pending_buf_q);
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}
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static inline struct camif_buffer *camif_pending_queue_pop(
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struct camif_vp *vp)
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{
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struct camif_buffer *buf = list_first_entry(&vp->pending_buf_q,
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struct camif_buffer, list);
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list_del(&buf->list);
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return buf;
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}
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#endif /* CAMIF_CORE_H_ */
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