521 lines
14 KiB
C
521 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/**************************************************************************
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* Copyright (c) 2007-2011, Intel Corporation.
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* All Rights Reserved.
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* Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
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* All Rights Reserved.
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*
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**************************************************************************/
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#include <linux/cpu.h>
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#include <linux/module.h>
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#include <linux/notifier.h>
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#include <linux/pm_runtime.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <asm/set_memory.h>
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#include <acpi/video.h>
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#include <drm/drm.h>
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#include <drm/drm_aperture.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_file.h>
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#include <drm/drm_ioctl.h>
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#include <drm/drm_pciids.h>
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#include <drm/drm_vblank.h>
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#include "framebuffer.h"
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#include "gem.h"
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#include "intel_bios.h"
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#include "mid_bios.h"
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#include "power.h"
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#include "psb_drv.h"
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#include "psb_intel_reg.h"
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#include "psb_irq.h"
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#include "psb_reg.h"
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static const struct drm_driver driver;
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static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
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/*
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* The table below contains a mapping of the PCI vendor ID and the PCI Device ID
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* to the different groups of PowerVR 5-series chip designs
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*
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* 0x8086 = Intel Corporation
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*
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* PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
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* PowerVR SGX535 - Moorestown - Intel GMA 600
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* PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
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* PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
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* PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
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* N2800
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*/
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static const struct pci_device_id pciidlist[] = {
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/* Poulsbo */
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{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
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{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
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/* Oak Trail */
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{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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/* Cedar Trail */
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{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, pciidlist);
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/*
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* Standard IOCTLs.
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*/
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static const struct drm_ioctl_desc psb_ioctls[] = {
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};
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/**
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* psb_spank - reset the 2D engine
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* @dev_priv: our PSB DRM device
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*
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* Soft reset the graphics engine and then reload the necessary registers.
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*/
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static void psb_spank(struct drm_psb_private *dev_priv)
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{
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PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
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_PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
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_PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
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_PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
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PSB_RSGX32(PSB_CR_SOFT_RESET);
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msleep(1);
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PSB_WSGX32(0, PSB_CR_SOFT_RESET);
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wmb();
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
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PSB_CR_BIF_CTRL);
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wmb();
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(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
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msleep(1);
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
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PSB_CR_BIF_CTRL);
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(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
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PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
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}
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static int psb_do_init(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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struct psb_gtt *pg = &dev_priv->gtt;
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uint32_t stolen_gtt;
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if (pg->mmu_gatt_start & 0x0FFFFFFF) {
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dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
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return -EINVAL;
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}
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stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
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stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
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stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
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dev_priv->gatt_free_offset = pg->mmu_gatt_start +
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(stolen_gtt << PAGE_SHIFT) * 1024;
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spin_lock_init(&dev_priv->irqmask_lock);
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PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
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PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
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PSB_RSGX32(PSB_CR_BIF_BANK1);
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/* Do not bypass any MMU access, let them pagefault instead */
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PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
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PSB_CR_BIF_CTRL);
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PSB_RSGX32(PSB_CR_BIF_CTRL);
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psb_spank(dev_priv);
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/* mmu_gatt ?? */
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PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
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PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
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return 0;
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}
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static void psb_driver_unload(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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/* TODO: Kill vblank etc here */
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gma_backlight_exit(dev);
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psb_modeset_cleanup(dev);
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gma_irq_uninstall(dev);
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if (dev_priv->ops->chip_teardown)
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dev_priv->ops->chip_teardown(dev);
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psb_intel_opregion_fini(dev);
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if (dev_priv->pf_pd) {
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psb_mmu_free_pagedir(dev_priv->pf_pd);
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dev_priv->pf_pd = NULL;
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}
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if (dev_priv->mmu) {
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struct psb_gtt *pg = &dev_priv->gtt;
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psb_mmu_remove_pfn_sequence(
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psb_mmu_get_default_pd
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(dev_priv->mmu),
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pg->mmu_gatt_start,
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dev_priv->vram_stolen_size >> PAGE_SHIFT);
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psb_mmu_driver_takedown(dev_priv->mmu);
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dev_priv->mmu = NULL;
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}
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psb_gem_mm_fini(dev);
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psb_gtt_fini(dev);
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if (dev_priv->scratch_page) {
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set_pages_wb(dev_priv->scratch_page, 1);
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__free_page(dev_priv->scratch_page);
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dev_priv->scratch_page = NULL;
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}
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if (dev_priv->vdc_reg) {
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iounmap(dev_priv->vdc_reg);
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dev_priv->vdc_reg = NULL;
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}
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if (dev_priv->sgx_reg) {
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iounmap(dev_priv->sgx_reg);
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dev_priv->sgx_reg = NULL;
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}
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if (dev_priv->aux_reg) {
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iounmap(dev_priv->aux_reg);
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dev_priv->aux_reg = NULL;
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}
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pci_dev_put(dev_priv->aux_pdev);
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pci_dev_put(dev_priv->lpc_pdev);
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/* Destroy VBT data */
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psb_intel_destroy_bios(dev);
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gma_power_uninit(dev);
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}
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static void psb_device_release(void *data)
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{
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struct drm_device *dev = data;
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psb_driver_unload(dev);
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}
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static int psb_driver_load(struct drm_device *dev, unsigned long flags)
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{
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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unsigned long resource_start, resource_len;
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unsigned long irqflags;
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struct drm_connector_list_iter conn_iter;
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struct drm_connector *connector;
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struct gma_encoder *gma_encoder;
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struct psb_gtt *pg;
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int ret = -ENOMEM;
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/* initializing driver private data */
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dev_priv->ops = (struct psb_ops *)flags;
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pg = &dev_priv->gtt;
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pci_set_master(pdev);
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dev_priv->num_pipe = dev_priv->ops->pipes;
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resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
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dev_priv->vdc_reg =
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ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
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if (!dev_priv->vdc_reg)
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goto out_err;
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dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
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PSB_SGX_SIZE);
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if (!dev_priv->sgx_reg)
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goto out_err;
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if (IS_MRST(dev)) {
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int domain = pci_domain_nr(pdev->bus);
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dev_priv->aux_pdev =
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pci_get_domain_bus_and_slot(domain, 0,
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PCI_DEVFN(3, 0));
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if (dev_priv->aux_pdev) {
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resource_start = pci_resource_start(dev_priv->aux_pdev,
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PSB_AUX_RESOURCE);
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resource_len = pci_resource_len(dev_priv->aux_pdev,
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PSB_AUX_RESOURCE);
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dev_priv->aux_reg = ioremap(resource_start,
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resource_len);
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if (!dev_priv->aux_reg)
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goto out_err;
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DRM_DEBUG_KMS("Found aux vdc");
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} else {
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/* Couldn't find the aux vdc so map to primary vdc */
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dev_priv->aux_reg = dev_priv->vdc_reg;
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DRM_DEBUG_KMS("Couldn't find aux pci device");
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}
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dev_priv->gmbus_reg = dev_priv->aux_reg;
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dev_priv->lpc_pdev =
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pci_get_domain_bus_and_slot(domain, 0,
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PCI_DEVFN(31, 0));
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if (dev_priv->lpc_pdev) {
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pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
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&dev_priv->lpc_gpio_base);
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pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
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(u32)dev_priv->lpc_gpio_base | (1L<<31));
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pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
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&dev_priv->lpc_gpio_base);
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dev_priv->lpc_gpio_base &= 0xffc0;
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if (dev_priv->lpc_gpio_base)
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DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
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dev_priv->lpc_gpio_base);
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else {
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pci_dev_put(dev_priv->lpc_pdev);
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dev_priv->lpc_pdev = NULL;
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}
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}
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} else {
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dev_priv->gmbus_reg = dev_priv->vdc_reg;
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}
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psb_intel_opregion_setup(dev);
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ret = dev_priv->ops->chip_setup(dev);
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if (ret)
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goto out_err;
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/* Init OSPM support */
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gma_power_init(dev);
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ret = -ENOMEM;
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dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
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if (!dev_priv->scratch_page)
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goto out_err;
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set_pages_uc(dev_priv->scratch_page, 1);
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ret = psb_gtt_init(dev);
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if (ret)
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goto out_err;
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ret = psb_gem_mm_init(dev);
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if (ret)
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goto out_err;
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ret = -ENOMEM;
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dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
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if (!dev_priv->mmu)
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goto out_err;
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dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
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if (!dev_priv->pf_pd)
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goto out_err;
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ret = psb_do_init(dev);
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if (ret)
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return ret;
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/* Add stolen memory to SGX MMU */
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ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
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dev_priv->stolen_base >> PAGE_SHIFT,
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pg->gatt_start,
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pg->stolen_size >> PAGE_SHIFT, 0);
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psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
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psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
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PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
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PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
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acpi_video_register();
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/* Setup vertical blanking handling */
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ret = drm_vblank_init(dev, dev_priv->num_pipe);
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if (ret)
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goto out_err;
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/*
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* Install interrupt handlers prior to powering off SGX or else we will
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* crash.
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*/
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dev_priv->vdc_irq_mask = 0;
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dev_priv->pipestat[0] = 0;
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dev_priv->pipestat[1] = 0;
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dev_priv->pipestat[2] = 0;
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spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
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PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
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PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
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PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
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spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
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gma_irq_install(dev);
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dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
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psb_modeset_init(dev);
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drm_kms_helper_poll_init(dev);
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/* Only add backlight support if we have LVDS or MIPI output */
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drm_connector_list_iter_begin(dev, &conn_iter);
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drm_for_each_connector_iter(connector, &conn_iter) {
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gma_encoder = gma_attached_encoder(connector);
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if (gma_encoder->type == INTEL_OUTPUT_LVDS ||
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gma_encoder->type == INTEL_OUTPUT_MIPI) {
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ret = gma_backlight_init(dev);
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if (ret == 0)
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acpi_video_register_backlight();
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break;
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}
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}
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drm_connector_list_iter_end(&conn_iter);
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if (ret)
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return ret;
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psb_intel_opregion_enable_asle(dev);
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return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
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out_err:
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psb_driver_unload(dev);
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return ret;
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}
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static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct drm_psb_private *dev_priv;
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struct drm_device *dev;
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int ret;
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/*
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* We cannot yet easily find the framebuffer's location in memory. So
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* remove all framebuffers here.
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*
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* TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then we
|
|
* might be able to read the framebuffer range from the device.
|
|
*/
|
|
ret = drm_aperture_remove_framebuffers(true, &driver);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pcim_enable_device(pdev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
|
|
if (IS_ERR(dev_priv))
|
|
return PTR_ERR(dev_priv);
|
|
dev = &dev_priv->dev;
|
|
|
|
pci_set_drvdata(pdev, dev);
|
|
|
|
ret = psb_driver_load(dev, ent->driver_data);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = drm_dev_register(dev, ent->driver_data);
|
|
if (ret)
|
|
return ret;
|
|
|
|
psb_fbdev_setup(dev_priv);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void psb_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
drm_dev_unregister(dev);
|
|
}
|
|
|
|
static DEFINE_RUNTIME_DEV_PM_OPS(psb_pm_ops, gma_power_suspend, gma_power_resume, NULL);
|
|
|
|
static const struct file_operations psb_gem_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = drm_open,
|
|
.release = drm_release,
|
|
.unlocked_ioctl = drm_ioctl,
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
.mmap = drm_gem_mmap,
|
|
.poll = drm_poll,
|
|
.read = drm_read,
|
|
};
|
|
|
|
static const struct drm_driver driver = {
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM,
|
|
|
|
.num_ioctls = ARRAY_SIZE(psb_ioctls),
|
|
|
|
.dumb_create = psb_gem_dumb_create,
|
|
.ioctls = psb_ioctls,
|
|
.fops = &psb_gem_fops,
|
|
.name = DRIVER_NAME,
|
|
.desc = DRIVER_DESC,
|
|
.date = DRIVER_DATE,
|
|
.major = DRIVER_MAJOR,
|
|
.minor = DRIVER_MINOR,
|
|
.patchlevel = DRIVER_PATCHLEVEL
|
|
};
|
|
|
|
static struct pci_driver psb_pci_driver = {
|
|
.name = DRIVER_NAME,
|
|
.id_table = pciidlist,
|
|
.probe = psb_pci_probe,
|
|
.remove = psb_pci_remove,
|
|
.driver.pm = &psb_pm_ops,
|
|
};
|
|
|
|
static int __init psb_init(void)
|
|
{
|
|
if (drm_firmware_drivers_only())
|
|
return -ENODEV;
|
|
|
|
return pci_register_driver(&psb_pci_driver);
|
|
}
|
|
|
|
static void __exit psb_exit(void)
|
|
{
|
|
pci_unregister_driver(&psb_pci_driver);
|
|
}
|
|
|
|
late_initcall(psb_init);
|
|
module_exit(psb_exit);
|
|
|
|
MODULE_AUTHOR(DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_LICENSE("GPL");
|