245 lines
6.3 KiB
C
245 lines
6.3 KiB
C
/*
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* Pb1550 board support.
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*
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* Copyright (C) 2009-2011 Manuel Lauss
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1550nd.h>
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#include <asm/mach-au1x00/gpio.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include "platform.h"
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const char *get_system_type(void)
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{
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return "PB1550";
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}
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void __init board_setup(void)
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{
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u32 pin_func;
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bcsr_init(PB1550_BCSR_PHYS_ADDR,
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PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
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alchemy_gpio2_enable();
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/*
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* Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
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* but it is board specific code, so put it here.
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*/
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pin_func = au_readl(SYS_PINFUNC);
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au_sync();
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pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
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au_writel(pin_func, SYS_PINFUNC);
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bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
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printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
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}
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/******************************************************************************/
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static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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{
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if ((slot < 12) || (slot > 13) || pin == 0)
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return -1;
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if (slot == 12) {
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switch (pin) {
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case 1: return AU1500_PCI_INTB;
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case 2: return AU1500_PCI_INTC;
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case 3: return AU1500_PCI_INTD;
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case 4: return AU1500_PCI_INTA;
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}
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}
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if (slot == 13) {
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switch (pin) {
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case 1: return AU1500_PCI_INTA;
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case 2: return AU1500_PCI_INTB;
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case 3: return AU1500_PCI_INTC;
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case 4: return AU1500_PCI_INTD;
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}
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}
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return -1;
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}
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static struct resource alchemy_pci_host_res[] = {
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[0] = {
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.start = AU1500_PCI_PHYS_ADDR,
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.end = AU1500_PCI_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct alchemy_pci_platdata pb1550_pci_pd = {
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.board_map_irq = pb1550_map_pci_irq,
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};
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static struct platform_device pb1550_pci_host = {
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.dev.platform_data = &pb1550_pci_pd,
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.name = "alchemy-pci",
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.id = 0,
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.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
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.resource = alchemy_pci_host_res,
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};
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static struct resource au1550_psc2_res[] = {
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[0] = {
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.start = AU1550_PSC2_PHYS_ADDR,
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.end = AU1550_PSC2_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1550_PSC2_INT,
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.end = AU1550_PSC2_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = AU1550_DSCR_CMD0_PSC2_TX,
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.end = AU1550_DSCR_CMD0_PSC2_TX,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = AU1550_DSCR_CMD0_PSC2_RX,
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.end = AU1550_DSCR_CMD0_PSC2_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device pb1550_i2c_dev = {
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.name = "au1xpsc_smbus",
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.id = 0, /* bus number */
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.num_resources = ARRAY_SIZE(au1550_psc2_res),
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.resource = au1550_psc2_res,
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};
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static struct mtd_partition pb1550_nand_parts[] = {
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[0] = {
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.name = "NAND FS 0",
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.offset = 0,
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.size = 8 * 1024 * 1024,
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},
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[1] = {
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.name = "NAND FS 1",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct au1550nd_platdata pb1550_nand_pd = {
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.parts = pb1550_nand_parts,
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.num_parts = ARRAY_SIZE(pb1550_nand_parts),
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.devwidth = 0, /* x8 NAND default, needs fixing up */
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};
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static struct resource pb1550_nand_res[] = {
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[0] = {
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.start = 0x20000000,
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.end = 0x20000fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device pb1550_nand_dev = {
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.name = "au1550-nand",
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.id = -1,
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.resource = pb1550_nand_res,
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.num_resources = ARRAY_SIZE(pb1550_nand_res),
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.dev = {
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.platform_data = &pb1550_nand_pd,
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},
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};
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static void __init pb1550_nand_setup(void)
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{
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int boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) |
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((bcsr_read(BCSR_STATUS) >> 6) & 0x1);
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switch (boot_swapboot) {
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case 0:
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case 2:
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case 8:
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case 0xC:
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case 0xD:
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/* x16 NAND Flash */
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pb1550_nand_pd.devwidth = 1;
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/* fallthrough */
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case 1:
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case 9:
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case 3:
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case 0xE:
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case 0xF:
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/* x8 NAND, already set up */
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platform_device_register(&pb1550_nand_dev);
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}
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}
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static int __init pb1550_dev_init(void)
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{
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int swapped;
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irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH);
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/* enable both PCMCIA card irqs in the shared line */
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alchemy_gpio2_enable_int(201);
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alchemy_gpio2_enable_int(202);
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/* Pb1550, like all others, also has statuschange irqs; however they're
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* wired up on one of the Au1550's shared GPIO201_205 line, which also
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* services the PCMCIA card interrupts. So we ignore statuschange and
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* use the GPIO201_205 exclusively for card interrupts, since a) pcmcia
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* drivers are used to shared irqs and b) statuschange isn't really use-
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* ful anyway.
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*/
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db1x_register_pcmcia_socket(
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AU1000_PCMCIA_ATTR_PHYS_ADDR,
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AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
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AU1000_PCMCIA_MEM_PHYS_ADDR,
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AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
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AU1000_PCMCIA_IO_PHYS_ADDR,
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AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
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AU1550_GPIO201_205_INT, AU1550_GPIO0_INT, 0, 0, 0);
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db1x_register_pcmcia_socket(
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AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000,
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AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1,
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AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008000000,
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AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1,
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AU1000_PCMCIA_IO_PHYS_ADDR + 0x008000000,
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AU1000_PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1,
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AU1550_GPIO201_205_INT, AU1550_GPIO1_INT, 0, 0, 1);
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/* NAND setup */
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gpio_direction_input(206); /* GPIO206 high */
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pb1550_nand_setup();
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swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_PB1550_SWAPBOOT;
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db1x_register_norflash(128 * 1024 * 1024, 4, swapped);
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platform_device_register(&pb1550_pci_host);
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platform_device_register(&pb1550_i2c_dev);
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return 0;
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}
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arch_initcall(pb1550_dev_init);
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