OpenCloudOS-Kernel/drivers/clk/meson
Stephen Boyd c964cfc612 First round of fixes for meson clocks targeted for v4.17
- fix typos in two meson8 clock names
  - remove unused clock ops declaration
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAlrgTfIACgkQ5vwPHDfy
 2oUvSxAApnug8+v18u+rIojj35YpEG8X24O2Pg7R2fLJIymNcC/ocb1IU8tqfeqy
 qYfsC+SyxZlyEQpx1YTO2cUMX4z2rISK1JpFsck3hbgLi+DkMZ7tqa10+i+IaCTB
 CLGsfc2BKNhqYEHdAP9CPnCTimS1c+/AM1dtuLaT59ZOP1EnUMSZ5g3w7pNc+qOb
 Kjp5+sBpkGIlikWIuyURsUQUWZ8eBhDLyW0jlExYRUp9eyo5dM0fpPU+UBMECaHx
 lvqAyVOlqRc24H5J38ovB4JjmeQiZ54JfZ6qRmz+z9oi6MQ/IS1f4WFUCFYSXgeP
 vE0JMgbWNbNNCSS9W+TGf0GOVbGjd5RIv+acQaybZ0hfIyJaC/WrYxdYkDA4Hv6D
 2lh8JEeRA/wBaGfJu18KsJzXZqpG6r9PkVZisBOqUXf1cLKA8LJDiM8KUadV4w0z
 1kUlLCc8yrxwP0xj3XzBorvgsXoRwIwfIV4Oz2FLz9c4Nkojpm+wdNLBI7Zkzt8d
 28ulE9J9j96JhieS7Wl1YkRtPZYq4XPw2LjbuDp/Yp7NN9tPsbcAFg4YaV7gqrLW
 phMtqk2b9G3uk+x+9WdPuNBpOyC+I6Hs1OYSXpOyCeC4dqk+XR8jfAVo57Gk3+HG
 Gv0plGRhmFmoILpbaPbxR1othpsSc9gq+CutFJrSzuSWkkVLNhw=
 =ksxI
 -----END PGP SIGNATURE-----

Merge tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson into clk-fixes

Pull meson clk fixes from Jerome Brunet:
 - fix typos in two meson8 clock names
 - remove unused clock ops declaration

* tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: meson8b: fix meson8b_cpu_clk parent clock name
  clk: meson: meson8b: fix meson8b_fclk_div3_div clock name
  clk: meson: drop meson_aoclk_gate_regmap_ops
2018-05-01 14:44:16 -07:00
..
Kconfig clk: meson: use hhi syscon if available 2018-03-13 10:04:04 +01:00
Makefile clk: meson: remove obsolete cpu_clk 2018-03-13 10:04:04 +01:00
axg.c clk: meson: Drop unused local variable and add static 2018-03-14 15:36:31 -07:00
axg.h clk: meson: add fdiv clock gates 2018-03-13 10:09:58 +01:00
clk-audio-divider.c clk: meson: migrate the audio divider clock to clk_regmap 2018-03-13 10:04:02 +01:00
clk-mpll.c clk: meson: split divider and gate part of mpll 2018-03-13 10:04:03 +01:00
clk-pll.c clk: meson: add ROUND_CLOSEST to the pll driver 2018-03-13 10:09:49 +01:00
clk-regmap.c clk: meson: honor CLK_MUX_ROUND_CLOSEST in clk_regmap 2018-04-16 09:25:09 -07:00
clk-regmap.h clk: meson: add regmap clocks 2018-03-13 10:03:58 +01:00
clkc.h clk: meson: add ROUND_CLOSEST to the pll driver 2018-03-13 10:09:49 +01:00
gxbb-aoclk-32k.c clk: meson: gxbb-aoclk: Add CEC 32k clock 2017-08-04 18:02:02 +02:00
gxbb-aoclk.c clk: meson: switch gxbb ao_clk to clk_regmap 2018-03-13 10:03:59 +01:00
gxbb-aoclk.h clk: meson: drop meson_aoclk_gate_regmap_ops 2018-04-25 10:19:26 +02:00
gxbb.c clk: meson: Drop unused local variable and add static 2018-03-14 15:36:31 -07:00
gxbb.h clk: meson: add fdiv clock gates 2018-03-13 10:09:58 +01:00
meson8b.c clk: meson: meson8b: fix meson8b_cpu_clk parent clock name 2018-04-25 10:23:19 +02:00
meson8b.h clk: meson: add fdiv clock gates 2018-03-13 10:09:58 +01:00