325 lines
7.0 KiB
C
325 lines
7.0 KiB
C
/*
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* pm.c - Common OMAP2+ power management-related code
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/opp.h>
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#include <linux/export.h>
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#include <linux/suspend.h>
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#include <asm/system_misc.h>
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#include <plat/omap-pm.h>
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#include <plat/omap_device.h>
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#include "common.h"
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#include "prcm-common.h"
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#include "voltage.h"
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include "pm.h"
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#include "twl-common.h"
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static struct omap_device_pm_latency *pm_lats;
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/*
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* omap_pm_suspend: points to a function that does the SoC-specific
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* suspend work
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*/
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int (*omap_pm_suspend)(void);
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static int __init _init_omap_device(char *name)
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{
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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oh = omap_hwmod_lookup(name);
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if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
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__func__, name))
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return -ENODEV;
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pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
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if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
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__func__, name))
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return -ENODEV;
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return 0;
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}
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/*
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* Build omap_devices for processors and bus.
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*/
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static void __init omap2_init_processor_devices(void)
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{
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_init_omap_device("mpu");
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if (omap3_has_iva())
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_init_omap_device("iva");
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if (cpu_is_omap44xx()) {
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_init_omap_device("l3_main_1");
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_init_omap_device("dsp");
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_init_omap_device("iva");
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} else {
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_init_omap_device("l3_main");
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}
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}
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/* Types of sleep_switch used in omap_set_pwrdm_state */
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#define FORCEWAKEUP_SWITCH 0
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#define LOWPOWERSTATE_SWITCH 1
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int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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/*
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* This sets pwrdm state (other than mpu & core. Currently only ON &
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* RET are supported.
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*/
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int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
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{
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u8 curr_pwrst, next_pwrst;
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int sleep_switch = -1, ret = 0, hwsup = 0;
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if (!pwrdm || IS_ERR(pwrdm))
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return -EINVAL;
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while (!(pwrdm->pwrsts & (1 << pwrst))) {
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if (pwrst == PWRDM_POWER_OFF)
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return ret;
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pwrst--;
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}
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next_pwrst = pwrdm_read_next_pwrst(pwrdm);
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if (next_pwrst == pwrst)
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return ret;
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curr_pwrst = pwrdm_read_pwrst(pwrdm);
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if (curr_pwrst < PWRDM_POWER_ON) {
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if ((curr_pwrst > pwrst) &&
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(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
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sleep_switch = LOWPOWERSTATE_SWITCH;
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} else {
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hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
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clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
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sleep_switch = FORCEWAKEUP_SWITCH;
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}
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}
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ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
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if (ret)
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pr_err("%s: unable to set power state of powerdomain: %s\n",
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__func__, pwrdm->name);
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switch (sleep_switch) {
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case FORCEWAKEUP_SWITCH:
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if (hwsup)
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clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
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else
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clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
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break;
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case LOWPOWERSTATE_SWITCH:
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pwrdm_set_lowpwrstchange(pwrdm);
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pwrdm_wait_transition(pwrdm);
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pwrdm_state_switch(pwrdm);
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break;
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}
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return ret;
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}
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/*
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* This API is to be called during init to set the various voltage
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* domains to the voltage as per the opp table. Typically we boot up
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* at the nominal voltage. So this function finds out the rate of
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* the clock associated with the voltage domain, finds out the correct
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* opp entry and sets the voltage domain to the voltage specified
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* in the opp entry
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*/
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static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
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const char *oh_name)
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{
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struct voltagedomain *voltdm;
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struct clk *clk;
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struct opp *opp;
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unsigned long freq, bootup_volt;
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struct device *dev;
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if (!vdd_name || !clk_name || !oh_name) {
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pr_err("%s: invalid parameters\n", __func__);
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goto exit;
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}
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dev = omap_device_get_by_hwmod_name(oh_name);
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if (IS_ERR(dev)) {
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pr_err("%s: Unable to get dev pointer for hwmod %s\n",
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__func__, oh_name);
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goto exit;
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}
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voltdm = voltdm_lookup(vdd_name);
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if (IS_ERR(voltdm)) {
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pr_err("%s: unable to get vdd pointer for vdd_%s\n",
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__func__, vdd_name);
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goto exit;
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}
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clk = clk_get(NULL, clk_name);
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if (IS_ERR(clk)) {
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pr_err("%s: unable to get clk %s\n", __func__, clk_name);
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goto exit;
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}
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freq = clk->rate;
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clk_put(clk);
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rcu_read_lock();
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opp = opp_find_freq_ceil(dev, &freq);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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pr_err("%s: unable to find boot up OPP for vdd_%s\n",
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__func__, vdd_name);
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goto exit;
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}
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bootup_volt = opp_get_voltage(opp);
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rcu_read_unlock();
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if (!bootup_volt) {
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pr_err("%s: unable to find voltage corresponding "
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"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
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goto exit;
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}
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voltdm_scale(voltdm, bootup_volt);
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return 0;
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exit:
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pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
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return -EINVAL;
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}
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#ifdef CONFIG_SUSPEND
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static int omap_pm_enter(suspend_state_t suspend_state)
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{
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int ret = 0;
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if (!omap_pm_suspend)
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return -ENOENT; /* XXX doublecheck */
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switch (suspend_state) {
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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ret = omap_pm_suspend();
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int omap_pm_begin(suspend_state_t state)
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{
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disable_hlt();
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if (cpu_is_omap34xx())
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omap_prcm_irq_prepare();
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return 0;
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}
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static void omap_pm_end(void)
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{
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enable_hlt();
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return;
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}
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static void omap_pm_finish(void)
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{
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if (cpu_is_omap34xx())
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omap_prcm_irq_complete();
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}
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static const struct platform_suspend_ops omap_pm_ops = {
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.begin = omap_pm_begin,
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.end = omap_pm_end,
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.enter = omap_pm_enter,
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.finish = omap_pm_finish,
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.valid = suspend_valid_only_mem,
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};
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#endif /* CONFIG_SUSPEND */
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static void __init omap3_init_voltages(void)
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{
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if (!cpu_is_omap34xx())
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return;
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omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
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omap2_set_init_voltage("core", "l3_ick", "l3_main");
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}
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static void __init omap4_init_voltages(void)
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{
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if (!cpu_is_omap44xx())
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return;
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omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
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omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
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omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
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}
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static int __init omap2_common_pm_init(void)
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{
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if (!of_have_populated_dt())
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omap2_init_processor_devices();
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omap_pm_if_init();
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return 0;
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}
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postcore_initcall(omap2_common_pm_init);
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int __init omap2_common_pm_late_init(void)
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{
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/*
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* In the case of DT, the PMIC and SR initialization will be done using
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* a completely different mechanism.
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* Disable this part if a DT blob is available.
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*/
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if (of_have_populated_dt())
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return 0;
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/* Init the voltage layer */
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omap_pmic_late_init();
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omap_voltage_late_init();
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/* Initialize the voltages */
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omap3_init_voltages();
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omap4_init_voltages();
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/* Smartreflex device init */
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omap_devinit_smartreflex();
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#ifdef CONFIG_SUSPEND
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suspend_set_ops(&omap_pm_ops);
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#endif
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return 0;
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}
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