354 lines
8.3 KiB
C
354 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*/
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/*
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* In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
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* the CPU frequency subset and voltage value of each OPP varies
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* based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
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* defines the voltage and frequency value based on the msm-id in SMEM
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* and speedbin blown in the efuse combination.
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* The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
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* to provide the OPP framework with required information.
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* This is used to determine the voltage and frequency value for each OPP of
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* operating-points-v2 table when it is parsed by the OPP framework.
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*/
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#include <linux/cpu.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_opp.h>
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#include <linux/slab.h>
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#include <linux/soc/qcom/smem.h>
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#define MSM_ID_SMEM 137
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enum _msm_id {
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MSM8996V3 = 0xF6ul,
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APQ8096V3 = 0x123ul,
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MSM8996SG = 0x131ul,
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APQ8096SG = 0x138ul,
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};
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enum _msm8996_version {
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MSM8996_V3,
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MSM8996_SG,
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NUM_OF_MSM8996_VERSIONS,
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};
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struct qcom_cpufreq_drv;
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struct qcom_cpufreq_match_data {
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int (*get_version)(struct device *cpu_dev,
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struct nvmem_cell *speedbin_nvmem,
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struct qcom_cpufreq_drv *drv);
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const char **genpd_names;
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};
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struct qcom_cpufreq_drv {
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struct opp_table **opp_tables;
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struct opp_table **genpd_opp_tables;
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u32 versions;
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const struct qcom_cpufreq_match_data *data;
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};
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static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
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static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
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{
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size_t len;
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u32 *msm_id;
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enum _msm8996_version version;
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msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
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if (IS_ERR(msm_id))
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return NUM_OF_MSM8996_VERSIONS;
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/* The first 4 bytes are format, next to them is the actual msm-id */
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msm_id++;
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switch ((enum _msm_id)*msm_id) {
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case MSM8996V3:
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case APQ8096V3:
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version = MSM8996_V3;
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break;
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case MSM8996SG:
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case APQ8096SG:
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version = MSM8996_SG;
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break;
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default:
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version = NUM_OF_MSM8996_VERSIONS;
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}
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return version;
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}
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static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
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struct nvmem_cell *speedbin_nvmem,
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struct qcom_cpufreq_drv *drv)
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{
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size_t len;
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u8 *speedbin;
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enum _msm8996_version msm8996_version;
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msm8996_version = qcom_cpufreq_get_msm_id();
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if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
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dev_err(cpu_dev, "Not Snapdragon 820/821!");
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return -ENODEV;
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}
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speedbin = nvmem_cell_read(speedbin_nvmem, &len);
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if (IS_ERR(speedbin))
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return PTR_ERR(speedbin);
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switch (msm8996_version) {
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case MSM8996_V3:
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drv->versions = 1 << (unsigned int)(*speedbin);
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break;
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case MSM8996_SG:
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drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
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break;
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default:
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BUG();
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break;
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}
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kfree(speedbin);
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return 0;
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}
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static const struct qcom_cpufreq_match_data match_data_kryo = {
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.get_version = qcom_cpufreq_kryo_name_version,
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};
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static const char *qcs404_genpd_names[] = { "cpr", NULL };
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static const struct qcom_cpufreq_match_data match_data_qcs404 = {
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.genpd_names = qcs404_genpd_names,
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};
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static int qcom_cpufreq_probe(struct platform_device *pdev)
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{
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struct qcom_cpufreq_drv *drv;
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struct nvmem_cell *speedbin_nvmem;
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struct device_node *np;
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struct device *cpu_dev;
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unsigned cpu;
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const struct of_device_id *match;
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int ret;
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cpu_dev = get_cpu_device(0);
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if (!cpu_dev)
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return -ENODEV;
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np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
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if (!np)
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return -ENOENT;
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ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
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if (!ret) {
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of_node_put(np);
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return -ENOENT;
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}
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drv = kzalloc(sizeof(*drv), GFP_KERNEL);
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if (!drv)
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return -ENOMEM;
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match = pdev->dev.platform_data;
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drv->data = match->data;
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if (!drv->data) {
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ret = -ENODEV;
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goto free_drv;
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}
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if (drv->data->get_version) {
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speedbin_nvmem = of_nvmem_cell_get(np, NULL);
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if (IS_ERR(speedbin_nvmem)) {
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if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
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dev_err(cpu_dev,
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"Could not get nvmem cell: %ld\n",
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PTR_ERR(speedbin_nvmem));
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ret = PTR_ERR(speedbin_nvmem);
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goto free_drv;
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}
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ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv);
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if (ret) {
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nvmem_cell_put(speedbin_nvmem);
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goto free_drv;
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}
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nvmem_cell_put(speedbin_nvmem);
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}
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of_node_put(np);
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drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables),
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GFP_KERNEL);
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if (!drv->opp_tables) {
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ret = -ENOMEM;
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goto free_drv;
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}
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drv->genpd_opp_tables = kcalloc(num_possible_cpus(),
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sizeof(*drv->genpd_opp_tables),
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GFP_KERNEL);
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if (!drv->genpd_opp_tables) {
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ret = -ENOMEM;
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goto free_opp;
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}
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for_each_possible_cpu(cpu) {
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cpu_dev = get_cpu_device(cpu);
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if (NULL == cpu_dev) {
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ret = -ENODEV;
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goto free_genpd_opp;
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}
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if (drv->data->get_version) {
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drv->opp_tables[cpu] =
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dev_pm_opp_set_supported_hw(cpu_dev,
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&drv->versions, 1);
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if (IS_ERR(drv->opp_tables[cpu])) {
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ret = PTR_ERR(drv->opp_tables[cpu]);
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dev_err(cpu_dev,
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"Failed to set supported hardware\n");
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goto free_genpd_opp;
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}
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}
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if (drv->data->genpd_names) {
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drv->genpd_opp_tables[cpu] =
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dev_pm_opp_attach_genpd(cpu_dev,
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drv->data->genpd_names,
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NULL);
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if (IS_ERR(drv->genpd_opp_tables[cpu])) {
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ret = PTR_ERR(drv->genpd_opp_tables[cpu]);
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if (ret != -EPROBE_DEFER)
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dev_err(cpu_dev,
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"Could not attach to pm_domain: %d\n",
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ret);
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goto free_genpd_opp;
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}
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}
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}
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cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
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NULL, 0);
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if (!IS_ERR(cpufreq_dt_pdev)) {
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platform_set_drvdata(pdev, drv);
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return 0;
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}
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ret = PTR_ERR(cpufreq_dt_pdev);
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dev_err(cpu_dev, "Failed to register platform device\n");
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free_genpd_opp:
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for_each_possible_cpu(cpu) {
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if (IS_ERR_OR_NULL(drv->genpd_opp_tables[cpu]))
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break;
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dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
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}
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kfree(drv->genpd_opp_tables);
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free_opp:
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for_each_possible_cpu(cpu) {
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if (IS_ERR_OR_NULL(drv->opp_tables[cpu]))
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break;
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dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
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}
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kfree(drv->opp_tables);
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free_drv:
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kfree(drv);
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return ret;
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}
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static int qcom_cpufreq_remove(struct platform_device *pdev)
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{
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struct qcom_cpufreq_drv *drv = platform_get_drvdata(pdev);
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unsigned int cpu;
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platform_device_unregister(cpufreq_dt_pdev);
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for_each_possible_cpu(cpu) {
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if (drv->opp_tables[cpu])
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dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
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if (drv->genpd_opp_tables[cpu])
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dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
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}
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kfree(drv->opp_tables);
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kfree(drv->genpd_opp_tables);
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kfree(drv);
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return 0;
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}
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static struct platform_driver qcom_cpufreq_driver = {
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.probe = qcom_cpufreq_probe,
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.remove = qcom_cpufreq_remove,
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.driver = {
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.name = "qcom-cpufreq-nvmem",
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},
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};
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static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
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{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
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{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
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{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
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{},
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};
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MODULE_DEVICE_TABLE(of, qcom_cpufreq_match_list);
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/*
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* Since the driver depends on smem and nvmem drivers, which may
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* return EPROBE_DEFER, all the real activity is done in the probe,
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* which may be defered as well. The init here is only registering
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* the driver and the platform device.
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*/
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static int __init qcom_cpufreq_init(void)
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{
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struct device_node *np = of_find_node_by_path("/");
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const struct of_device_id *match;
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int ret;
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if (!np)
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return -ENODEV;
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match = of_match_node(qcom_cpufreq_match_list, np);
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of_node_put(np);
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if (!match)
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return -ENODEV;
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ret = platform_driver_register(&qcom_cpufreq_driver);
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if (unlikely(ret < 0))
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return ret;
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cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem",
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-1, match, sizeof(*match));
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ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
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if (0 == ret)
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return 0;
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platform_driver_unregister(&qcom_cpufreq_driver);
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return ret;
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}
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module_init(qcom_cpufreq_init);
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static void __exit qcom_cpufreq_exit(void)
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{
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platform_device_unregister(cpufreq_pdev);
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platform_driver_unregister(&qcom_cpufreq_driver);
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}
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module_exit(qcom_cpufreq_exit);
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MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver");
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MODULE_LICENSE("GPL v2");
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