410 lines
11 KiB
C
410 lines
11 KiB
C
/*
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* Copyright 2012 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* based on nouveau_prime.c
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*
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* Authors: Alex Deucher
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*/
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/**
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* DOC: PRIME Buffer Sharing
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*
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* The following callback implementations are used for :ref:`sharing GEM buffer
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* objects between different devices via PRIME <prime_buffer_sharing>`.
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*/
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_display.h"
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#include <drm/amdgpu_drm.h>
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#include <linux/dma-buf.h>
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static const struct dma_buf_ops amdgpu_dmabuf_ops;
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/**
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* amdgpu_gem_prime_get_sg_table - &drm_driver.gem_prime_get_sg_table
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* implementation
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* @obj: GEM buffer object
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*
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* Returns:
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* A scatter/gather table for the pinned pages of the buffer object's memory.
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*/
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struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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int npages = bo->tbo.num_pages;
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return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
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}
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/**
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* amdgpu_gem_prime_vmap - &dma_buf_ops.vmap implementation
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* @obj: GEM buffer object
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*
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* Sets up an in-kernel virtual mapping of the buffer object's memory.
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*
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* Returns:
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* The virtual address of the mapping or an error pointer.
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*/
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void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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int ret;
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ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
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&bo->dma_buf_vmap);
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if (ret)
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return ERR_PTR(ret);
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return bo->dma_buf_vmap.virtual;
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}
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/**
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* amdgpu_gem_prime_vunmap - &dma_buf_ops.vunmap implementation
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* @obj: GEM buffer object
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* @vaddr: virtual address (unused)
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*
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* Tears down the in-kernel virtual mapping of the buffer object's memory.
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*/
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void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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ttm_bo_kunmap(&bo->dma_buf_vmap);
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}
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/**
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* amdgpu_gem_prime_mmap - &drm_driver.gem_prime_mmap implementation
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* @obj: GEM buffer object
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* @vma: virtual memory area
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*
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* Sets up a userspace mapping of the buffer object's memory in the given
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* virtual memory area.
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*
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* Returns:
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* 0 on success or negative error code.
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*/
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int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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unsigned asize = amdgpu_bo_size(bo);
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int ret;
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if (!vma->vm_file)
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return -ENODEV;
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if (adev == NULL)
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return -ENODEV;
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/* Check for valid size. */
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if (asize < vma->vm_end - vma->vm_start)
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return -EINVAL;
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if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
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(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
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return -EPERM;
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}
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vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
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/* prime mmap does not need to check access, so allow here */
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ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
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if (ret)
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return ret;
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ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
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drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
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return ret;
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}
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/**
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* amdgpu_gem_prime_import_sg_table - &drm_driver.gem_prime_import_sg_table
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* implementation
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* @dev: DRM device
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* @attach: DMA-buf attachment
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* @sg: Scatter/gather table
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*
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* Import shared DMA buffer memory exported by another device.
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*
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* Returns:
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* A new GEM buffer object of the given DRM device, representing the memory
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* described by the given DMA-buf attachment and scatter/gather table.
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*/
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struct drm_gem_object *
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amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf_attachment *attach,
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struct sg_table *sg)
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{
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struct reservation_object *resv = attach->dmabuf->resv;
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struct amdgpu_device *adev = dev->dev_private;
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struct amdgpu_bo *bo;
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struct amdgpu_bo_param bp;
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int ret;
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memset(&bp, 0, sizeof(bp));
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bp.size = attach->dmabuf->size;
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bp.byte_align = PAGE_SIZE;
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bp.domain = AMDGPU_GEM_DOMAIN_CPU;
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bp.flags = 0;
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bp.type = ttm_bo_type_sg;
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bp.resv = resv;
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ww_mutex_lock(&resv->lock, NULL);
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ret = amdgpu_bo_create(adev, &bp, &bo);
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if (ret)
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goto error;
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bo->tbo.sg = sg;
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bo->tbo.ttm->sg = sg;
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bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
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bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
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if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
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bo->prime_shared_count = 1;
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ww_mutex_unlock(&resv->lock);
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return &bo->gem_base;
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error:
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ww_mutex_unlock(&resv->lock);
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return ERR_PTR(ret);
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}
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/**
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* amdgpu_gem_map_attach - &dma_buf_ops.attach implementation
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* @dma_buf: shared DMA buffer
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* @attach: DMA-buf attachment
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*
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* Makes sure that the shared DMA buffer can be accessed by the target device.
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* For now, simply pins it to the GTT domain, where it should be accessible by
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* all DMA devices.
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*
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* Returns:
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* 0 on success or negative error code.
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*/
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static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
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struct dma_buf_attachment *attach)
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{
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struct drm_gem_object *obj = dma_buf->priv;
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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long r;
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r = drm_gem_map_attach(dma_buf, attach);
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if (r)
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return r;
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r = amdgpu_bo_reserve(bo, false);
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if (unlikely(r != 0))
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goto error_detach;
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if (attach->dev->driver != adev->dev->driver) {
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/*
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* Wait for all shared fences to complete before we switch to future
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* use of exclusive fence on this prime shared bo.
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*/
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r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
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true, false,
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MAX_SCHEDULE_TIMEOUT);
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if (unlikely(r < 0)) {
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DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
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goto error_unreserve;
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}
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}
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/* pin buffer into GTT */
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r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
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if (r)
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goto error_unreserve;
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if (attach->dev->driver != adev->dev->driver)
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bo->prime_shared_count++;
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error_unreserve:
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amdgpu_bo_unreserve(bo);
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error_detach:
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if (r)
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drm_gem_map_detach(dma_buf, attach);
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return r;
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}
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/**
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* amdgpu_gem_map_detach - &dma_buf_ops.detach implementation
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* @dma_buf: shared DMA buffer
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* @attach: DMA-buf attachment
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*
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* This is called when a shared DMA buffer no longer needs to be accessible by
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* the other device. For now, simply unpins the buffer from GTT.
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*/
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static void amdgpu_gem_map_detach(struct dma_buf *dma_buf,
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struct dma_buf_attachment *attach)
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{
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struct drm_gem_object *obj = dma_buf->priv;
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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int ret = 0;
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ret = amdgpu_bo_reserve(bo, true);
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if (unlikely(ret != 0))
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goto error;
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amdgpu_bo_unpin(bo);
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if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
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bo->prime_shared_count--;
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amdgpu_bo_unreserve(bo);
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error:
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drm_gem_map_detach(dma_buf, attach);
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}
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/**
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* amdgpu_gem_prime_res_obj - &drm_driver.gem_prime_res_obj implementation
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* @obj: GEM buffer object
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*
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* Returns:
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* The buffer object's reservation object.
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*/
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struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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return bo->tbo.resv;
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}
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/**
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* amdgpu_gem_begin_cpu_access - &dma_buf_ops.begin_cpu_access implementation
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* @dma_buf: shared DMA buffer
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* @direction: direction of DMA transfer
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*
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* This is called before CPU access to the shared DMA buffer's memory. If it's
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* a read access, the buffer is moved to the GTT domain if possible, for optimal
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* CPU read performance.
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*
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* Returns:
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* 0 on success or negative error code.
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*/
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static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
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enum dma_data_direction direction)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct ttm_operation_ctx ctx = { true, false };
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u32 domain = amdgpu_display_supported_domains(adev);
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int ret;
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bool reads = (direction == DMA_BIDIRECTIONAL ||
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direction == DMA_FROM_DEVICE);
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if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
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return 0;
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/* move to gtt */
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ret = amdgpu_bo_reserve(bo, false);
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if (unlikely(ret != 0))
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return ret;
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if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
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amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
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ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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}
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amdgpu_bo_unreserve(bo);
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return ret;
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}
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static const struct dma_buf_ops amdgpu_dmabuf_ops = {
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.attach = amdgpu_gem_map_attach,
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.detach = amdgpu_gem_map_detach,
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.map_dma_buf = drm_gem_map_dma_buf,
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.unmap_dma_buf = drm_gem_unmap_dma_buf,
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.release = drm_gem_dmabuf_release,
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.begin_cpu_access = amdgpu_gem_begin_cpu_access,
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.map = drm_gem_dmabuf_kmap,
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.unmap = drm_gem_dmabuf_kunmap,
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.mmap = drm_gem_dmabuf_mmap,
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.vmap = drm_gem_dmabuf_vmap,
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.vunmap = drm_gem_dmabuf_vunmap,
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};
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/**
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* amdgpu_gem_prime_export - &drm_driver.gem_prime_export implementation
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* @dev: DRM device
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* @gobj: GEM buffer object
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* @flags: flags like DRM_CLOEXEC and DRM_RDWR
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*
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* The main work is done by the &drm_gem_prime_export helper, which in turn
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* uses &amdgpu_gem_prime_res_obj.
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*
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* Returns:
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* Shared DMA buffer representing the GEM buffer object from the given device.
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*/
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struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
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struct drm_gem_object *gobj,
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int flags)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
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struct dma_buf *buf;
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if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
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bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
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return ERR_PTR(-EPERM);
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buf = drm_gem_prime_export(dev, gobj, flags);
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if (!IS_ERR(buf)) {
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buf->file->f_mapping = dev->anon_inode->i_mapping;
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buf->ops = &amdgpu_dmabuf_ops;
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}
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return buf;
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}
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/**
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* amdgpu_gem_prime_import - &drm_driver.gem_prime_import implementation
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* @dev: DRM device
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* @dma_buf: Shared DMA buffer
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*
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* The main work is done by the &drm_gem_prime_import helper, which in turn
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* uses &amdgpu_gem_prime_import_sg_table.
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*
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* Returns:
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* GEM buffer object representing the shared DMA buffer for the given device.
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*/
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struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
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struct dma_buf *dma_buf)
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{
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struct drm_gem_object *obj;
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if (dma_buf->ops == &amdgpu_dmabuf_ops) {
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obj = dma_buf->priv;
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if (obj->dev == dev) {
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/*
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* Importing dmabuf exported from out own gem increases
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* refcount on gem itself instead of f_count of dmabuf.
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*/
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drm_gem_object_get(obj);
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return obj;
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}
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}
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return drm_gem_prime_import(dev, dma_buf);
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}
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