227 lines
7.1 KiB
C
227 lines
7.1 KiB
C
/*
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* include/asm-xtensa/elf.h
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*
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* ELF register definitions
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_ELF_H
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#define _XTENSA_ELF_H
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#include <asm/ptrace.h>
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/* Xtensa processor ELF architecture-magic number */
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#define EM_XTENSA 94
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#define EM_XTENSA_OLD 0xABC7
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/* ELF register definitions. This is needed for core dump support. */
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/*
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* elf_gregset_t contains the application-level state in the following order:
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* Processor info: config_version, cpuxy
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* Processor state: pc, ps, exccause, excvaddr, wb, ws,
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* lbeg, lend, lcount, sar
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* GP regs: ar0 - arXX
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*/
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typedef unsigned long elf_greg_t;
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typedef struct {
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elf_greg_t xchal_config_id0;
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elf_greg_t xchal_config_id1;
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elf_greg_t cpux;
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elf_greg_t cpuy;
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elf_greg_t pc;
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elf_greg_t ps;
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elf_greg_t exccause;
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elf_greg_t excvaddr;
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elf_greg_t windowbase;
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elf_greg_t windowstart;
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elf_greg_t lbeg;
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elf_greg_t lend;
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elf_greg_t lcount;
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elf_greg_t sar;
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elf_greg_t syscall;
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elf_greg_t ar[64];
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} xtensa_gregset_t;
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#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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/*
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* Compute the size of the coprocessor and extra state layout (register info)
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* table (in bytes).
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* This is actually the maximum size of the table, as opposed to the size,
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* which is available from the _xtensa_reginfo_table_size global variable.
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*
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* (See also arch/xtensa/kernel/coprocessor.S)
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*
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*/
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#ifndef XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM
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# define XTENSA_CPE_LTABLE_SIZE 0
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#else
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# define XTENSA_CPE_SEGMENT(num) (num ? (1+num) : 0)
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# define XTENSA_CPE_LTABLE_ENTRIES \
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( XTENSA_CPE_SEGMENT(XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP0_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP1_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP2_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP3_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP4_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP5_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP6_SA_CONTENTS_LIBDB_NUM) \
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+ XTENSA_CPE_SEGMENT(XCHAL_CP7_SA_CONTENTS_LIBDB_NUM) \
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+ 1 /* final entry */ \
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)
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# define XTENSA_CPE_LTABLE_SIZE (XTENSA_CPE_LTABLE_ENTRIES * 8)
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#endif
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/*
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* Instantiations of the elf_fpregset_t type contain, in most
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* architectures, the floating point (FPU) register set.
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* For Xtensa, this type is extended to contain all custom state,
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* ie. coprocessor and "extra" (non-coprocessor) state (including,
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* for example, TIE-defined states and register files; as well
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* as other optional processor state).
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* This includes FPU state if a floating-point coprocessor happens
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* to have been configured within the Xtensa processor.
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*
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* TOTAL_FPREGS_SIZE is the required size (without rounding)
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* of elf_fpregset_t. It provides space for the following:
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*
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* a) 32-bit mask of active coprocessors for this task (similar
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* to CPENABLE in single-threaded Xtensa processor systems)
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*
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* b) table describing the layout of custom states (ie. of
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* individual registers, etc) within the save areas
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*
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* c) save areas for each coprocessor and for non-coprocessor
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* ("extra") state
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*
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* Note that save areas may require up to 16-byte alignment when
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* accessed by save/restore sequences. We do not need to ensure
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* such alignment in an elf_fpregset_t structure because custom
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* state is not directly loaded/stored into it; rather, save area
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* contents are copied to elf_fpregset_t from the active save areas
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* (see 'struct task_struct' definition in processor.h for that)
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* using memcpy(). But we do allow space for such alignment,
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* to allow optimizations of layout and copying.
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*/
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#if 0
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#define TOTAL_FPREGS_SIZE \
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(4 + XTENSA_CPE_LTABLE_SIZE + XTENSA_CP_EXTRA_SIZE)
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#define ELF_NFPREG \
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((TOTAL_FPREGS_SIZE + sizeof(elf_fpreg_t) - 1) / sizeof(elf_fpreg_t))
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#else
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#define TOTAL_FPREGS_SIZE 0
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#define ELF_NFPREG 0
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#endif
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typedef unsigned int elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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#define ELF_CORE_COPY_REGS(_eregs, _pregs) \
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xtensa_elf_core_copy_regs (&_eregs, _pregs);
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extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \
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( (x)->e_machine == EM_XTENSA_OLD ) )
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/*
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* These are used to set parameters in the core dumps.
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*/
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#ifdef __XTENSA_EL__
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# define ELF_DATA ELFDATA2LSB
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#elif defined(__XTENSA_EB__)
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# define ELF_DATA ELFDATA2MSB
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#else
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# error processor byte order undefined!
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#endif
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#define ELF_CLASS ELFCLASS32
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#define ELF_ARCH EM_XTENSA
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/*
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* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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* use of this is to invoke "./ld.so someprog" to test out a new version of
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* the loader. We need to make sure that it is out of the way of the program
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* that it will "exec", and that there is sufficient room for the brk.
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*/
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#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this CPU supports. This could be done in user space,
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* but it's not easy, and we've already done it here.
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*/
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#define ELF_HWCAP (0)
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/*
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* This yields a string that ld.so will use to load implementation
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* specific libraries for optimization. This is more specific in
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* intent than poking at uname or /proc/cpuinfo.
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* For the moment, we have only optimizations for the Intel generations,
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* but that could change...
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*/
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#define ELF_PLATFORM (NULL)
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/*
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* The Xtensa processor ABI says that when the program starts, a2
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* contains a pointer to a function which might be registered using
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* `atexit'. This provides a mean for the dynamic linker to call
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* DT_FINI functions for shared libraries that have been loaded before
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* the code runs.
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*
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* A value of 0 tells we have no such handler.
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*
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* We might as well make sure everything else is cleared too (except
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* for the stack pointer in a1), just to make things more
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* deterministic. Also, clearing a0 terminates debugger backtraces.
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*/
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#define ELF_PLAT_INIT(_r, load_addr) \
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do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
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_r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
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_r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
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_r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
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} while (0)
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#ifdef __KERNEL__
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#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
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struct task_struct;
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extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
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struct task_struct*);
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extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
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struct task_struct*);
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extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
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struct task_struct*);
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extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
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struct task_struct*);
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_ELF_H */
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