154 lines
4.1 KiB
C
154 lines
4.1 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
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* Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/clksrc-dbx500-prcmu.h>
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#include <linux/sys_soc.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/stat.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/platform_data/clk-ux500.h>
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#include <linux/platform_data/arm-ux500-pm.h>
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#include <asm/mach/map.h>
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#include "setup.h"
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#include "board-mop500.h"
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#include "db8500-regs.h"
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#include "id.h"
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void ux500_restart(enum reboot_mode mode, const char *cmd)
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{
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local_irq_disable();
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local_fiq_disable();
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prcmu_system_reset(0);
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}
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/*
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* FIXME: Should we set up the GPIO domain here?
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*
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* The problem is that we cannot put the interrupt resources into the platform
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* device until the irqdomain has been added. Right now, we set the GIC interrupt
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* domain from init_irq(), then load the gpio driver from
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* core_initcall(nmk_gpio_init) and add the platform devices from
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* arch_initcall(customize_machine).
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*
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* This feels fragile because it depends on the gpio device getting probed
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* _before_ any device uses the gpio interrupts.
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*/
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void __init ux500_init_irq(void)
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{
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gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
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irqchip_init();
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/*
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* Init clocks here so that they are available for system timer
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* initialization.
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*/
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if (cpu_is_u8500_family()) {
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prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
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ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
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u8500_of_clk_init(U8500_CLKRST1_BASE,
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U8500_CLKRST2_BASE,
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U8500_CLKRST3_BASE,
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U8500_CLKRST5_BASE,
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U8500_CLKRST6_BASE);
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} else if (cpu_is_u9540()) {
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prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
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ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
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u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
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U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
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U8500_CLKRST6_BASE);
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} else if (cpu_is_u8540()) {
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prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
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ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
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u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
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U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
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U8500_CLKRST6_BASE);
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}
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}
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static const char * __init ux500_get_machine(void)
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{
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return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
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}
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static const char * __init ux500_get_family(void)
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{
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return kasprintf(GFP_KERNEL, "ux500");
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}
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static const char * __init ux500_get_revision(void)
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{
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unsigned int rev = dbx500_revision();
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if (rev == 0x01)
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return kasprintf(GFP_KERNEL, "%s", "ED");
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else if (rev >= 0xA0)
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return kasprintf(GFP_KERNEL, "%d.%d",
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(rev >> 4) - 0xA + 1, rev & 0xf);
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return kasprintf(GFP_KERNEL, "%s", "Unknown");
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}
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static ssize_t ux500_get_process(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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if (dbx500_id.process == 0x00)
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return sprintf(buf, "Standard\n");
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return sprintf(buf, "%02xnm\n", dbx500_id.process);
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}
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static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr,
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const char *soc_id)
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{
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soc_dev_attr->soc_id = soc_id;
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soc_dev_attr->machine = ux500_get_machine();
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soc_dev_attr->family = ux500_get_family();
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soc_dev_attr->revision = ux500_get_revision();
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}
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struct device_attribute ux500_soc_attr =
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__ATTR(process, S_IRUGO, ux500_get_process, NULL);
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struct device * __init ux500_soc_device_init(const char *soc_id)
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{
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struct device *parent;
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struct soc_device *soc_dev;
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struct soc_device_attribute *soc_dev_attr;
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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return ERR_PTR(-ENOMEM);
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soc_info_populate(soc_dev_attr, soc_id);
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr);
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return NULL;
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}
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parent = soc_device_to_device(soc_dev);
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device_create_file(parent, &ux500_soc_attr);
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return parent;
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}
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