OpenCloudOS-Kernel/drivers/cxl
Ira Weiny 07d62eac42 cxl/pci: Introduce cxl_decode_register_block()
Each register block located in the DVSEC needs to be decoded from 2
words, 'register offset high' and 'register offset low'.

Create a function, cxl_decode_register_block() to perform this decode
and return the bar, offset, and register type of the register block.

Then use the values decoded in cxl_mem_map_regblock() instead of passing
the raw registers.

Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/20210528004922.3980613-2-ira.weiny@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2021-06-05 17:24:04 -07:00
..
Kconfig cxl: Rename mem to pci 2021-05-26 11:19:05 -07:00
Makefile cxl: Rename mem to pci 2021-05-26 11:19:05 -07:00
core.c cxl/mem: Demarcate vendor specific capability IDs 2021-05-26 11:20:17 -07:00
cxl.h cxl/core: Refactor CXL register lookup for bridge reuse 2021-05-14 16:13:19 -07:00
mem.h cxl/mem: Get rid of @cxlm.base 2021-05-26 11:20:18 -07:00
pci.c cxl/pci: Introduce cxl_decode_register_block() 2021-06-05 17:24:04 -07:00
pci.h cxl/mem: Find device capabilities 2021-02-16 20:36:38 -08:00