765 lines
17 KiB
C
765 lines
17 KiB
C
/*
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* Copyright 2014 Cisco Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/if_ether.h>
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#include <linux/slab.h>
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#include "vnic_resource.h"
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#include "vnic_devcmd.h"
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#include "vnic_dev.h"
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#include "vnic_stats.h"
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#include "vnic_wq.h"
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#define VNIC_DVCMD_TMO 10000 /* Devcmd Timeout value */
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#define VNIC_NOTIFY_INTR_MASK 0x0000ffff00000000ULL
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struct devcmd2_controller {
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struct vnic_wq_ctrl __iomem *wq_ctrl;
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struct vnic_dev_ring results_ring;
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struct vnic_wq wq;
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struct vnic_devcmd2 *cmd_ring;
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struct devcmd2_result *result;
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u16 next_result;
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u16 result_size;
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int color;
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};
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struct vnic_res {
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void __iomem *vaddr;
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unsigned int count;
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};
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struct vnic_dev {
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void *priv;
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struct pci_dev *pdev;
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struct vnic_res res[RES_TYPE_MAX];
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enum vnic_dev_intr_mode intr_mode;
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struct vnic_devcmd __iomem *devcmd;
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struct vnic_devcmd_notify *notify;
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struct vnic_devcmd_notify notify_copy;
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dma_addr_t notify_pa;
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u32 *linkstatus;
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dma_addr_t linkstatus_pa;
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struct vnic_stats *stats;
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dma_addr_t stats_pa;
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struct vnic_devcmd_fw_info *fw_info;
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dma_addr_t fw_info_pa;
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u64 args[VNIC_DEVCMD_NARGS];
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struct devcmd2_controller *devcmd2;
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int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
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int wait);
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};
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#define VNIC_MAX_RES_HDR_SIZE \
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(sizeof(struct vnic_resource_header) + \
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sizeof(struct vnic_resource) * RES_TYPE_MAX)
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#define VNIC_RES_STRIDE 128
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void *svnic_dev_priv(struct vnic_dev *vdev)
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{
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return vdev->priv;
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}
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static int vnic_dev_discover_res(struct vnic_dev *vdev,
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struct vnic_dev_bar *bar, unsigned int num_bars)
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{
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struct vnic_resource_header __iomem *rh;
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struct vnic_resource __iomem *r;
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u8 type;
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if (num_bars == 0)
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return -EINVAL;
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if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
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pr_err("vNIC BAR0 res hdr length error\n");
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return -EINVAL;
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}
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rh = bar->vaddr;
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if (!rh) {
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pr_err("vNIC BAR0 res hdr not mem-mapped\n");
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return -EINVAL;
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}
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if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
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ioread32(&rh->version) != VNIC_RES_VERSION) {
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pr_err("vNIC BAR0 res magic/version error exp (%lx/%lx) curr (%x/%x)\n",
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VNIC_RES_MAGIC, VNIC_RES_VERSION,
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ioread32(&rh->magic), ioread32(&rh->version));
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return -EINVAL;
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}
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r = (struct vnic_resource __iomem *)(rh + 1);
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while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
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u8 bar_num = ioread8(&r->bar);
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u32 bar_offset = ioread32(&r->bar_offset);
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u32 count = ioread32(&r->count);
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u32 len;
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r++;
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if (bar_num >= num_bars)
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continue;
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if (!bar[bar_num].len || !bar[bar_num].vaddr)
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continue;
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switch (type) {
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case RES_TYPE_WQ:
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case RES_TYPE_RQ:
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case RES_TYPE_CQ:
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case RES_TYPE_INTR_CTRL:
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/* each count is stride bytes long */
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len = count * VNIC_RES_STRIDE;
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if (len + bar_offset > bar->len) {
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pr_err("vNIC BAR0 resource %d out-of-bounds, offset 0x%x + size 0x%x > bar len 0x%lx\n",
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type, bar_offset,
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len,
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bar->len);
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return -EINVAL;
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}
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break;
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case RES_TYPE_INTR_PBA_LEGACY:
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case RES_TYPE_DEVCMD:
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case RES_TYPE_DEVCMD2:
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len = count;
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break;
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default:
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continue;
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}
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vdev->res[type].count = count;
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vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
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}
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return 0;
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}
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unsigned int svnic_dev_get_res_count(struct vnic_dev *vdev,
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enum vnic_res_type type)
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{
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return vdev->res[type].count;
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}
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void __iomem *svnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
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unsigned int index)
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{
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if (!vdev->res[type].vaddr)
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return NULL;
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switch (type) {
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case RES_TYPE_WQ:
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case RES_TYPE_RQ:
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case RES_TYPE_CQ:
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case RES_TYPE_INTR_CTRL:
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return (char __iomem *)vdev->res[type].vaddr +
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index * VNIC_RES_STRIDE;
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default:
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return (char __iomem *)vdev->res[type].vaddr;
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}
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}
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unsigned int svnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
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unsigned int desc_count,
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unsigned int desc_size)
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{
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/* The base address of the desc rings must be 512 byte aligned.
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* Descriptor count is aligned to groups of 32 descriptors. A
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* count of 0 means the maximum 4096 descriptors. Descriptor
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* size is aligned to 16 bytes.
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*/
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unsigned int count_align = 32;
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unsigned int desc_align = 16;
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ring->base_align = 512;
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if (desc_count == 0)
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desc_count = 4096;
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ring->desc_count = ALIGN(desc_count, count_align);
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ring->desc_size = ALIGN(desc_size, desc_align);
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ring->size = ring->desc_count * ring->desc_size;
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ring->size_unaligned = ring->size + ring->base_align;
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return ring->size_unaligned;
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}
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void svnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
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{
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memset(ring->descs, 0, ring->size);
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}
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int svnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
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unsigned int desc_count, unsigned int desc_size)
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{
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svnic_dev_desc_ring_size(ring, desc_count, desc_size);
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ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
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ring->size_unaligned,
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&ring->base_addr_unaligned);
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if (!ring->descs_unaligned) {
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pr_err("Failed to allocate ring (size=%d), aborting\n",
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(int)ring->size);
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return -ENOMEM;
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}
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ring->base_addr = ALIGN(ring->base_addr_unaligned,
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ring->base_align);
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ring->descs = (u8 *)ring->descs_unaligned +
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(ring->base_addr - ring->base_addr_unaligned);
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svnic_dev_clear_desc_ring(ring);
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ring->desc_avail = ring->desc_count - 1;
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return 0;
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}
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void svnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
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{
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if (ring->descs) {
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pci_free_consistent(vdev->pdev,
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ring->size_unaligned,
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ring->descs_unaligned,
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ring->base_addr_unaligned);
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ring->descs = NULL;
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}
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}
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static int _svnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
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int wait)
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{
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struct devcmd2_controller *dc2c = vdev->devcmd2;
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struct devcmd2_result *result = NULL;
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unsigned int i;
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int delay;
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int err;
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u32 posted;
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u32 fetch_idx;
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u32 new_posted;
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u8 color;
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fetch_idx = ioread32(&dc2c->wq_ctrl->fetch_index);
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if (fetch_idx == 0xFFFFFFFF) { /* check for hardware gone */
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/* Hardware surprise removal: return error */
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return -ENODEV;
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}
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posted = ioread32(&dc2c->wq_ctrl->posted_index);
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if (posted == 0xFFFFFFFF) { /* check for hardware gone */
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/* Hardware surprise removal: return error */
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return -ENODEV;
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}
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new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
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if (new_posted == fetch_idx) {
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pr_err("%s: wq is full while issuing devcmd2 command %d, fetch index: %u, posted index: %u\n",
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pci_name(vdev->pdev), _CMD_N(cmd), fetch_idx, posted);
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return -EBUSY;
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}
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dc2c->cmd_ring[posted].cmd = cmd;
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dc2c->cmd_ring[posted].flags = 0;
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if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
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dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
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if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
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for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
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dc2c->cmd_ring[posted].args[i] = vdev->args[i];
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}
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/* Adding write memory barrier prevents compiler and/or CPU
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* reordering, thus avoiding descriptor posting before
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* descriptor is initialized. Otherwise, hardware can read
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* stale descriptor fields.
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*/
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wmb();
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iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
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if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
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return 0;
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result = dc2c->result + dc2c->next_result;
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color = dc2c->color;
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/*
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* Increment next_result, after posting the devcmd, irrespective of
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* devcmd result, and it should be done only once.
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*/
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dc2c->next_result++;
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if (dc2c->next_result == dc2c->result_size) {
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dc2c->next_result = 0;
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dc2c->color = dc2c->color ? 0 : 1;
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}
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for (delay = 0; delay < wait; delay++) {
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udelay(100);
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if (result->color == color) {
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if (result->error) {
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err = (int) result->error;
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if (err != ERR_ECMDUNKNOWN ||
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cmd != CMD_CAPABILITY)
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pr_err("Error %d devcmd %d\n",
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err, _CMD_N(cmd));
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return err;
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}
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if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
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for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
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vdev->args[i] = result->results[i];
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}
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return 0;
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}
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}
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pr_err("Timed out devcmd %d\n", _CMD_N(cmd));
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return -ETIMEDOUT;
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}
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static int svnic_dev_init_devcmd2(struct vnic_dev *vdev)
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{
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struct devcmd2_controller *dc2c = NULL;
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unsigned int fetch_idx;
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int ret;
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void __iomem *p;
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if (vdev->devcmd2)
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return 0;
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p = svnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
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if (!p)
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return -ENODEV;
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dc2c = kzalloc(sizeof(*dc2c), GFP_ATOMIC);
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if (!dc2c)
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return -ENOMEM;
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vdev->devcmd2 = dc2c;
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dc2c->color = 1;
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dc2c->result_size = DEVCMD2_RING_SIZE;
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ret = vnic_wq_devcmd2_alloc(vdev,
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&dc2c->wq,
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DEVCMD2_RING_SIZE,
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DEVCMD2_DESC_SIZE);
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if (ret)
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goto err_free_devcmd2;
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fetch_idx = ioread32(&dc2c->wq.ctrl->fetch_index);
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if (fetch_idx == 0xFFFFFFFF) { /* check for hardware gone */
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/* Hardware surprise removal: reset fetch_index */
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fetch_idx = 0;
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}
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/*
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* Don't change fetch_index ever and
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* set posted_index same as fetch_index
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* when setting up the WQ for devcmd2.
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*/
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vnic_wq_init_start(&dc2c->wq, 0, fetch_idx, fetch_idx, 0, 0);
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svnic_wq_enable(&dc2c->wq);
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ret = svnic_dev_alloc_desc_ring(vdev,
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&dc2c->results_ring,
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DEVCMD2_RING_SIZE,
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DEVCMD2_DESC_SIZE);
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if (ret)
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goto err_free_wq;
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dc2c->result = (struct devcmd2_result *) dc2c->results_ring.descs;
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dc2c->cmd_ring = (struct vnic_devcmd2 *) dc2c->wq.ring.descs;
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dc2c->wq_ctrl = dc2c->wq.ctrl;
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vdev->args[0] = (u64) dc2c->results_ring.base_addr | VNIC_PADDR_TARGET;
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vdev->args[1] = DEVCMD2_RING_SIZE;
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ret = _svnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, VNIC_DVCMD_TMO);
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if (ret < 0)
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goto err_free_desc_ring;
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vdev->devcmd_rtn = &_svnic_dev_cmd2;
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pr_info("DEVCMD2 Initialized.\n");
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return ret;
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err_free_desc_ring:
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svnic_dev_free_desc_ring(vdev, &dc2c->results_ring);
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err_free_wq:
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svnic_wq_disable(&dc2c->wq);
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svnic_wq_free(&dc2c->wq);
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err_free_devcmd2:
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kfree(dc2c);
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vdev->devcmd2 = NULL;
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return ret;
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} /* end of svnic_dev_init_devcmd2 */
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static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
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{
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struct devcmd2_controller *dc2c = vdev->devcmd2;
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vdev->devcmd2 = NULL;
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vdev->devcmd_rtn = NULL;
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svnic_dev_free_desc_ring(vdev, &dc2c->results_ring);
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svnic_wq_disable(&dc2c->wq);
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svnic_wq_free(&dc2c->wq);
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kfree(dc2c);
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}
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int svnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
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u64 *a0, u64 *a1, int wait)
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{
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int err;
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memset(vdev->args, 0, sizeof(vdev->args));
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vdev->args[0] = *a0;
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vdev->args[1] = *a1;
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err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
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*a0 = vdev->args[0];
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*a1 = vdev->args[1];
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return err;
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}
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int svnic_dev_fw_info(struct vnic_dev *vdev,
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struct vnic_devcmd_fw_info **fw_info)
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{
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u64 a0, a1 = 0;
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int wait = VNIC_DVCMD_TMO;
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int err = 0;
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if (!vdev->fw_info) {
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vdev->fw_info = pci_alloc_consistent(vdev->pdev,
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sizeof(struct vnic_devcmd_fw_info),
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&vdev->fw_info_pa);
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if (!vdev->fw_info)
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return -ENOMEM;
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a0 = vdev->fw_info_pa;
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/* only get fw_info once and cache it */
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err = svnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
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}
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*fw_info = vdev->fw_info;
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return err;
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}
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int svnic_dev_spec(struct vnic_dev *vdev, unsigned int offset,
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unsigned int size, void *value)
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{
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u64 a0, a1;
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int wait = VNIC_DVCMD_TMO;
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int err;
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a0 = offset;
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a1 = size;
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err = svnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
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switch (size) {
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case 1:
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*(u8 *)value = (u8)a0;
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break;
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case 2:
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*(u16 *)value = (u16)a0;
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break;
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case 4:
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*(u32 *)value = (u32)a0;
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break;
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case 8:
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*(u64 *)value = a0;
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break;
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default:
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BUG();
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break;
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}
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return err;
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}
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int svnic_dev_stats_clear(struct vnic_dev *vdev)
|
|
{
|
|
u64 a0 = 0, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
return svnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
|
|
}
|
|
|
|
int svnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
|
|
{
|
|
u64 a0, a1;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
if (!vdev->stats) {
|
|
vdev->stats = pci_alloc_consistent(vdev->pdev,
|
|
sizeof(struct vnic_stats), &vdev->stats_pa);
|
|
if (!vdev->stats)
|
|
return -ENOMEM;
|
|
}
|
|
|
|
*stats = vdev->stats;
|
|
a0 = vdev->stats_pa;
|
|
a1 = sizeof(struct vnic_stats);
|
|
|
|
return svnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
|
|
}
|
|
|
|
int svnic_dev_close(struct vnic_dev *vdev)
|
|
{
|
|
u64 a0 = 0, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
return svnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
|
|
}
|
|
|
|
int svnic_dev_enable_wait(struct vnic_dev *vdev)
|
|
{
|
|
u64 a0 = 0, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
int err = 0;
|
|
|
|
err = svnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
|
|
if (err == ERR_ECMDUNKNOWN)
|
|
return svnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
|
|
|
|
return err;
|
|
}
|
|
|
|
int svnic_dev_disable(struct vnic_dev *vdev)
|
|
{
|
|
u64 a0 = 0, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
return svnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
|
|
}
|
|
|
|
int svnic_dev_open(struct vnic_dev *vdev, int arg)
|
|
{
|
|
u64 a0 = (u32)arg, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
return svnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
|
|
}
|
|
|
|
int svnic_dev_open_done(struct vnic_dev *vdev, int *done)
|
|
{
|
|
u64 a0 = 0, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
int err;
|
|
|
|
*done = 0;
|
|
|
|
err = svnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
|
|
if (err)
|
|
return err;
|
|
|
|
*done = (a0 == 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int svnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
|
|
{
|
|
u64 a0, a1;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
if (!vdev->notify) {
|
|
vdev->notify = pci_alloc_consistent(vdev->pdev,
|
|
sizeof(struct vnic_devcmd_notify),
|
|
&vdev->notify_pa);
|
|
if (!vdev->notify)
|
|
return -ENOMEM;
|
|
}
|
|
|
|
a0 = vdev->notify_pa;
|
|
a1 = ((u64)intr << 32) & VNIC_NOTIFY_INTR_MASK;
|
|
a1 += sizeof(struct vnic_devcmd_notify);
|
|
|
|
return svnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
|
|
}
|
|
|
|
void svnic_dev_notify_unset(struct vnic_dev *vdev)
|
|
{
|
|
u64 a0, a1;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
a0 = 0; /* paddr = 0 to unset notify buffer */
|
|
a1 = VNIC_NOTIFY_INTR_MASK; /* intr num = -1 to unreg for intr */
|
|
a1 += sizeof(struct vnic_devcmd_notify);
|
|
|
|
svnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
|
|
}
|
|
|
|
static int vnic_dev_notify_ready(struct vnic_dev *vdev)
|
|
{
|
|
u32 *words;
|
|
unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
|
|
unsigned int i;
|
|
u32 csum;
|
|
|
|
if (!vdev->notify)
|
|
return 0;
|
|
|
|
do {
|
|
csum = 0;
|
|
memcpy(&vdev->notify_copy, vdev->notify,
|
|
sizeof(struct vnic_devcmd_notify));
|
|
words = (u32 *)&vdev->notify_copy;
|
|
for (i = 1; i < nwords; i++)
|
|
csum += words[i];
|
|
} while (csum != words[0]);
|
|
|
|
return 1;
|
|
}
|
|
|
|
int svnic_dev_init(struct vnic_dev *vdev, int arg)
|
|
{
|
|
u64 a0 = (u32)arg, a1 = 0;
|
|
int wait = VNIC_DVCMD_TMO;
|
|
|
|
return svnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
|
|
}
|
|
|
|
int svnic_dev_link_status(struct vnic_dev *vdev)
|
|
{
|
|
if (vdev->linkstatus)
|
|
return *vdev->linkstatus;
|
|
|
|
if (!vnic_dev_notify_ready(vdev))
|
|
return 0;
|
|
|
|
return vdev->notify_copy.link_state;
|
|
}
|
|
|
|
u32 svnic_dev_link_down_cnt(struct vnic_dev *vdev)
|
|
{
|
|
if (!vnic_dev_notify_ready(vdev))
|
|
return 0;
|
|
|
|
return vdev->notify_copy.link_down_cnt;
|
|
}
|
|
|
|
void svnic_dev_set_intr_mode(struct vnic_dev *vdev,
|
|
enum vnic_dev_intr_mode intr_mode)
|
|
{
|
|
vdev->intr_mode = intr_mode;
|
|
}
|
|
|
|
enum vnic_dev_intr_mode svnic_dev_get_intr_mode(struct vnic_dev *vdev)
|
|
{
|
|
return vdev->intr_mode;
|
|
}
|
|
|
|
void svnic_dev_unregister(struct vnic_dev *vdev)
|
|
{
|
|
if (vdev) {
|
|
if (vdev->notify)
|
|
pci_free_consistent(vdev->pdev,
|
|
sizeof(struct vnic_devcmd_notify),
|
|
vdev->notify,
|
|
vdev->notify_pa);
|
|
if (vdev->linkstatus)
|
|
pci_free_consistent(vdev->pdev,
|
|
sizeof(u32),
|
|
vdev->linkstatus,
|
|
vdev->linkstatus_pa);
|
|
if (vdev->stats)
|
|
pci_free_consistent(vdev->pdev,
|
|
sizeof(struct vnic_stats),
|
|
vdev->stats, vdev->stats_pa);
|
|
if (vdev->fw_info)
|
|
pci_free_consistent(vdev->pdev,
|
|
sizeof(struct vnic_devcmd_fw_info),
|
|
vdev->fw_info, vdev->fw_info_pa);
|
|
if (vdev->devcmd2)
|
|
vnic_dev_deinit_devcmd2(vdev);
|
|
kfree(vdev);
|
|
}
|
|
}
|
|
|
|
struct vnic_dev *svnic_dev_alloc_discover(struct vnic_dev *vdev,
|
|
void *priv,
|
|
struct pci_dev *pdev,
|
|
struct vnic_dev_bar *bar,
|
|
unsigned int num_bars)
|
|
{
|
|
if (!vdev) {
|
|
vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
|
|
if (!vdev)
|
|
return NULL;
|
|
}
|
|
|
|
vdev->priv = priv;
|
|
vdev->pdev = pdev;
|
|
|
|
if (vnic_dev_discover_res(vdev, bar, num_bars))
|
|
goto err_out;
|
|
|
|
return vdev;
|
|
|
|
err_out:
|
|
svnic_dev_unregister(vdev);
|
|
|
|
return NULL;
|
|
} /* end of svnic_dev_alloc_discover */
|
|
|
|
/*
|
|
* fallback option is left to keep the interface common for other vnics.
|
|
*/
|
|
int svnic_dev_cmd_init(struct vnic_dev *vdev, int fallback)
|
|
{
|
|
int err = -ENODEV;
|
|
void __iomem *p;
|
|
|
|
p = svnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
|
|
if (p)
|
|
err = svnic_dev_init_devcmd2(vdev);
|
|
else
|
|
pr_err("DEVCMD2 resource not found.\n");
|
|
|
|
return err;
|
|
} /* end of svnic_dev_cmd_init */
|