299 lines
6.6 KiB
C
299 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Edward-JW Yang <edward-jw.yang@mediatek.com>
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*/
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/clkdev.h>
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#include <linux/delay.h>
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#include "clk-mtk.h"
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#include "clk-pllfh.h"
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#include "clk-fhctl.h"
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static DEFINE_SPINLOCK(pllfh_lock);
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inline struct mtk_fh *to_mtk_fh(struct clk_hw *hw)
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{
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struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);
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return container_of(pll, struct mtk_fh, clk_pll);
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}
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static int mtk_fhctl_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);
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struct mtk_fh *fh = to_mtk_fh(hw);
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u32 pcw = 0;
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u32 postdiv;
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mtk_pll_calc_values(pll, &pcw, &postdiv, rate, parent_rate);
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return fh->ops->hopping(fh, pcw, postdiv);
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}
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static const struct clk_ops mtk_pllfh_ops = {
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.is_prepared = mtk_pll_is_prepared,
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.prepare = mtk_pll_prepare,
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.unprepare = mtk_pll_unprepare,
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.recalc_rate = mtk_pll_recalc_rate,
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.round_rate = mtk_pll_round_rate,
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.set_rate = mtk_fhctl_set_rate,
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};
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static struct mtk_pllfh_data *get_pllfh_by_id(struct mtk_pllfh_data *pllfhs,
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int num_fhs, int pll_id)
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{
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int i;
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for (i = 0; i < num_fhs; i++)
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if (pllfhs[i].data.pll_id == pll_id)
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return &pllfhs[i];
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return NULL;
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}
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void fhctl_parse_dt(const u8 *compatible_node, struct mtk_pllfh_data *pllfhs,
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int num_fhs)
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{
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void __iomem *base;
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struct device_node *node;
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u32 num_clocks, pll_id, ssc_rate;
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int offset, i;
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node = of_find_compatible_node(NULL, NULL, compatible_node);
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if (!node) {
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pr_err("cannot find \"%s\"\n", compatible_node);
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return;
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}
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("%s(): ioremap failed\n", __func__);
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goto out_node_put;
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}
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num_clocks = of_clk_get_parent_count(node);
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if (!num_clocks) {
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pr_err("%s(): failed to get clocks property\n", __func__);
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goto err;
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}
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for (i = 0; i < num_clocks; i++) {
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struct mtk_pllfh_data *pllfh;
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offset = i * 2;
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of_property_read_u32_index(node, "clocks", offset + 1, &pll_id);
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of_property_read_u32_index(node,
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"mediatek,hopping-ssc-percent",
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i, &ssc_rate);
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pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll_id);
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if (!pllfh)
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continue;
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pllfh->state.fh_enable = 1;
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pllfh->state.ssc_rate = ssc_rate;
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pllfh->state.base = base;
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}
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out_node_put:
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of_node_put(node);
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return;
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err:
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iounmap(base);
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goto out_node_put;
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}
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EXPORT_SYMBOL_GPL(fhctl_parse_dt);
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static int pllfh_init(struct mtk_fh *fh, struct mtk_pllfh_data *pllfh_data)
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{
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struct fh_pll_regs *regs = &fh->regs;
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const struct fhctl_offset *offset;
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void __iomem *base = pllfh_data->state.base;
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void __iomem *fhx_base = base + pllfh_data->data.fhx_offset;
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offset = fhctl_get_offset_table(pllfh_data->data.fh_ver);
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if (IS_ERR(offset))
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return PTR_ERR(offset);
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regs->reg_hp_en = base + offset->offset_hp_en;
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regs->reg_clk_con = base + offset->offset_clk_con;
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regs->reg_rst_con = base + offset->offset_rst_con;
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regs->reg_slope0 = base + offset->offset_slope0;
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regs->reg_slope1 = base + offset->offset_slope1;
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regs->reg_cfg = fhx_base + offset->offset_cfg;
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regs->reg_updnlmt = fhx_base + offset->offset_updnlmt;
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regs->reg_dds = fhx_base + offset->offset_dds;
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regs->reg_dvfs = fhx_base + offset->offset_dvfs;
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regs->reg_mon = fhx_base + offset->offset_mon;
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fh->pllfh_data = pllfh_data;
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fh->lock = &pllfh_lock;
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fh->ops = fhctl_get_ops();
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return 0;
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}
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static bool fhctl_is_supported_and_enabled(const struct mtk_pllfh_data *pllfh)
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{
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return pllfh && (pllfh->state.fh_enable == 1);
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}
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static struct clk_hw *
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mtk_clk_register_pllfh(const struct mtk_pll_data *pll_data,
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struct mtk_pllfh_data *pllfh_data, void __iomem *base)
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{
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struct clk_hw *hw;
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struct mtk_fh *fh;
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int ret;
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fh = kzalloc(sizeof(*fh), GFP_KERNEL);
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if (!fh)
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return ERR_PTR(-ENOMEM);
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ret = pllfh_init(fh, pllfh_data);
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if (ret) {
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hw = ERR_PTR(ret);
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goto out;
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}
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hw = mtk_clk_register_pll_ops(&fh->clk_pll, pll_data, base,
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&mtk_pllfh_ops);
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if (IS_ERR(hw))
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goto out;
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fhctl_hw_init(fh);
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out:
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if (IS_ERR(hw))
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kfree(fh);
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return hw;
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}
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static void mtk_clk_unregister_pllfh(struct clk_hw *hw)
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{
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struct mtk_fh *fh;
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if (!hw)
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return;
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fh = to_mtk_fh(hw);
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clk_hw_unregister(hw);
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kfree(fh);
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}
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int mtk_clk_register_pllfhs(struct device_node *node,
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const struct mtk_pll_data *plls, int num_plls,
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struct mtk_pllfh_data *pllfhs, int num_fhs,
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struct clk_hw_onecell_data *clk_data)
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{
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void __iomem *base;
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int i;
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struct clk_hw *hw;
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("%s(): ioremap failed\n", __func__);
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return -EINVAL;
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}
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for (i = 0; i < num_plls; i++) {
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const struct mtk_pll_data *pll = &plls[i];
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struct mtk_pllfh_data *pllfh;
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bool use_fhctl;
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pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll->id);
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use_fhctl = fhctl_is_supported_and_enabled(pllfh);
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if (use_fhctl)
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hw = mtk_clk_register_pllfh(pll, pllfh, base);
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else
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hw = mtk_clk_register_pll(pll, base);
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if (IS_ERR(hw)) {
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pr_err("Failed to register %s clk %s: %ld\n",
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use_fhctl ? "fhpll" : "pll", pll->name,
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PTR_ERR(hw));
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goto err;
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}
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clk_data->hws[pll->id] = hw;
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}
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return 0;
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err:
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while (--i >= 0) {
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const struct mtk_pll_data *pll = &plls[i];
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struct mtk_pllfh_data *pllfh;
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bool use_fhctl;
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pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll->id);
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use_fhctl = fhctl_is_supported_and_enabled(pllfh);
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if (use_fhctl)
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mtk_clk_unregister_pllfh(clk_data->hws[pll->id]);
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else
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mtk_clk_unregister_pll(clk_data->hws[pll->id]);
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clk_data->hws[pll->id] = ERR_PTR(-ENOENT);
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}
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iounmap(base);
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return PTR_ERR(hw);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_register_pllfhs);
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void mtk_clk_unregister_pllfhs(const struct mtk_pll_data *plls, int num_plls,
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struct mtk_pllfh_data *pllfhs, int num_fhs,
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struct clk_hw_onecell_data *clk_data)
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{
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void __iomem *base = NULL, *fhctl_base = NULL;
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int i;
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if (!clk_data)
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return;
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for (i = num_plls; i > 0; i--) {
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const struct mtk_pll_data *pll = &plls[i - 1];
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struct mtk_pllfh_data *pllfh;
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bool use_fhctl;
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if (IS_ERR_OR_NULL(clk_data->hws[pll->id]))
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continue;
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pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll->id);
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use_fhctl = fhctl_is_supported_and_enabled(pllfh);
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if (use_fhctl) {
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fhctl_base = pllfh->state.base;
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mtk_clk_unregister_pllfh(clk_data->hws[pll->id]);
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} else {
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base = mtk_clk_pll_get_base(clk_data->hws[pll->id],
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pll);
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mtk_clk_unregister_pll(clk_data->hws[pll->id]);
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}
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clk_data->hws[pll->id] = ERR_PTR(-ENOENT);
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}
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if (fhctl_base)
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iounmap(fhctl_base);
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iounmap(base);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_pllfhs);
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