154 lines
3.8 KiB
C
154 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* hdac_i915.c - routines for sync between HD-A core and i915 display driver
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <sound/core.h>
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#include <sound/hdaudio.h>
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#include <sound/hda_i915.h>
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#include <sound/hda_register.h>
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static struct completion bind_complete;
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#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
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((pci)->device == 0x0c0c) || \
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((pci)->device == 0x0d0c) || \
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((pci)->device == 0x160c))
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/**
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* snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
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* @bus: HDA core bus
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*
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* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
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* depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
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* are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
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* BCLK = CDCLK * M / N
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* The values will be lost when the display power well is disabled and need to
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* be restored to avoid abnormal playback speed.
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*
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* Call this function at initializing and changing power well, as well as
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* at ELD notifier for the hotplug.
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*/
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void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
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{
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struct drm_audio_component *acomp = bus->audio_component;
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struct pci_dev *pci = to_pci_dev(bus->dev);
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int cdclk_freq;
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unsigned int bclk_m, bclk_n;
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if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq)
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return; /* only for i915 binding */
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if (!CONTROLLER_IN_GPU(pci))
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return; /* only HSW/BDW */
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cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
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switch (cdclk_freq) {
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case 337500:
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bclk_m = 16;
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bclk_n = 225;
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break;
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case 450000:
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default: /* default CDCLK 450MHz */
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bclk_m = 4;
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bclk_n = 75;
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break;
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case 540000:
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bclk_m = 4;
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bclk_n = 90;
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break;
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case 675000:
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bclk_m = 8;
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bclk_n = 225;
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break;
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}
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snd_hdac_chip_writew(bus, HSW_EM4, bclk_m);
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snd_hdac_chip_writew(bus, HSW_EM5, bclk_n);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk);
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static int i915_component_master_match(struct device *dev, int subcomponent,
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void *data)
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{
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return !strcmp(dev->driver->name, "i915") &&
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subcomponent == I915_COMPONENT_AUDIO;
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}
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/* check whether intel graphics is present */
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static bool i915_gfx_present(void)
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{
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static const struct pci_device_id ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
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.class = PCI_BASE_CLASS_DISPLAY << 16,
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.class_mask = 0xff << 16 },
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{}
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};
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return pci_dev_present(ids);
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}
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static int i915_master_bind(struct device *dev,
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struct drm_audio_component *acomp)
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{
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complete_all(&bind_complete);
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/* clear audio_ops here as it was needed only for completion call */
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acomp->audio_ops = NULL;
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return 0;
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}
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static const struct drm_audio_component_audio_ops i915_init_ops = {
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.master_bind = i915_master_bind
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};
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/**
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* snd_hdac_i915_init - Initialize i915 audio component
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* @bus: HDA core bus
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*
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* This function is supposed to be used only by a HD-audio controller
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* driver that needs the interaction with i915 graphics.
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*
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* This function initializes and sets up the audio component to communicate
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* with i915 graphics driver.
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*
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* Returns zero for success or a negative error code.
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*/
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int snd_hdac_i915_init(struct hdac_bus *bus)
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{
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struct drm_audio_component *acomp;
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int err;
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if (!i915_gfx_present())
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return -ENODEV;
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init_completion(&bind_complete);
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err = snd_hdac_acomp_init(bus, &i915_init_ops,
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i915_component_master_match,
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sizeof(struct i915_audio_component) - sizeof(*acomp));
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if (err < 0)
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return err;
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acomp = bus->audio_component;
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if (!acomp)
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return -ENODEV;
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if (!acomp->ops) {
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if (!IS_ENABLED(CONFIG_MODULES) ||
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!request_module("i915")) {
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/* 60s timeout */
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wait_for_completion_timeout(&bind_complete,
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msecs_to_jiffies(60 * 1000));
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}
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}
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if (!acomp->ops) {
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dev_info(bus->dev, "couldn't bind with audio component\n");
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snd_hdac_acomp_exit(bus);
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return -ENODEV;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_i915_init);
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