110 lines
3.5 KiB
C
110 lines
3.5 KiB
C
/*
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* This file is part of wl12xx
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*
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* Copyright (c) 1998-2007 Texas Instruments Incorporated
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* Copyright (C) 2008 Nokia Corporation
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*
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* Contact: Kalle Valo <kalle.valo@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __WL12XX_SPI_H__
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#define __WL12XX_SPI_H__
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#include "cmd.h"
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#include "acx.h"
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#include "reg.h"
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#define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
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#define HW_ACCESS_PART0_SIZE_ADDR 0x1FFC0
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#define HW_ACCESS_PART0_START_ADDR 0x1FFC4
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#define HW_ACCESS_PART1_SIZE_ADDR 0x1FFC8
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#define HW_ACCESS_PART1_START_ADDR 0x1FFCC
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#define HW_ACCESS_REGISTER_SIZE 4
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#define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
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#define WSPI_CMD_READ 0x40000000
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#define WSPI_CMD_WRITE 0x00000000
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#define WSPI_CMD_FIXED 0x20000000
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#define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
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#define WSPI_CMD_BYTE_LENGTH_OFFSET 17
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#define WSPI_CMD_BYTE_ADDR 0x0001FFFF
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#define WSPI_INIT_CMD_CRC_LEN 5
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#define WSPI_INIT_CMD_START 0x00
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#define WSPI_INIT_CMD_TX 0x40
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/* the extra bypass bit is sampled by the TNET as '1' */
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#define WSPI_INIT_CMD_BYPASS_BIT 0x80
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#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
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#define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
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#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
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#define WSPI_INIT_CMD_IOD 0x40
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#define WSPI_INIT_CMD_IP 0x20
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#define WSPI_INIT_CMD_CS 0x10
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#define WSPI_INIT_CMD_WS 0x08
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#define WSPI_INIT_CMD_WSPI 0x01
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#define WSPI_INIT_CMD_END 0x01
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#define WSPI_INIT_CMD_LEN 8
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#define TNETWIF_READ_OFFSET_BYTES 8
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#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
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((TNETWIF_READ_OFFSET_BYTES - 4) / sizeof(u32))
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#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
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/* Raw target IO, address is not translated */
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void wl12xx_spi_read(struct wl12xx *wl, int addr, void *buf, size_t len);
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void wl12xx_spi_write(struct wl12xx *wl, int addr, void *buf, size_t len);
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/* Memory target IO, address is tranlated to partition 0 */
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void wl12xx_spi_mem_read(struct wl12xx *wl, int addr, void *buf, size_t len);
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void wl12xx_spi_mem_write(struct wl12xx *wl, int addr, void *buf, size_t len);
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u32 wl12xx_mem_read32(struct wl12xx *wl, int addr);
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void wl12xx_mem_write32(struct wl12xx *wl, int addr, u32 val);
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/* Registers IO */
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u32 wl12xx_reg_read32(struct wl12xx *wl, int addr);
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void wl12xx_reg_write32(struct wl12xx *wl, int addr, u32 val);
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/* INIT and RESET words */
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void wl12xx_spi_reset(struct wl12xx *wl);
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void wl12xx_spi_init(struct wl12xx *wl);
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void wl12xx_set_partition(struct wl12xx *wl,
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u32 part_start, u32 part_size,
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u32 reg_start, u32 reg_size);
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static inline u32 wl12xx_read32(struct wl12xx *wl, int addr)
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{
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u32 response;
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wl12xx_spi_read(wl, addr, &response, sizeof(u32));
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return response;
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}
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static inline void wl12xx_write32(struct wl12xx *wl, int addr, u32 val)
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{
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wl12xx_spi_write(wl, addr, &val, sizeof(u32));
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}
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#endif /* __WL12XX_SPI_H__ */
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