469 lines
12 KiB
C
469 lines
12 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics Co.Ltd
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* Authors:
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* YoungJun Cho <yj44.cho@samsung.com>
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* Eunchul Kim <chulspro.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundationr
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*/
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#include <linux/kernel.h>
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#include <linux/component.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <drm/drmP.h>
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#include <drm/exynos_drm.h>
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#include "regs-rotator.h"
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#include "exynos_drm_drv.h"
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#include "exynos_drm_ipp.h"
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/*
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* Rotator supports image crop/rotator and input/output DMA operations.
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* input DMA reads image data from the memory.
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* output DMA writes image data to memory.
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*/
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#define ROTATOR_AUTOSUSPEND_DELAY 2000
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#define rot_read(offset) readl(rot->regs + (offset))
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#define rot_write(cfg, offset) writel(cfg, rot->regs + (offset))
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enum rot_irq_status {
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ROT_IRQ_STATUS_COMPLETE = 8,
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ROT_IRQ_STATUS_ILLEGAL = 9,
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};
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struct rot_variant {
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const struct exynos_drm_ipp_formats *formats;
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unsigned int num_formats;
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};
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/*
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* A structure of rotator context.
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* @ippdrv: prepare initialization using ippdrv.
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* @regs: memory mapped io registers.
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* @clock: rotator gate clock.
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* @limit_tbl: limitation of rotator.
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* @irq: irq number.
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*/
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struct rot_context {
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struct exynos_drm_ipp ipp;
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struct drm_device *drm_dev;
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struct device *dev;
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void __iomem *regs;
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struct clk *clock;
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const struct exynos_drm_ipp_formats *formats;
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unsigned int num_formats;
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struct exynos_drm_ipp_task *task;
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};
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static void rotator_reg_set_irq(struct rot_context *rot, bool enable)
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{
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u32 val = rot_read(ROT_CONFIG);
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if (enable == true)
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val |= ROT_CONFIG_IRQ;
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else
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val &= ~ROT_CONFIG_IRQ;
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rot_write(val, ROT_CONFIG);
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}
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static enum rot_irq_status rotator_reg_get_irq_status(struct rot_context *rot)
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{
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u32 val = rot_read(ROT_STATUS);
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val = ROT_STATUS_IRQ(val);
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if (val == ROT_STATUS_IRQ_VAL_COMPLETE)
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return ROT_IRQ_STATUS_COMPLETE;
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return ROT_IRQ_STATUS_ILLEGAL;
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}
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static irqreturn_t rotator_irq_handler(int irq, void *arg)
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{
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struct rot_context *rot = arg;
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enum rot_irq_status irq_status;
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u32 val;
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/* Get execution result */
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irq_status = rotator_reg_get_irq_status(rot);
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/* clear status */
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val = rot_read(ROT_STATUS);
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val |= ROT_STATUS_IRQ_PENDING((u32)irq_status);
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rot_write(val, ROT_STATUS);
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if (rot->task) {
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struct exynos_drm_ipp_task *task = rot->task;
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rot->task = NULL;
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pm_runtime_mark_last_busy(rot->dev);
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pm_runtime_put_autosuspend(rot->dev);
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exynos_drm_ipp_task_done(task,
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irq_status == ROT_IRQ_STATUS_COMPLETE ? 0 : -EINVAL);
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}
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return IRQ_HANDLED;
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}
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static void rotator_src_set_fmt(struct rot_context *rot, u32 fmt)
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{
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u32 val;
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val = rot_read(ROT_CONTROL);
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val &= ~ROT_CONTROL_FMT_MASK;
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switch (fmt) {
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case DRM_FORMAT_NV12:
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val |= ROT_CONTROL_FMT_YCBCR420_2P;
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break;
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case DRM_FORMAT_XRGB8888:
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val |= ROT_CONTROL_FMT_RGB888;
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break;
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}
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rot_write(val, ROT_CONTROL);
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}
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static void rotator_src_set_buf(struct rot_context *rot,
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struct exynos_drm_ipp_buffer *buf)
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{
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u32 val;
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/* Set buffer size configuration */
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val = ROT_SET_BUF_SIZE_H(buf->buf.height) |
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ROT_SET_BUF_SIZE_W(buf->buf.pitch[0] / buf->format->cpp[0]);
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rot_write(val, ROT_SRC_BUF_SIZE);
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/* Set crop image position configuration */
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val = ROT_CROP_POS_Y(buf->rect.y) | ROT_CROP_POS_X(buf->rect.x);
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rot_write(val, ROT_SRC_CROP_POS);
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val = ROT_SRC_CROP_SIZE_H(buf->rect.h) |
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ROT_SRC_CROP_SIZE_W(buf->rect.w);
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rot_write(val, ROT_SRC_CROP_SIZE);
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/* Set buffer DMA address */
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rot_write(buf->dma_addr[0], ROT_SRC_BUF_ADDR(0));
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rot_write(buf->dma_addr[1], ROT_SRC_BUF_ADDR(1));
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}
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static void rotator_dst_set_transf(struct rot_context *rot,
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unsigned int rotation)
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{
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u32 val;
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/* Set transform configuration */
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val = rot_read(ROT_CONTROL);
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val &= ~ROT_CONTROL_FLIP_MASK;
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if (rotation & DRM_MODE_REFLECT_X)
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val |= ROT_CONTROL_FLIP_VERTICAL;
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if (rotation & DRM_MODE_REFLECT_Y)
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val |= ROT_CONTROL_FLIP_HORIZONTAL;
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val &= ~ROT_CONTROL_ROT_MASK;
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if (rotation & DRM_MODE_ROTATE_90)
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val |= ROT_CONTROL_ROT_90;
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else if (rotation & DRM_MODE_ROTATE_180)
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val |= ROT_CONTROL_ROT_180;
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else if (rotation & DRM_MODE_ROTATE_270)
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val |= ROT_CONTROL_ROT_270;
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rot_write(val, ROT_CONTROL);
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}
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static void rotator_dst_set_buf(struct rot_context *rot,
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struct exynos_drm_ipp_buffer *buf)
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{
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u32 val;
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/* Set buffer size configuration */
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val = ROT_SET_BUF_SIZE_H(buf->buf.height) |
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ROT_SET_BUF_SIZE_W(buf->buf.pitch[0] / buf->format->cpp[0]);
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rot_write(val, ROT_DST_BUF_SIZE);
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/* Set crop image position configuration */
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val = ROT_CROP_POS_Y(buf->rect.y) | ROT_CROP_POS_X(buf->rect.x);
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rot_write(val, ROT_DST_CROP_POS);
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/* Set buffer DMA address */
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rot_write(buf->dma_addr[0], ROT_DST_BUF_ADDR(0));
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rot_write(buf->dma_addr[1], ROT_DST_BUF_ADDR(1));
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}
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static void rotator_start(struct rot_context *rot)
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{
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u32 val;
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/* Set interrupt enable */
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rotator_reg_set_irq(rot, true);
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val = rot_read(ROT_CONTROL);
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val |= ROT_CONTROL_START;
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rot_write(val, ROT_CONTROL);
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}
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static int rotator_commit(struct exynos_drm_ipp *ipp,
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struct exynos_drm_ipp_task *task)
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{
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struct rot_context *rot =
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container_of(ipp, struct rot_context, ipp);
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pm_runtime_get_sync(rot->dev);
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rot->task = task;
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rotator_src_set_fmt(rot, task->src.buf.fourcc);
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rotator_src_set_buf(rot, &task->src);
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rotator_dst_set_transf(rot, task->transform.rotation);
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rotator_dst_set_buf(rot, &task->dst);
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rotator_start(rot);
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return 0;
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}
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static const struct exynos_drm_ipp_funcs ipp_funcs = {
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.commit = rotator_commit,
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};
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static int rotator_bind(struct device *dev, struct device *master, void *data)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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struct drm_device *drm_dev = data;
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struct exynos_drm_ipp *ipp = &rot->ipp;
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rot->drm_dev = drm_dev;
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exynos_drm_register_dma(drm_dev, dev);
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exynos_drm_ipp_register(drm_dev, ipp, &ipp_funcs,
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DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE,
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rot->formats, rot->num_formats, "rotator");
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dev_info(dev, "The exynos rotator has been probed successfully\n");
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return 0;
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}
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static void rotator_unbind(struct device *dev, struct device *master,
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void *data)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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struct drm_device *drm_dev = data;
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struct exynos_drm_ipp *ipp = &rot->ipp;
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exynos_drm_ipp_unregister(drm_dev, ipp);
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exynos_drm_unregister_dma(rot->drm_dev, rot->dev);
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}
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static const struct component_ops rotator_component_ops = {
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.bind = rotator_bind,
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.unbind = rotator_unbind,
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};
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static int rotator_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *regs_res;
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struct rot_context *rot;
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const struct rot_variant *variant;
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int irq;
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int ret;
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rot = devm_kzalloc(dev, sizeof(*rot), GFP_KERNEL);
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if (!rot)
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return -ENOMEM;
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variant = of_device_get_match_data(dev);
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rot->formats = variant->formats;
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rot->num_formats = variant->num_formats;
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rot->dev = dev;
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regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rot->regs = devm_ioremap_resource(dev, regs_res);
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if (IS_ERR(rot->regs))
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return PTR_ERR(rot->regs);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(dev, "failed to get irq\n");
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return irq;
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}
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ret = devm_request_irq(dev, irq, rotator_irq_handler, 0, dev_name(dev),
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rot);
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if (ret < 0) {
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dev_err(dev, "failed to request irq\n");
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return ret;
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}
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rot->clock = devm_clk_get(dev, "rotator");
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if (IS_ERR(rot->clock)) {
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dev_err(dev, "failed to get clock\n");
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return PTR_ERR(rot->clock);
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}
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pm_runtime_use_autosuspend(dev);
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pm_runtime_set_autosuspend_delay(dev, ROTATOR_AUTOSUSPEND_DELAY);
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pm_runtime_enable(dev);
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platform_set_drvdata(pdev, rot);
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ret = component_add(dev, &rotator_component_ops);
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if (ret)
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goto err_component;
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return 0;
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err_component:
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pm_runtime_dont_use_autosuspend(dev);
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pm_runtime_disable(dev);
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return ret;
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}
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static int rotator_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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component_del(dev, &rotator_component_ops);
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pm_runtime_dont_use_autosuspend(dev);
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pm_runtime_disable(dev);
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return 0;
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}
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#ifdef CONFIG_PM
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static int rotator_runtime_suspend(struct device *dev)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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clk_disable_unprepare(rot->clock);
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return 0;
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}
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static int rotator_runtime_resume(struct device *dev)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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return clk_prepare_enable(rot->clock);
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}
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#endif
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static const struct drm_exynos_ipp_limit rotator_s5pv210_rbg888_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_16K }, .v = { 8, SZ_16K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
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};
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static const struct drm_exynos_ipp_limit rotator_4210_rbg888_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_16K }, .v = { 8, SZ_16K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) },
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};
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static const struct drm_exynos_ipp_limit rotator_4412_rbg888_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) },
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};
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static const struct drm_exynos_ipp_limit rotator_5250_rbg888_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) },
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};
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static const struct drm_exynos_ipp_limit rotator_s5pv210_yuv_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_64K }, .v = { 32, SZ_64K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
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};
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static const struct drm_exynos_ipp_limit rotator_4210_yuv_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_64K }, .v = { 32, SZ_64K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
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};
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static const struct drm_exynos_ipp_limit rotator_4412_yuv_limits[] = {
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{ IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_32K }, .v = { 32, SZ_32K }) },
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{ IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) },
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};
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static const struct exynos_drm_ipp_formats rotator_s5pv210_formats[] = {
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{ IPP_SRCDST_FORMAT(XRGB8888, rotator_s5pv210_rbg888_limits) },
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{ IPP_SRCDST_FORMAT(NV12, rotator_s5pv210_yuv_limits) },
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};
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static const struct exynos_drm_ipp_formats rotator_4210_formats[] = {
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{ IPP_SRCDST_FORMAT(XRGB8888, rotator_4210_rbg888_limits) },
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{ IPP_SRCDST_FORMAT(NV12, rotator_4210_yuv_limits) },
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};
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static const struct exynos_drm_ipp_formats rotator_4412_formats[] = {
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{ IPP_SRCDST_FORMAT(XRGB8888, rotator_4412_rbg888_limits) },
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{ IPP_SRCDST_FORMAT(NV12, rotator_4412_yuv_limits) },
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};
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static const struct exynos_drm_ipp_formats rotator_5250_formats[] = {
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{ IPP_SRCDST_FORMAT(XRGB8888, rotator_5250_rbg888_limits) },
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{ IPP_SRCDST_FORMAT(NV12, rotator_4412_yuv_limits) },
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};
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static const struct rot_variant rotator_s5pv210_data = {
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.formats = rotator_s5pv210_formats,
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.num_formats = ARRAY_SIZE(rotator_s5pv210_formats),
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};
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static const struct rot_variant rotator_4210_data = {
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.formats = rotator_4210_formats,
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.num_formats = ARRAY_SIZE(rotator_4210_formats),
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};
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static const struct rot_variant rotator_4412_data = {
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.formats = rotator_4412_formats,
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.num_formats = ARRAY_SIZE(rotator_4412_formats),
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};
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static const struct rot_variant rotator_5250_data = {
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.formats = rotator_5250_formats,
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.num_formats = ARRAY_SIZE(rotator_5250_formats),
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};
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static const struct of_device_id exynos_rotator_match[] = {
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{
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.compatible = "samsung,s5pv210-rotator",
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.data = &rotator_s5pv210_data,
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}, {
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.compatible = "samsung,exynos4210-rotator",
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.data = &rotator_4210_data,
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}, {
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.compatible = "samsung,exynos4212-rotator",
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.data = &rotator_4412_data,
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}, {
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.compatible = "samsung,exynos5250-rotator",
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.data = &rotator_5250_data,
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}, {
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},
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};
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MODULE_DEVICE_TABLE(of, exynos_rotator_match);
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static const struct dev_pm_ops rotator_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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SET_RUNTIME_PM_OPS(rotator_runtime_suspend, rotator_runtime_resume,
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NULL)
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};
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struct platform_driver rotator_driver = {
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.probe = rotator_probe,
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.remove = rotator_remove,
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.driver = {
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.name = "exynos-rotator",
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.owner = THIS_MODULE,
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.pm = &rotator_pm_ops,
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.of_match_table = exynos_rotator_match,
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},
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};
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