OpenCloudOS-Kernel/drivers/gpu/drm/amd/include/asic_reg/bif
Tom St Denis de2bdb3dcf drm/amd/amdgpu: Introduction of SI registers (v2)
This introduces the SI registers in the amdgpu
driver style.

v2: squash duplicates fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:07 -05:00
..
bif_3_0_d.h drm/amd/amdgpu: Introduction of SI registers (v2) 2016-11-11 10:21:07 -05:00
bif_3_0_sh_mask.h drm/amd/amdgpu: Introduction of SI registers (v2) 2016-11-11 10:21:07 -05:00
bif_4_1_d.h
bif_4_1_sh_mask.h
bif_5_0_d.h drm/amdgpu: add new definition in bif header 2016-07-29 14:37:11 -04:00
bif_5_0_enum.h
bif_5_0_sh_mask.h
bif_5_1_d.h drm/amdgpu: add BIF 5.1 register headers 2015-06-03 21:02:51 -04:00
bif_5_1_enum.h drm/amdgpu: add BIF 5.1 register headers 2015-06-03 21:02:51 -04:00
bif_5_1_sh_mask.h drm/amdgpu: add BIF 5.1 register headers 2015-06-03 21:02:51 -04:00