164 lines
4.5 KiB
Plaintext
164 lines
4.5 KiB
Plaintext
/*
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* Google Veyron Speedy Rev 1+ board device tree source
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*
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* Copyright 2015 Google, Inc
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3288-veyron-chromebook.dtsi"
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#include "cros-ec-sbs.dtsi"
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/ {
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model = "Google Speedy";
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compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
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"google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
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"google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
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"google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
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"google,veyron-speedy", "google,veyron", "rockchip,rk3288";
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panel_regulator: panel-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_enable_h>;
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regulator-name = "panel_regulator";
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vin-supply = <&vcc33_sys>;
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};
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vcc18_lcd: vcc18-lcd {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&avdd_1v8_disp_en>;
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regulator-name = "vcc18_lcd";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc18_wl>;
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};
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backlight_regulator: backlight-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&bl_pwr_en>;
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regulator-name = "backlight_regulator";
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vin-supply = <&vcc33_sys>;
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startup-delay-us = <15000>;
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};
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};
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&cpu_alert0 {
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temperature = <65000>;
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};
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&cpu_alert1 {
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temperature = <70000>;
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};
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&rk808 {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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};
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&sdmmc {
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
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&sdmmc_bus4>;
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};
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&vcc_5v {
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enable-active-high;
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gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&drv_5v>;
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};
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&vcc50_hdmi {
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enable-active-high;
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gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc50_hdmi_en>;
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};
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&pinctrl {
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backlight {
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bl_pwr_en: bl_pwr_en {
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rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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buck-5v {
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drv_5v: drv-5v {
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rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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hdmi {
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vcc50_hdmi_en: vcc50-hdmi-en {
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rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lcd {
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lcd_enable_h: lcd-en {
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rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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avdd_1v8_disp_en: avdd-1v8-disp-en {
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rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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dvs_1: dvs-1 {
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rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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};
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