653 lines
17 KiB
C
653 lines
17 KiB
C
/*
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* Copyright (c) 2008-2009 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "ath9k.h"
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static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
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struct ieee80211_hdr *hdr)
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{
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struct ieee80211_hw *hw = sc->pri_wiphy->hw;
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int i;
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spin_lock_bh(&sc->wiphy_lock);
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for (i = 0; i < sc->num_sec_wiphy; i++) {
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struct ath_wiphy *aphy = sc->sec_wiphy[i];
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if (aphy == NULL)
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continue;
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if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
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== 0) {
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hw = aphy->hw;
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break;
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}
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}
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spin_unlock_bh(&sc->wiphy_lock);
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return hw;
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}
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/*
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* Setup and link descriptors.
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*
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* 11N: we can no longer afford to self link the last descriptor.
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* MAC acknowledges BA status as long as it copies frames to host
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* buffer (or rx fifo). This can incorrectly acknowledge packets
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* to a sender if last desc is self-linked.
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*/
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static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_desc *ds;
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struct sk_buff *skb;
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ATH_RXBUF_RESET(bf);
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ds = bf->bf_desc;
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ds->ds_link = 0; /* link to null */
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ds->ds_data = bf->bf_buf_addr;
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/* virtual addr of the beginning of the buffer. */
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skb = bf->bf_mpdu;
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BUG_ON(skb == NULL);
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ds->ds_vdata = skb->data;
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/*
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* setup rx descriptors. The rx_bufsize here tells the hardware
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* how much data it can DMA to us and that we are prepared
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* to process
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*/
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ath9k_hw_setuprxdesc(ah, ds,
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common->rx_bufsize,
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0);
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if (sc->rx.rxlink == NULL)
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ath9k_hw_putrxbuf(ah, bf->bf_daddr);
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else
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*sc->rx.rxlink = bf->bf_daddr;
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sc->rx.rxlink = &ds->ds_link;
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ath9k_hw_rxena(ah);
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}
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static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
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{
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/* XXX block beacon interrupts */
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ath9k_hw_setantenna(sc->sc_ah, antenna);
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sc->rx.defant = antenna;
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sc->rx.rxotherant = 0;
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}
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static void ath_opmode_init(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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u32 rfilt, mfilt[2];
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/* configure rx filter */
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rfilt = ath_calcrxfilter(sc);
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ath9k_hw_setrxfilter(ah, rfilt);
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/* configure bssid mask */
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if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
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ath_hw_setbssidmask(common);
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/* configure operational mode */
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ath9k_hw_setopmode(ah);
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/* Handle any link-level address change. */
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ath9k_hw_setmac(ah, common->macaddr);
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/* calculate and install multicast filter */
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mfilt[0] = mfilt[1] = ~0;
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ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
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}
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int ath_rx_init(struct ath_softc *sc, int nbufs)
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{
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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struct sk_buff *skb;
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struct ath_buf *bf;
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int error = 0;
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spin_lock_init(&sc->rx.rxflushlock);
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sc->sc_flags &= ~SC_OP_RXFLUSH;
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spin_lock_init(&sc->rx.rxbuflock);
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common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
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min(common->cachelsz, (u16)64));
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ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
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common->cachelsz, common->rx_bufsize);
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/* Initialize rx descriptors */
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error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
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"rx", nbufs, 1);
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if (error != 0) {
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ath_print(common, ATH_DBG_FATAL,
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"failed to allocate rx descriptors: %d\n", error);
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goto err;
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}
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list_for_each_entry(bf, &sc->rx.rxbuf, list) {
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skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
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if (skb == NULL) {
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error = -ENOMEM;
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goto err;
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}
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bf->bf_mpdu = skb;
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bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
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common->rx_bufsize,
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DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(sc->dev,
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bf->bf_buf_addr))) {
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dev_kfree_skb_any(skb);
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bf->bf_mpdu = NULL;
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ath_print(common, ATH_DBG_FATAL,
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"dma_mapping_error() on RX init\n");
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error = -ENOMEM;
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goto err;
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}
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bf->bf_dmacontext = bf->bf_buf_addr;
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}
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sc->rx.rxlink = NULL;
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err:
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if (error)
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ath_rx_cleanup(sc);
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return error;
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}
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void ath_rx_cleanup(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct sk_buff *skb;
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struct ath_buf *bf;
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list_for_each_entry(bf, &sc->rx.rxbuf, list) {
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skb = bf->bf_mpdu;
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if (skb) {
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dma_unmap_single(sc->dev, bf->bf_buf_addr,
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common->rx_bufsize, DMA_FROM_DEVICE);
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dev_kfree_skb(skb);
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}
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}
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if (sc->rx.rxdma.dd_desc_len != 0)
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ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
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}
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/*
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* Calculate the receive filter according to the
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* operating mode and state:
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*
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* o always accept unicast, broadcast, and multicast traffic
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* o maintain current state of phy error reception (the hal
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* may enable phy error frames for noise immunity work)
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* o probe request frames are accepted only when operating in
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* hostap, adhoc, or monitor modes
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* o enable promiscuous mode according to the interface state
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* o accept beacons:
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* - when operating in adhoc mode so the 802.11 layer creates
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* node table entries for peers,
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* - when operating in station mode for collecting rssi data when
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* the station is otherwise quiet, or
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* - when operating as a repeater so we see repeater-sta beacons
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* - when scanning
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*/
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u32 ath_calcrxfilter(struct ath_softc *sc)
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{
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#define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
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u32 rfilt;
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rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
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| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
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| ATH9K_RX_FILTER_MCAST;
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/* If not a STA, enable processing of Probe Requests */
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if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
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rfilt |= ATH9K_RX_FILTER_PROBEREQ;
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/*
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* Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
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* mode interface or when in monitor mode. AP mode does not need this
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* since it receives all in-BSS frames anyway.
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*/
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if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
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(sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
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(sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
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rfilt |= ATH9K_RX_FILTER_PROM;
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if (sc->rx.rxfilter & FIF_CONTROL)
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rfilt |= ATH9K_RX_FILTER_CONTROL;
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if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
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!(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
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rfilt |= ATH9K_RX_FILTER_MYBEACON;
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else
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rfilt |= ATH9K_RX_FILTER_BEACON;
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if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
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AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
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(sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
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(sc->rx.rxfilter & FIF_PSPOLL))
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rfilt |= ATH9K_RX_FILTER_PSPOLL;
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if (conf_is_ht(&sc->hw->conf))
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rfilt |= ATH9K_RX_FILTER_COMP_BAR;
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if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
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/* TODO: only needed if more than one BSSID is in use in
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* station/adhoc mode */
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/* The following may also be needed for other older chips */
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if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
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rfilt |= ATH9K_RX_FILTER_PROM;
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rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
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}
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return rfilt;
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#undef RX_FILTER_PRESERVE
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}
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int ath_startrecv(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_buf *bf, *tbf;
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spin_lock_bh(&sc->rx.rxbuflock);
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if (list_empty(&sc->rx.rxbuf))
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goto start_recv;
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sc->rx.rxlink = NULL;
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list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
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ath_rx_buf_link(sc, bf);
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}
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/* We could have deleted elements so the list may be empty now */
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if (list_empty(&sc->rx.rxbuf))
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goto start_recv;
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bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
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ath9k_hw_putrxbuf(ah, bf->bf_daddr);
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ath9k_hw_rxena(ah);
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start_recv:
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spin_unlock_bh(&sc->rx.rxbuflock);
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ath_opmode_init(sc);
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ath9k_hw_startpcureceive(ah);
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return 0;
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}
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bool ath_stoprecv(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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bool stopped;
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ath9k_hw_stoppcurecv(ah);
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ath9k_hw_setrxfilter(ah, 0);
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stopped = ath9k_hw_stopdmarecv(ah);
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sc->rx.rxlink = NULL;
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return stopped;
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}
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void ath_flushrecv(struct ath_softc *sc)
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{
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spin_lock_bh(&sc->rx.rxflushlock);
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sc->sc_flags |= SC_OP_RXFLUSH;
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ath_rx_tasklet(sc, 1);
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sc->sc_flags &= ~SC_OP_RXFLUSH;
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spin_unlock_bh(&sc->rx.rxflushlock);
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}
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static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
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{
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/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
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struct ieee80211_mgmt *mgmt;
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u8 *pos, *end, id, elen;
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struct ieee80211_tim_ie *tim;
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mgmt = (struct ieee80211_mgmt *)skb->data;
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pos = mgmt->u.beacon.variable;
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end = skb->data + skb->len;
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while (pos + 2 < end) {
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id = *pos++;
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elen = *pos++;
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if (pos + elen > end)
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break;
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if (id == WLAN_EID_TIM) {
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if (elen < sizeof(*tim))
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break;
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tim = (struct ieee80211_tim_ie *) pos;
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if (tim->dtim_count != 0)
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break;
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return tim->bitmap_ctrl & 0x01;
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}
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pos += elen;
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}
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return false;
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}
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static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
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{
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struct ieee80211_mgmt *mgmt;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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if (skb->len < 24 + 8 + 2 + 2)
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return;
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mgmt = (struct ieee80211_mgmt *)skb->data;
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if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
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return; /* not from our current AP */
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sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
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if (sc->ps_flags & PS_BEACON_SYNC) {
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sc->ps_flags &= ~PS_BEACON_SYNC;
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ath_print(common, ATH_DBG_PS,
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"Reconfigure Beacon timers based on "
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"timestamp from the AP\n");
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ath_beacon_config(sc, NULL);
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}
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if (ath_beacon_dtim_pending_cab(skb)) {
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/*
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* Remain awake waiting for buffered broadcast/multicast
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* frames. If the last broadcast/multicast frame is not
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* received properly, the next beacon frame will work as
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* a backup trigger for returning into NETWORK SLEEP state,
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* so we are waiting for it as well.
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*/
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ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
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"buffered broadcast/multicast frame(s)\n");
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sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
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return;
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}
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if (sc->ps_flags & PS_WAIT_FOR_CAB) {
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/*
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* This can happen if a broadcast frame is dropped or the AP
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* fails to send a frame indicating that all CAB frames have
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* been delivered.
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*/
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sc->ps_flags &= ~PS_WAIT_FOR_CAB;
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ath_print(common, ATH_DBG_PS,
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"PS wait for CAB frames timed out\n");
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}
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}
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static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
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{
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struct ieee80211_hdr *hdr;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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hdr = (struct ieee80211_hdr *)skb->data;
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/* Process Beacon and CAB receive in PS state */
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if ((sc->ps_flags & PS_WAIT_FOR_BEACON) &&
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ieee80211_is_beacon(hdr->frame_control))
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ath_rx_ps_beacon(sc, skb);
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else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
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(ieee80211_is_data(hdr->frame_control) ||
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ieee80211_is_action(hdr->frame_control)) &&
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is_multicast_ether_addr(hdr->addr1) &&
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!ieee80211_has_moredata(hdr->frame_control)) {
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/*
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* No more broadcast/multicast frames to be received at this
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* point.
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*/
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sc->ps_flags &= ~PS_WAIT_FOR_CAB;
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ath_print(common, ATH_DBG_PS,
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"All PS CAB frames received, back to sleep\n");
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} else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
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!is_multicast_ether_addr(hdr->addr1) &&
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!ieee80211_has_morefrags(hdr->frame_control)) {
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sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
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ath_print(common, ATH_DBG_PS,
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"Going back to sleep after having received "
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"PS-Poll data (0x%x)\n",
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sc->ps_flags & (PS_WAIT_FOR_BEACON |
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PS_WAIT_FOR_CAB |
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PS_WAIT_FOR_PSPOLL_DATA |
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PS_WAIT_FOR_TX_ACK));
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}
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}
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static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
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struct ath_softc *sc, struct sk_buff *skb,
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struct ieee80211_rx_status *rxs)
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{
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struct ieee80211_hdr *hdr;
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hdr = (struct ieee80211_hdr *)skb->data;
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/* Send the frame to mac80211 */
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if (is_multicast_ether_addr(hdr->addr1)) {
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int i;
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/*
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* Deliver broadcast/multicast frames to all suitable
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* virtual wiphys.
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*/
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/* TODO: filter based on channel configuration */
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for (i = 0; i < sc->num_sec_wiphy; i++) {
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struct ath_wiphy *aphy = sc->sec_wiphy[i];
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struct sk_buff *nskb;
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if (aphy == NULL)
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continue;
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nskb = skb_copy(skb, GFP_ATOMIC);
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if (!nskb)
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continue;
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ieee80211_rx(aphy->hw, nskb);
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}
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ieee80211_rx(sc->hw, skb);
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} else
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/* Deliver unicast frames based on receiver address */
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ieee80211_rx(hw, skb);
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}
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int ath_rx_tasklet(struct ath_softc *sc, int flush)
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{
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#define PA2DESC(_sc, _pa) \
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((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
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((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
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struct ath_buf *bf;
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struct ath_desc *ds;
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struct ath_rx_status *rx_stats;
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struct sk_buff *skb = NULL, *requeue_skb;
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struct ieee80211_rx_status *rxs;
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struct ath_hw *ah = sc->sc_ah;
|
|
struct ath_common *common = ath9k_hw_common(ah);
|
|
/*
|
|
* The hw can techncically differ from common->hw when using ath9k
|
|
* virtual wiphy so to account for that we iterate over the active
|
|
* wiphys and find the appropriate wiphy and therefore hw.
|
|
*/
|
|
struct ieee80211_hw *hw = NULL;
|
|
struct ieee80211_hdr *hdr;
|
|
int retval;
|
|
bool decrypt_error = false;
|
|
|
|
spin_lock_bh(&sc->rx.rxbuflock);
|
|
|
|
do {
|
|
/* If handling rx interrupt and flush is in progress => exit */
|
|
if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
|
|
break;
|
|
|
|
if (list_empty(&sc->rx.rxbuf)) {
|
|
sc->rx.rxlink = NULL;
|
|
break;
|
|
}
|
|
|
|
bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
|
|
ds = bf->bf_desc;
|
|
|
|
/*
|
|
* Must provide the virtual address of the current
|
|
* descriptor, the physical address, and the virtual
|
|
* address of the next descriptor in the h/w chain.
|
|
* This allows the HAL to look ahead to see if the
|
|
* hardware is done with a descriptor by checking the
|
|
* done bit in the following descriptor and the address
|
|
* of the current descriptor the DMA engine is working
|
|
* on. All this is necessary because of our use of
|
|
* a self-linked list to avoid rx overruns.
|
|
*/
|
|
retval = ath9k_hw_rxprocdesc(ah, ds,
|
|
bf->bf_daddr,
|
|
PA2DESC(sc, ds->ds_link),
|
|
0);
|
|
if (retval == -EINPROGRESS) {
|
|
struct ath_buf *tbf;
|
|
struct ath_desc *tds;
|
|
|
|
if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
|
|
sc->rx.rxlink = NULL;
|
|
break;
|
|
}
|
|
|
|
tbf = list_entry(bf->list.next, struct ath_buf, list);
|
|
|
|
/*
|
|
* On some hardware the descriptor status words could
|
|
* get corrupted, including the done bit. Because of
|
|
* this, check if the next descriptor's done bit is
|
|
* set or not.
|
|
*
|
|
* If the next descriptor's done bit is set, the current
|
|
* descriptor has been corrupted. Force s/w to discard
|
|
* this descriptor and continue...
|
|
*/
|
|
|
|
tds = tbf->bf_desc;
|
|
retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
|
|
PA2DESC(sc, tds->ds_link), 0);
|
|
if (retval == -EINPROGRESS) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
skb = bf->bf_mpdu;
|
|
if (!skb)
|
|
continue;
|
|
|
|
/*
|
|
* Synchronize the DMA transfer with CPU before
|
|
* 1. accessing the frame
|
|
* 2. requeueing the same buffer to h/w
|
|
*/
|
|
dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
|
|
common->rx_bufsize,
|
|
DMA_FROM_DEVICE);
|
|
|
|
hdr = (struct ieee80211_hdr *) skb->data;
|
|
rxs = IEEE80211_SKB_RXCB(skb);
|
|
|
|
hw = ath_get_virt_hw(sc, hdr);
|
|
rx_stats = &ds->ds_rxstat;
|
|
|
|
ath_debug_stat_rx(sc, bf);
|
|
|
|
/*
|
|
* If we're asked to flush receive queue, directly
|
|
* chain it back at the queue without processing it.
|
|
*/
|
|
if (flush)
|
|
goto requeue;
|
|
|
|
retval = ath9k_cmn_rx_skb_preprocess(common, hw, skb, rx_stats,
|
|
rxs, &decrypt_error);
|
|
if (retval)
|
|
goto requeue;
|
|
|
|
/* Ensure we always have an skb to requeue once we are done
|
|
* processing the current buffer's skb */
|
|
requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
|
|
|
|
/* If there is no memory we ignore the current RX'd frame,
|
|
* tell hardware it can give us a new frame using the old
|
|
* skb and put it at the tail of the sc->rx.rxbuf list for
|
|
* processing. */
|
|
if (!requeue_skb)
|
|
goto requeue;
|
|
|
|
/* Unmap the frame */
|
|
dma_unmap_single(sc->dev, bf->bf_buf_addr,
|
|
common->rx_bufsize,
|
|
DMA_FROM_DEVICE);
|
|
|
|
skb_put(skb, rx_stats->rs_datalen);
|
|
|
|
ath9k_cmn_rx_skb_postprocess(common, skb, rx_stats,
|
|
rxs, decrypt_error);
|
|
|
|
/* We will now give hardware our shiny new allocated skb */
|
|
bf->bf_mpdu = requeue_skb;
|
|
bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
|
|
common->rx_bufsize,
|
|
DMA_FROM_DEVICE);
|
|
if (unlikely(dma_mapping_error(sc->dev,
|
|
bf->bf_buf_addr))) {
|
|
dev_kfree_skb_any(requeue_skb);
|
|
bf->bf_mpdu = NULL;
|
|
ath_print(common, ATH_DBG_FATAL,
|
|
"dma_mapping_error() on RX\n");
|
|
ath_rx_send_to_mac80211(hw, sc, skb, rxs);
|
|
break;
|
|
}
|
|
bf->bf_dmacontext = bf->bf_buf_addr;
|
|
|
|
/*
|
|
* change the default rx antenna if rx diversity chooses the
|
|
* other antenna 3 times in a row.
|
|
*/
|
|
if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
|
|
if (++sc->rx.rxotherant >= 3)
|
|
ath_setdefantenna(sc, rx_stats->rs_antenna);
|
|
} else {
|
|
sc->rx.rxotherant = 0;
|
|
}
|
|
|
|
if (unlikely(sc->ps_flags & (PS_WAIT_FOR_BEACON |
|
|
PS_WAIT_FOR_CAB |
|
|
PS_WAIT_FOR_PSPOLL_DATA)))
|
|
ath_rx_ps(sc, skb);
|
|
|
|
ath_rx_send_to_mac80211(hw, sc, skb, rxs);
|
|
|
|
requeue:
|
|
list_move_tail(&bf->list, &sc->rx.rxbuf);
|
|
ath_rx_buf_link(sc, bf);
|
|
} while (1);
|
|
|
|
spin_unlock_bh(&sc->rx.rxbuflock);
|
|
|
|
return 0;
|
|
#undef PA2DESC
|
|
}
|