590 lines
16 KiB
C
590 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* NXP AUDMIX ALSA SoC Digital Audio Interface (DAI) driver
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*
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* Copyright 2017 NXP
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include <sound/soc.h>
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#include <sound/pcm_params.h>
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#include "fsl_audmix.h"
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#define SOC_ENUM_SINGLE_S(xreg, xshift, xtexts) \
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SOC_ENUM_SINGLE(xreg, xshift, ARRAY_SIZE(xtexts), xtexts)
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static const char
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*tdm_sel[] = { "TDM1", "TDM2", },
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*mode_sel[] = { "Disabled", "TDM1", "TDM2", "Mixed", },
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*width_sel[] = { "16b", "18b", "20b", "24b", "32b", },
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*endis_sel[] = { "Disabled", "Enabled", },
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*updn_sel[] = { "Downward", "Upward", },
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*mask_sel[] = { "Unmask", "Mask", };
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static const struct soc_enum fsl_audmix_enum[] = {
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/* FSL_AUDMIX_CTR enums */
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_MIXCLK_SHIFT, tdm_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_OUTSRC_SHIFT, mode_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_OUTWIDTH_SHIFT, width_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_MASKRTDF_SHIFT, mask_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_MASKCKDF_SHIFT, mask_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_SYNCMODE_SHIFT, endis_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_CTR, FSL_AUDMIX_CTR_SYNCSRC_SHIFT, tdm_sel),
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/* FSL_AUDMIX_ATCR0 enums */
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR0, 0, endis_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR0, 1, updn_sel),
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/* FSL_AUDMIX_ATCR1 enums */
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR1, 0, endis_sel),
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SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR1, 1, updn_sel),
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};
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struct fsl_audmix_state {
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u8 tdms;
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u8 clk;
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char msg[64];
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};
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static const struct fsl_audmix_state prms[4][4] = {{
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/* DIS->DIS, do nothing */
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{ .tdms = 0, .clk = 0, .msg = "" },
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/* DIS->TDM1*/
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{ .tdms = 1, .clk = 1, .msg = "DIS->TDM1: TDM1 not started!\n" },
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/* DIS->TDM2*/
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{ .tdms = 2, .clk = 2, .msg = "DIS->TDM2: TDM2 not started!\n" },
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/* DIS->MIX */
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{ .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" }
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}, { /* TDM1->DIS */
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{ .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" },
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/* TDM1->TDM1, do nothing */
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{ .tdms = 0, .clk = 0, .msg = "" },
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/* TDM1->TDM2 */
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{ .tdms = 3, .clk = 2, .msg = "TDM1->TDM2: Please start both TDMs!\n" },
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/* TDM1->MIX */
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{ .tdms = 3, .clk = 0, .msg = "TDM1->MIX: Please start both TDMs!\n" }
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}, { /* TDM2->DIS */
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{ .tdms = 2, .clk = 0, .msg = "TDM2->DIS: TDM2 not started!\n" },
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/* TDM2->TDM1 */
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{ .tdms = 3, .clk = 1, .msg = "TDM2->TDM1: Please start both TDMs!\n" },
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/* TDM2->TDM2, do nothing */
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{ .tdms = 0, .clk = 0, .msg = "" },
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/* TDM2->MIX */
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{ .tdms = 3, .clk = 0, .msg = "TDM2->MIX: Please start both TDMs!\n" }
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}, { /* MIX->DIS */
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{ .tdms = 3, .clk = 0, .msg = "MIX->DIS: Please start both TDMs!\n" },
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/* MIX->TDM1 */
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{ .tdms = 3, .clk = 1, .msg = "MIX->TDM1: Please start both TDMs!\n" },
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/* MIX->TDM2 */
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{ .tdms = 3, .clk = 2, .msg = "MIX->TDM2: Please start both TDMs!\n" },
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/* MIX->MIX, do nothing */
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{ .tdms = 0, .clk = 0, .msg = "" }
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}, };
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static int fsl_audmix_state_trans(struct snd_soc_component *comp,
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unsigned int *mask, unsigned int *ctr,
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const struct fsl_audmix_state prm)
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{
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struct fsl_audmix *priv = snd_soc_component_get_drvdata(comp);
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/* Enforce all required TDMs are started */
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if ((priv->tdms & prm.tdms) != prm.tdms) {
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dev_dbg(comp->dev, "%s", prm.msg);
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return -EINVAL;
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}
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switch (prm.clk) {
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case 1:
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case 2:
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/* Set mix clock */
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(*mask) |= FSL_AUDMIX_CTR_MIXCLK_MASK;
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(*ctr) |= FSL_AUDMIX_CTR_MIXCLK(prm.clk - 1);
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break;
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default:
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break;
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}
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return 0;
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}
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static int fsl_audmix_put_mix_clk_src(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol);
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struct fsl_audmix *priv = snd_soc_component_get_drvdata(comp);
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struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
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unsigned int *item = ucontrol->value.enumerated.item;
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unsigned int reg_val, val, mix_clk;
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int ret = 0;
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/* Get current state */
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ret = snd_soc_component_read(comp, FSL_AUDMIX_CTR, ®_val);
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if (ret)
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return ret;
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mix_clk = ((reg_val & FSL_AUDMIX_CTR_MIXCLK_MASK)
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>> FSL_AUDMIX_CTR_MIXCLK_SHIFT);
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val = snd_soc_enum_item_to_val(e, item[0]);
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dev_dbg(comp->dev, "TDMs=x%08x, val=x%08x\n", priv->tdms, val);
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/**
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* Ensure the current selected mixer clock is available
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* for configuration propagation
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*/
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if (!(priv->tdms & BIT(mix_clk))) {
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dev_err(comp->dev,
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"Started TDM%d needed for config propagation!\n",
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mix_clk + 1);
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return -EINVAL;
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}
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if (!(priv->tdms & BIT(val))) {
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dev_err(comp->dev,
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"The selected clock source has no TDM%d enabled!\n",
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val + 1);
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return -EINVAL;
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}
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return snd_soc_put_enum_double(kcontrol, ucontrol);
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}
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static int fsl_audmix_put_out_src(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol);
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struct fsl_audmix *priv = snd_soc_component_get_drvdata(comp);
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struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
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unsigned int *item = ucontrol->value.enumerated.item;
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u32 out_src, mix_clk;
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unsigned int reg_val, val, mask = 0, ctr = 0;
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int ret = 0;
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/* Get current state */
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ret = snd_soc_component_read(comp, FSL_AUDMIX_CTR, ®_val);
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if (ret)
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return ret;
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/* "From" state */
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out_src = ((reg_val & FSL_AUDMIX_CTR_OUTSRC_MASK)
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>> FSL_AUDMIX_CTR_OUTSRC_SHIFT);
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mix_clk = ((reg_val & FSL_AUDMIX_CTR_MIXCLK_MASK)
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>> FSL_AUDMIX_CTR_MIXCLK_SHIFT);
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/* "To" state */
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val = snd_soc_enum_item_to_val(e, item[0]);
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dev_dbg(comp->dev, "TDMs=x%08x, val=x%08x\n", priv->tdms, val);
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/* Check if state is changing ... */
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if (out_src == val)
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return 0;
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/**
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* Ensure the current selected mixer clock is available
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* for configuration propagation
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*/
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if (!(priv->tdms & BIT(mix_clk))) {
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dev_err(comp->dev,
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"Started TDM%d needed for config propagation!\n",
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mix_clk + 1);
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return -EINVAL;
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}
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/* Check state transition constraints */
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ret = fsl_audmix_state_trans(comp, &mask, &ctr, prms[out_src][val]);
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if (ret)
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return ret;
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/* Complete transition to new state */
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mask |= FSL_AUDMIX_CTR_OUTSRC_MASK;
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ctr |= FSL_AUDMIX_CTR_OUTSRC(val);
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return snd_soc_component_update_bits(comp, FSL_AUDMIX_CTR, mask, ctr);
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}
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static const struct snd_kcontrol_new fsl_audmix_snd_controls[] = {
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/* FSL_AUDMIX_CTR controls */
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SOC_ENUM_EXT("Mixing Clock Source", fsl_audmix_enum[0],
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snd_soc_get_enum_double, fsl_audmix_put_mix_clk_src),
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SOC_ENUM_EXT("Output Source", fsl_audmix_enum[1],
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snd_soc_get_enum_double, fsl_audmix_put_out_src),
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SOC_ENUM("Output Width", fsl_audmix_enum[2]),
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SOC_ENUM("Frame Rate Diff Error", fsl_audmix_enum[3]),
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SOC_ENUM("Clock Freq Diff Error", fsl_audmix_enum[4]),
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SOC_ENUM("Sync Mode Config", fsl_audmix_enum[5]),
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SOC_ENUM("Sync Mode Clk Source", fsl_audmix_enum[6]),
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/* TDM1 Attenuation controls */
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SOC_ENUM("TDM1 Attenuation", fsl_audmix_enum[7]),
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SOC_ENUM("TDM1 Attenuation Direction", fsl_audmix_enum[8]),
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SOC_SINGLE("TDM1 Attenuation Step Divider", FSL_AUDMIX_ATCR0,
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2, 0x00fff, 0),
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SOC_SINGLE("TDM1 Attenuation Initial Value", FSL_AUDMIX_ATIVAL0,
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0, 0x3ffff, 0),
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SOC_SINGLE("TDM1 Attenuation Step Up Factor", FSL_AUDMIX_ATSTPUP0,
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0, 0x3ffff, 0),
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SOC_SINGLE("TDM1 Attenuation Step Down Factor", FSL_AUDMIX_ATSTPDN0,
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0, 0x3ffff, 0),
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SOC_SINGLE("TDM1 Attenuation Step Target", FSL_AUDMIX_ATSTPTGT0,
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0, 0x3ffff, 0),
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/* TDM2 Attenuation controls */
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SOC_ENUM("TDM2 Attenuation", fsl_audmix_enum[9]),
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SOC_ENUM("TDM2 Attenuation Direction", fsl_audmix_enum[10]),
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SOC_SINGLE("TDM2 Attenuation Step Divider", FSL_AUDMIX_ATCR1,
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2, 0x00fff, 0),
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SOC_SINGLE("TDM2 Attenuation Initial Value", FSL_AUDMIX_ATIVAL1,
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0, 0x3ffff, 0),
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SOC_SINGLE("TDM2 Attenuation Step Up Factor", FSL_AUDMIX_ATSTPUP1,
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0, 0x3ffff, 0),
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SOC_SINGLE("TDM2 Attenuation Step Down Factor", FSL_AUDMIX_ATSTPDN1,
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0, 0x3ffff, 0),
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SOC_SINGLE("TDM2 Attenuation Step Target", FSL_AUDMIX_ATSTPTGT1,
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0, 0x3ffff, 0),
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};
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static int fsl_audmix_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_component *comp = dai->component;
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u32 mask = 0, ctr = 0;
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/* AUDMIX is working in DSP_A format only */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_A:
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break;
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default:
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return -EINVAL;
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}
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/* For playback the AUDMIX is slave, and for record is master */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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case SND_SOC_DAIFMT_CBS_CFS:
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_IB_NF:
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/* Output data will be written on positive edge of the clock */
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ctr |= FSL_AUDMIX_CTR_OUTCKPOL(0);
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break;
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case SND_SOC_DAIFMT_NB_NF:
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/* Output data will be written on negative edge of the clock */
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ctr |= FSL_AUDMIX_CTR_OUTCKPOL(1);
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break;
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default:
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return -EINVAL;
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}
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mask |= FSL_AUDMIX_CTR_OUTCKPOL_MASK;
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return snd_soc_component_update_bits(comp, FSL_AUDMIX_CTR, mask, ctr);
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}
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static int fsl_audmix_dai_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct fsl_audmix *priv = snd_soc_dai_get_drvdata(dai);
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unsigned long lock_flags;
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/* Capture stream shall not be handled */
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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return 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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spin_lock_irqsave(&priv->lock, lock_flags);
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priv->tdms |= BIT(dai->driver->id);
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spin_unlock_irqrestore(&priv->lock, lock_flags);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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spin_lock_irqsave(&priv->lock, lock_flags);
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priv->tdms &= ~BIT(dai->driver->id);
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spin_unlock_irqrestore(&priv->lock, lock_flags);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static const struct snd_soc_dai_ops fsl_audmix_dai_ops = {
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.set_fmt = fsl_audmix_dai_set_fmt,
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.trigger = fsl_audmix_dai_trigger,
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};
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static struct snd_soc_dai_driver fsl_audmix_dai[] = {
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{
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.id = 0,
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.name = "audmix-0",
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.playback = {
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.stream_name = "AUDMIX-Playback-0",
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.channels_min = 8,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = FSL_AUDMIX_FORMATS,
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},
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.capture = {
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.stream_name = "AUDMIX-Capture-0",
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.channels_min = 8,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = FSL_AUDMIX_FORMATS,
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},
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.ops = &fsl_audmix_dai_ops,
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},
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{
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.id = 1,
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.name = "audmix-1",
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.playback = {
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.stream_name = "AUDMIX-Playback-1",
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.channels_min = 8,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = FSL_AUDMIX_FORMATS,
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},
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.capture = {
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.stream_name = "AUDMIX-Capture-1",
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.channels_min = 8,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = FSL_AUDMIX_FORMATS,
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},
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.ops = &fsl_audmix_dai_ops,
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},
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};
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static const struct snd_soc_component_driver fsl_audmix_component = {
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.name = "fsl-audmix-dai",
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.controls = fsl_audmix_snd_controls,
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.num_controls = ARRAY_SIZE(fsl_audmix_snd_controls),
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};
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static bool fsl_audmix_readable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case FSL_AUDMIX_CTR:
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case FSL_AUDMIX_STR:
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case FSL_AUDMIX_ATCR0:
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case FSL_AUDMIX_ATIVAL0:
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case FSL_AUDMIX_ATSTPUP0:
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case FSL_AUDMIX_ATSTPDN0:
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case FSL_AUDMIX_ATSTPTGT0:
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case FSL_AUDMIX_ATTNVAL0:
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case FSL_AUDMIX_ATSTP0:
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case FSL_AUDMIX_ATCR1:
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case FSL_AUDMIX_ATIVAL1:
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case FSL_AUDMIX_ATSTPUP1:
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case FSL_AUDMIX_ATSTPDN1:
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case FSL_AUDMIX_ATSTPTGT1:
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case FSL_AUDMIX_ATTNVAL1:
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case FSL_AUDMIX_ATSTP1:
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return true;
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default:
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return false;
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}
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}
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static bool fsl_audmix_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case FSL_AUDMIX_CTR:
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case FSL_AUDMIX_ATCR0:
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case FSL_AUDMIX_ATIVAL0:
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case FSL_AUDMIX_ATSTPUP0:
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case FSL_AUDMIX_ATSTPDN0:
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case FSL_AUDMIX_ATSTPTGT0:
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case FSL_AUDMIX_ATCR1:
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case FSL_AUDMIX_ATIVAL1:
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case FSL_AUDMIX_ATSTPUP1:
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case FSL_AUDMIX_ATSTPDN1:
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case FSL_AUDMIX_ATSTPTGT1:
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return true;
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default:
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return false;
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}
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}
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static const struct reg_default fsl_audmix_reg[] = {
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{ FSL_AUDMIX_CTR, 0x00060 },
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{ FSL_AUDMIX_STR, 0x00003 },
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{ FSL_AUDMIX_ATCR0, 0x00000 },
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{ FSL_AUDMIX_ATIVAL0, 0x3FFFF },
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{ FSL_AUDMIX_ATSTPUP0, 0x2AAAA },
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{ FSL_AUDMIX_ATSTPDN0, 0x30000 },
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{ FSL_AUDMIX_ATSTPTGT0, 0x00010 },
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{ FSL_AUDMIX_ATTNVAL0, 0x00000 },
|
|
{ FSL_AUDMIX_ATSTP0, 0x00000 },
|
|
{ FSL_AUDMIX_ATCR1, 0x00000 },
|
|
{ FSL_AUDMIX_ATIVAL1, 0x3FFFF },
|
|
{ FSL_AUDMIX_ATSTPUP1, 0x2AAAA },
|
|
{ FSL_AUDMIX_ATSTPDN1, 0x30000 },
|
|
{ FSL_AUDMIX_ATSTPTGT1, 0x00010 },
|
|
{ FSL_AUDMIX_ATTNVAL1, 0x00000 },
|
|
{ FSL_AUDMIX_ATSTP1, 0x00000 },
|
|
};
|
|
|
|
static const struct regmap_config fsl_audmix_regmap_config = {
|
|
.reg_bits = 32,
|
|
.reg_stride = 4,
|
|
.val_bits = 32,
|
|
.max_register = FSL_AUDMIX_ATSTP1,
|
|
.reg_defaults = fsl_audmix_reg,
|
|
.num_reg_defaults = ARRAY_SIZE(fsl_audmix_reg),
|
|
.readable_reg = fsl_audmix_readable_reg,
|
|
.writeable_reg = fsl_audmix_writeable_reg,
|
|
.cache_type = REGCACHE_FLAT,
|
|
};
|
|
|
|
static const struct of_device_id fsl_audmix_ids[] = {
|
|
{
|
|
.compatible = "fsl,imx8qm-audmix",
|
|
.data = "imx-audmix",
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, fsl_audmix_ids);
|
|
|
|
static int fsl_audmix_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct fsl_audmix *priv;
|
|
const char *mdrv;
|
|
const struct of_device_id *of_id;
|
|
void __iomem *regs;
|
|
int ret;
|
|
|
|
of_id = of_match_device(fsl_audmix_ids, dev);
|
|
if (!of_id || !of_id->data)
|
|
return -EINVAL;
|
|
|
|
mdrv = of_id->data;
|
|
|
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
|
if (!priv)
|
|
return -ENOMEM;
|
|
|
|
/* Get the addresses */
|
|
regs = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(regs))
|
|
return PTR_ERR(regs);
|
|
|
|
priv->regmap = devm_regmap_init_mmio_clk(dev, "ipg", regs,
|
|
&fsl_audmix_regmap_config);
|
|
if (IS_ERR(priv->regmap)) {
|
|
dev_err(dev, "failed to init regmap\n");
|
|
return PTR_ERR(priv->regmap);
|
|
}
|
|
|
|
priv->ipg_clk = devm_clk_get(dev, "ipg");
|
|
if (IS_ERR(priv->ipg_clk)) {
|
|
dev_err(dev, "failed to get ipg clock\n");
|
|
return PTR_ERR(priv->ipg_clk);
|
|
}
|
|
|
|
spin_lock_init(&priv->lock);
|
|
platform_set_drvdata(pdev, priv);
|
|
pm_runtime_enable(dev);
|
|
|
|
ret = devm_snd_soc_register_component(dev, &fsl_audmix_component,
|
|
fsl_audmix_dai,
|
|
ARRAY_SIZE(fsl_audmix_dai));
|
|
if (ret) {
|
|
dev_err(dev, "failed to register ASoC DAI\n");
|
|
goto err_disable_pm;
|
|
}
|
|
|
|
priv->pdev = platform_device_register_data(dev, mdrv, 0, NULL, 0);
|
|
if (IS_ERR(priv->pdev)) {
|
|
ret = PTR_ERR(priv->pdev);
|
|
dev_err(dev, "failed to register platform %s: %d\n", mdrv, ret);
|
|
goto err_disable_pm;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_disable_pm:
|
|
pm_runtime_disable(dev);
|
|
return ret;
|
|
}
|
|
|
|
static int fsl_audmix_remove(struct platform_device *pdev)
|
|
{
|
|
struct fsl_audmix *priv = dev_get_drvdata(&pdev->dev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
if (priv->pdev)
|
|
platform_device_unregister(priv->pdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int fsl_audmix_runtime_resume(struct device *dev)
|
|
{
|
|
struct fsl_audmix *priv = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(priv->ipg_clk);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to enable IPG clock: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
regcache_cache_only(priv->regmap, false);
|
|
regcache_mark_dirty(priv->regmap);
|
|
|
|
return regcache_sync(priv->regmap);
|
|
}
|
|
|
|
static int fsl_audmix_runtime_suspend(struct device *dev)
|
|
{
|
|
struct fsl_audmix *priv = dev_get_drvdata(dev);
|
|
|
|
regcache_cache_only(priv->regmap, true);
|
|
|
|
clk_disable_unprepare(priv->ipg_clk);
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PM */
|
|
|
|
static const struct dev_pm_ops fsl_audmix_pm = {
|
|
SET_RUNTIME_PM_OPS(fsl_audmix_runtime_suspend,
|
|
fsl_audmix_runtime_resume,
|
|
NULL)
|
|
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
};
|
|
|
|
static struct platform_driver fsl_audmix_driver = {
|
|
.probe = fsl_audmix_probe,
|
|
.remove = fsl_audmix_remove,
|
|
.driver = {
|
|
.name = "fsl-audmix",
|
|
.of_match_table = fsl_audmix_ids,
|
|
.pm = &fsl_audmix_pm,
|
|
},
|
|
};
|
|
module_platform_driver(fsl_audmix_driver);
|
|
|
|
MODULE_DESCRIPTION("NXP AUDMIX ASoC DAI driver");
|
|
MODULE_AUTHOR("Viorel Suman <viorel.suman@nxp.com>");
|
|
MODULE_ALIAS("platform:fsl-audmix");
|
|
MODULE_LICENSE("GPL v2");
|