90 lines
3.1 KiB
C
90 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* cs35l32.h -- CS35L32 ALSA SoC audio driver
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*
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* Copyright 2014 CirrusLogic, Inc.
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*
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* Author: Brian Austin <brian.austin@cirrus.com>
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*/
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#ifndef __CS35L32_H__
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#define __CS35L32_H__
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struct cs35l32_platform_data {
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/* Low Battery Threshold */
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unsigned int batt_thresh;
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/* Low Battery Recovery */
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unsigned int batt_recov;
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/* LED Current Management*/
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unsigned int led_mng;
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/* Audio Gain w/ LED */
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unsigned int audiogain_mng;
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/* Boost Management */
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unsigned int boost_mng;
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/* Data CFG for DUAL device */
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unsigned int sdout_datacfg;
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/* SDOUT Sharing */
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unsigned int sdout_share;
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};
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#define CS35L32_CHIP_ID 0x00035A32
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#define CS35L32_DEVID_AB 0x01 /* Device ID A & B [RO] */
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#define CS35L32_DEVID_CD 0x02 /* Device ID C & D [RO] */
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#define CS35L32_DEVID_E 0x03 /* Device ID E [RO] */
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#define CS35L32_FAB_ID 0x04 /* Fab ID [RO] */
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#define CS35L32_REV_ID 0x05 /* Revision ID [RO] */
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#define CS35L32_PWRCTL1 0x06 /* Power Ctl 1 */
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#define CS35L32_PWRCTL2 0x07 /* Power Ctl 2 */
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#define CS35L32_CLK_CTL 0x08 /* Clock Ctl */
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#define CS35L32_BATT_THRESHOLD 0x09 /* Low Battery Threshold */
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#define CS35L32_VMON 0x0A /* Voltage Monitor [RO] */
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#define CS35L32_BST_CPCP_CTL 0x0B /* Conv Peak Curr Protection CTL */
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#define CS35L32_IMON_SCALING 0x0C /* IMON Scaling */
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#define CS35L32_AUDIO_LED_MNGR 0x0D /* Audio/LED Pwr Manager */
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#define CS35L32_ADSP_CTL 0x0F /* Serial Port Control */
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#define CS35L32_CLASSD_CTL 0x10 /* Class D Amp CTL */
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#define CS35L32_PROTECT_CTL 0x11 /* Protection Release CTL */
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#define CS35L32_INT_MASK_1 0x12 /* Interrupt Mask 1 */
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#define CS35L32_INT_MASK_2 0x13 /* Interrupt Mask 2 */
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#define CS35L32_INT_MASK_3 0x14 /* Interrupt Mask 3 */
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#define CS35L32_INT_STATUS_1 0x15 /* Interrupt Status 1 [RO] */
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#define CS35L32_INT_STATUS_2 0x16 /* Interrupt Status 2 [RO] */
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#define CS35L32_INT_STATUS_3 0x17 /* Interrupt Status 3 [RO] */
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#define CS35L32_LED_STATUS 0x18 /* LED Lighting Status [RO] */
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#define CS35L32_FLASH_MODE 0x19 /* LED Flash Mode Current */
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#define CS35L32_MOVIE_MODE 0x1A /* LED Movie Mode Current */
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#define CS35L32_FLASH_TIMER 0x1B /* LED Flash Timer */
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#define CS35L32_FLASH_INHIBIT 0x1C /* LED Flash Inhibit Current */
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#define CS35L32_MAX_REGISTER 0x1C
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#define CS35L32_MCLK_DIV2 0x01
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#define CS35L32_MCLK_RATIO 0x01
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#define CS35L32_MCLKDIS 0x80
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#define CS35L32_PDN_ALL 0x01
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#define CS35L32_PDN_AMP 0x80
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#define CS35L32_PDN_BOOST 0x04
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#define CS35L32_PDN_IMON 0x40
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#define CS35L32_PDN_VMON 0x80
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#define CS35L32_PDN_VPMON 0x20
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#define CS35L32_PDN_ADSP 0x08
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#define CS35L32_MCLK_DIV2_MASK 0x40
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#define CS35L32_MCLK_RATIO_MASK 0x01
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#define CS35L32_MCLK_MASK 0x41
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#define CS35L32_ADSP_MASTER_MASK 0x40
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#define CS35L32_BOOST_MASK 0x03
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#define CS35L32_GAIN_MGR_MASK 0x08
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#define CS35L32_ADSP_SHARE_MASK 0x08
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#define CS35L32_ADSP_DATACFG_MASK 0x30
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#define CS35L32_SDOUT_3ST 0x08
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#define CS35L32_BATT_REC_MASK 0x0E
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#define CS35L32_BATT_THRESH_MASK 0x30
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#define CS35L32_RATES (SNDRV_PCM_RATE_48000)
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#define CS35L32_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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#endif
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