378 lines
12 KiB
C
378 lines
12 KiB
C
/*******************************************************************
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* This file is part of the Emulex Linux Device Driver for *
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* Fibre Channel Host Bus Adapters. *
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* Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
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* “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
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* Copyright (C) 2010-2015 Emulex. All rights reserved. *
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* EMULEX and SLI are trademarks of Emulex. *
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* www.broadcom.com *
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* *
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* This program is free software; you can redistribute it and/or *
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* modify it under the terms of version 2 of the GNU General *
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* Public License as published by the Free Software Foundation. *
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* This program is distributed in the hope that it will be useful. *
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* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
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* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
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* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
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* TO BE LEGALLY INVALID. See the GNU General Public License for *
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* more details, a copy of which can be found in the file COPYING *
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* included with this package. *
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*******************************************************************/
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/* bsg definitions
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* No pointers to user data are allowed, all application buffers and sizes will
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* derived through the bsg interface.
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*
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* These are the vendor unique structures passed in using the bsg
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* FC_BSG_HST_VENDOR message code type.
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*/
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#define LPFC_BSG_VENDOR_SET_CT_EVENT 1
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#define LPFC_BSG_VENDOR_GET_CT_EVENT 2
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#define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3
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#define LPFC_BSG_VENDOR_DIAG_MODE 4
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#define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK 5
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#define LPFC_BSG_VENDOR_GET_MGMT_REV 6
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#define LPFC_BSG_VENDOR_MBOX 7
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#define LPFC_BSG_VENDOR_MENLO_CMD 8
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#define LPFC_BSG_VENDOR_MENLO_DATA 9
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#define LPFC_BSG_VENDOR_DIAG_MODE_END 10
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#define LPFC_BSG_VENDOR_LINK_DIAG_TEST 11
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#define LPFC_BSG_VENDOR_FORCED_LINK_SPEED 14
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#define LPFC_BSG_VENDOR_RAS_GET_LWPD 16
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#define LPFC_BSG_VENDOR_RAS_GET_FWLOG 17
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#define LPFC_BSG_VENDOR_RAS_GET_CONFIG 18
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#define LPFC_BSG_VENDOR_RAS_SET_CONFIG 19
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#define LPFC_BSG_VENDOR_GET_TRUNK_INFO 20
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struct set_ct_event {
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uint32_t command;
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uint32_t type_mask;
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uint32_t ev_req_id;
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uint32_t ev_reg_id;
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};
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struct get_ct_event {
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uint32_t command;
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uint32_t ev_reg_id;
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uint32_t ev_req_id;
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};
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struct get_ct_event_reply {
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uint32_t immed_data;
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uint32_t type;
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};
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struct send_mgmt_resp {
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uint32_t command;
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uint32_t tag;
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};
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#define DISABLE_LOOP_BACK 0x0 /* disables loop back */
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#define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */
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#define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */
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struct diag_mode_set {
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uint32_t command;
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uint32_t type;
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uint32_t timeout;
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uint32_t physical_link;
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};
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struct sli4_link_diag {
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uint32_t command;
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uint32_t timeout;
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uint32_t test_id;
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uint32_t loops;
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uint32_t test_version;
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uint32_t error_action;
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};
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struct diag_mode_test {
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uint32_t command;
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};
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struct diag_status {
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uint32_t mbox_status;
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uint32_t shdr_status;
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uint32_t shdr_add_status;
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};
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#define LPFC_WWNN_TYPE 0
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#define LPFC_WWPN_TYPE 1
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struct get_mgmt_rev {
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uint32_t command;
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};
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#define MANAGEMENT_MAJOR_REV 1
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#define MANAGEMENT_MINOR_REV 1
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/* the MgmtRevInfo structure */
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struct MgmtRevInfo {
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uint32_t a_Major;
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uint32_t a_Minor;
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};
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struct get_mgmt_rev_reply {
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struct MgmtRevInfo info;
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};
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#define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */
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/* BSG mailbox request header */
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struct dfc_mbox_req {
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uint32_t command;
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uint32_t mbOffset;
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uint32_t inExtWLen;
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uint32_t outExtWLen;
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uint32_t extMboxTag;
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uint32_t extSeqNum;
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};
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/* Used for menlo command or menlo data. The xri is only used for menlo data */
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struct menlo_command {
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uint32_t cmd;
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uint32_t xri;
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};
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struct menlo_response {
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uint32_t xri; /* return the xri of the iocb exchange */
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};
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/*
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* macros and data structures for handling sli-config mailbox command
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* pass-through support, this header file is shared between user and
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* kernel spaces, note the set of macros are duplicates from lpfc_hw4.h,
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* with macro names prefixed with bsg_, as the macros defined in
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* lpfc_hw4.h are not accessible from user space.
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*/
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/* Macros to deal with bit fields. Each bit field must have 3 #defines
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* associated with it (_SHIFT, _MASK, and _WORD).
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* EG. For a bit field that is in the 7th bit of the "field4" field of a
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* structure and is 2 bits in size the following #defines must exist:
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* struct temp {
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* uint32_t field1;
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* uint32_t field2;
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* uint32_t field3;
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* uint32_t field4;
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* #define example_bit_field_SHIFT 7
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* #define example_bit_field_MASK 0x03
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* #define example_bit_field_WORD field4
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* uint32_t field5;
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* };
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* Then the macros below may be used to get or set the value of that field.
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* EG. To get the value of the bit field from the above example:
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* struct temp t1;
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* value = bsg_bf_get(example_bit_field, &t1);
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* And then to set that bit field:
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* bsg_bf_set(example_bit_field, &t1, 2);
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* Or clear that bit field:
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* bsg_bf_set(example_bit_field, &t1, 0);
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*/
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#define bsg_bf_get_le32(name, ptr) \
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((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
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#define bsg_bf_get(name, ptr) \
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(((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
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#define bsg_bf_set_le32(name, ptr, value) \
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((ptr)->name##_WORD = cpu_to_le32(((((value) & \
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name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
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~(name##_MASK << name##_SHIFT)))))
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#define bsg_bf_set(name, ptr, value) \
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((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
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((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
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/*
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* The sli_config structure specified here is based on the following
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* restriction:
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*
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* -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without
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* carrying HBD.
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* -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or
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* without carrying HBDs.
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*/
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struct lpfc_sli_config_mse {
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uint32_t pa_lo;
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uint32_t pa_hi;
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uint32_t buf_len;
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#define lpfc_mbox_sli_config_mse_len_SHIFT 0
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#define lpfc_mbox_sli_config_mse_len_MASK 0xffffff
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#define lpfc_mbox_sli_config_mse_len_WORD buf_len
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};
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struct lpfc_sli_config_hbd {
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uint32_t buf_len;
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#define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT 0
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#define lpfc_mbox_sli_config_ecmn_hbd_len_MASK 0xffffff
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#define lpfc_mbox_sli_config_ecmn_hbd_len_WORD buf_len
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uint32_t pa_lo;
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uint32_t pa_hi;
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};
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struct lpfc_sli_config_hdr {
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uint32_t word1;
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#define lpfc_mbox_hdr_emb_SHIFT 0
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#define lpfc_mbox_hdr_emb_MASK 0x00000001
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#define lpfc_mbox_hdr_emb_WORD word1
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#define lpfc_mbox_hdr_mse_cnt_SHIFT 3
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#define lpfc_mbox_hdr_mse_cnt_MASK 0x0000001f
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#define lpfc_mbox_hdr_mse_cnt_WORD word1
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uint32_t payload_length;
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uint32_t tag_lo;
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uint32_t tag_hi;
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uint32_t reserved5;
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};
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struct lpfc_sli_config_emb0_subsys {
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struct lpfc_sli_config_hdr sli_config_hdr;
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#define LPFC_MBX_SLI_CONFIG_MAX_MSE 19
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struct lpfc_sli_config_mse mse[LPFC_MBX_SLI_CONFIG_MAX_MSE];
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uint32_t padding;
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uint32_t word64;
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#define lpfc_emb0_subcmnd_opcode_SHIFT 0
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#define lpfc_emb0_subcmnd_opcode_MASK 0xff
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#define lpfc_emb0_subcmnd_opcode_WORD word64
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#define lpfc_emb0_subcmnd_subsys_SHIFT 8
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#define lpfc_emb0_subcmnd_subsys_MASK 0xff
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#define lpfc_emb0_subcmnd_subsys_WORD word64
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/* Subsystem FCOE (0x0C) OpCodes */
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#define SLI_CONFIG_SUBSYS_FCOE 0x0C
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#define FCOE_OPCODE_READ_FCF 0x08
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#define FCOE_OPCODE_ADD_FCF 0x09
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#define FCOE_OPCODE_SET_DPORT_MODE 0x27
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#define FCOE_OPCODE_GET_DPORT_RESULTS 0x28
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};
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struct lpfc_sli_config_emb1_subsys {
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struct lpfc_sli_config_hdr sli_config_hdr;
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uint32_t word6;
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#define lpfc_emb1_subcmnd_opcode_SHIFT 0
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#define lpfc_emb1_subcmnd_opcode_MASK 0xff
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#define lpfc_emb1_subcmnd_opcode_WORD word6
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#define lpfc_emb1_subcmnd_subsys_SHIFT 8
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#define lpfc_emb1_subcmnd_subsys_MASK 0xff
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#define lpfc_emb1_subcmnd_subsys_WORD word6
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/* Subsystem COMN (0x01) OpCodes */
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#define SLI_CONFIG_SUBSYS_COMN 0x01
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#define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4
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#define COMN_OPCODE_READ_OBJECT 0xAB
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#define COMN_OPCODE_WRITE_OBJECT 0xAC
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#define COMN_OPCODE_READ_OBJECT_LIST 0xAD
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#define COMN_OPCODE_DELETE_OBJECT 0xAE
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#define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES 0x79
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#define COMN_OPCODE_GET_CNTL_ATTRIBUTES 0x20
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uint32_t timeout;
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uint32_t request_length;
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uint32_t word9;
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#define lpfc_subcmnd_version_SHIFT 0
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#define lpfc_subcmnd_version_MASK 0xff
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#define lpfc_subcmnd_version_WORD word9
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uint32_t word10;
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#define lpfc_subcmnd_ask_rd_len_SHIFT 0
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#define lpfc_subcmnd_ask_rd_len_MASK 0xffffff
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#define lpfc_subcmnd_ask_rd_len_WORD word10
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uint32_t rd_offset;
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uint32_t obj_name[26];
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uint32_t hbd_count;
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#define LPFC_MBX_SLI_CONFIG_MAX_HBD 8
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struct lpfc_sli_config_hbd hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD];
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};
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struct lpfc_sli_config_mbox {
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uint32_t word0;
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#define lpfc_mqe_status_SHIFT 16
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#define lpfc_mqe_status_MASK 0x0000FFFF
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#define lpfc_mqe_status_WORD word0
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#define lpfc_mqe_command_SHIFT 8
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#define lpfc_mqe_command_MASK 0x000000FF
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#define lpfc_mqe_command_WORD word0
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union {
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struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys;
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struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys;
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} un;
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};
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#define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED 0
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#define LPFC_FORCED_LINK_SPEED_SUPPORTED 1
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struct get_forced_link_speed_support {
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uint32_t command;
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};
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struct forced_link_speed_support_reply {
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uint8_t supported;
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};
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struct lpfc_bsg_ras_req {
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uint32_t command;
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};
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struct lpfc_bsg_get_fwlog_req {
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uint32_t command;
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uint32_t read_size;
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uint32_t read_offset;
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};
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struct lpfc_bsg_get_ras_lwpd {
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uint32_t offset;
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uint32_t wrap_count;
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};
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struct lpfc_bsg_set_ras_config_req {
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uint32_t command;
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uint8_t action;
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#define LPFC_RASACTION_STOP_LOGGING 0x00
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#define LPFC_RASACTION_START_LOGGING 0x01
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uint8_t log_level;
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};
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struct lpfc_bsg_get_ras_config_reply {
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uint8_t state;
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#define LPFC_RASLOG_STATE_STOPPED 0x00
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#define LPFC_RASLOG_STATE_RUNNING 0x01
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uint8_t log_level;
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uint32_t log_buff_sz;
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};
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struct lpfc_trunk_info {
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uint32_t word0;
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#define lpfc_trunk_info_link_status_SHIFT 0
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#define lpfc_trunk_info_link_status_MASK 1
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#define lpfc_trunk_info_link_status_WORD word0
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#define lpfc_trunk_info_trunk_active0_SHIFT 8
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#define lpfc_trunk_info_trunk_active0_MASK 1
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#define lpfc_trunk_info_trunk_active0_WORD word0
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#define lpfc_trunk_info_trunk_active1_SHIFT 9
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#define lpfc_trunk_info_trunk_active1_MASK 1
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#define lpfc_trunk_info_trunk_active1_WORD word0
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#define lpfc_trunk_info_trunk_active2_SHIFT 10
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#define lpfc_trunk_info_trunk_active2_MASK 1
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#define lpfc_trunk_info_trunk_active2_WORD word0
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#define lpfc_trunk_info_trunk_active3_SHIFT 11
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#define lpfc_trunk_info_trunk_active3_MASK 1
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#define lpfc_trunk_info_trunk_active3_WORD word0
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#define lpfc_trunk_info_trunk_config0_SHIFT 12
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#define lpfc_trunk_info_trunk_config0_MASK 1
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#define lpfc_trunk_info_trunk_config0_WORD word0
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#define lpfc_trunk_info_trunk_config1_SHIFT 13
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#define lpfc_trunk_info_trunk_config1_MASK 1
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#define lpfc_trunk_info_trunk_config1_WORD word0
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#define lpfc_trunk_info_trunk_config2_SHIFT 14
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#define lpfc_trunk_info_trunk_config2_MASK 1
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#define lpfc_trunk_info_trunk_config2_WORD word0
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#define lpfc_trunk_info_trunk_config3_SHIFT 15
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#define lpfc_trunk_info_trunk_config3_MASK 1
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#define lpfc_trunk_info_trunk_config3_WORD word0
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uint16_t port_speed;
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uint16_t logical_speed;
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uint32_t reserved3;
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};
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struct get_trunk_info_req {
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uint32_t command;
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};
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/* driver only */
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#define SLI_CONFIG_NOT_HANDLED 0
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#define SLI_CONFIG_HANDLED 1
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