307 lines
6.5 KiB
Plaintext
307 lines
6.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
/*
|
|
* MPC8308RDB Device Tree Source
|
|
*
|
|
* Copyright 2009 Freescale Semiconductor Inc.
|
|
* Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
/ {
|
|
compatible = "fsl,mpc8308rdb";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
aliases {
|
|
ethernet0 = &enet0;
|
|
ethernet1 = &enet1;
|
|
serial0 = &serial0;
|
|
serial1 = &serial1;
|
|
pci0 = &pci0;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
PowerPC,8308@0 {
|
|
device_type = "cpu";
|
|
reg = <0x0>;
|
|
d-cache-line-size = <32>;
|
|
i-cache-line-size = <32>;
|
|
d-cache-size = <16384>;
|
|
i-cache-size = <16384>;
|
|
timebase-frequency = <0>; // from bootloader
|
|
bus-frequency = <0>; // from bootloader
|
|
clock-frequency = <0>; // from bootloader
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x08000000>; // 128MB at 0
|
|
};
|
|
|
|
localbus@e0005000 {
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
|
|
reg = <0xe0005000 0x1000>;
|
|
interrupts = <77 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
|
|
// CS0 and CS1 are swapped when
|
|
// booting from nand, but the
|
|
// addresses are the same.
|
|
ranges = <0x0 0x0 0xfe000000 0x00800000
|
|
0x1 0x0 0xe0600000 0x00002000
|
|
0x2 0x0 0xf0000000 0x00020000
|
|
0x3 0x0 0xfa000000 0x00008000>;
|
|
|
|
flash@0,0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "cfi-flash";
|
|
reg = <0x0 0x0 0x800000>;
|
|
bank-width = <2>;
|
|
device-width = <1>;
|
|
|
|
u-boot@0 {
|
|
reg = <0x0 0x60000>;
|
|
read-only;
|
|
};
|
|
env@60000 {
|
|
reg = <0x60000 0x10000>;
|
|
};
|
|
env1@70000 {
|
|
reg = <0x70000 0x10000>;
|
|
};
|
|
kernel@80000 {
|
|
reg = <0x80000 0x200000>;
|
|
};
|
|
dtb@280000 {
|
|
reg = <0x280000 0x10000>;
|
|
};
|
|
ramdisk@290000 {
|
|
reg = <0x290000 0x570000>;
|
|
};
|
|
};
|
|
|
|
nand@1,0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "fsl,mpc8315-fcm-nand",
|
|
"fsl,elbc-fcm-nand";
|
|
reg = <0x1 0x0 0x2000>;
|
|
|
|
jffs2@0 {
|
|
reg = <0x0 0x2000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
immr@e0000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
device_type = "soc";
|
|
compatible = "fsl,mpc8308-immr", "simple-bus";
|
|
ranges = <0 0xe0000000 0x00100000>;
|
|
reg = <0xe0000000 0x00000200>;
|
|
bus-frequency = <0>;
|
|
|
|
i2c@3000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cell-index = <0>;
|
|
compatible = "fsl-i2c";
|
|
reg = <0x3000 0x100>;
|
|
interrupts = <14 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
dfsrr;
|
|
rtc@68 {
|
|
compatible = "dallas,ds1339";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
usb@23000 {
|
|
compatible = "fsl-usb2-dr";
|
|
reg = <0x23000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupt-parent = <&ipic>;
|
|
interrupts = <38 0x8>;
|
|
dr_mode = "peripheral";
|
|
phy_type = "ulpi";
|
|
};
|
|
|
|
enet0: ethernet@24000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0x24000 0x1000>;
|
|
|
|
cell-index = <0>;
|
|
device_type = "network";
|
|
model = "eTSEC";
|
|
compatible = "gianfar";
|
|
reg = <0x24000 0x1000>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
interrupts = <32 0x8 33 0x8 34 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
tbi-handle = < &tbi0 >;
|
|
phy-handle = < &phy2 >;
|
|
fsl,magic-packet;
|
|
|
|
mdio@520 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,gianfar-mdio";
|
|
reg = <0x520 0x20>;
|
|
phy2: ethernet-phy@2 {
|
|
interrupt-parent = <&ipic>;
|
|
interrupts = <17 0x8>;
|
|
reg = <0x2>;
|
|
};
|
|
tbi0: tbi-phy@11 {
|
|
reg = <0x11>;
|
|
device_type = "tbi-phy";
|
|
};
|
|
};
|
|
};
|
|
|
|
enet1: ethernet@25000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
cell-index = <1>;
|
|
device_type = "network";
|
|
model = "eTSEC";
|
|
compatible = "gianfar";
|
|
reg = <0x25000 0x1000>;
|
|
ranges = <0x0 0x25000 0x1000>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
interrupts = <35 0x8 36 0x8 37 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
tbi-handle = < &tbi1 >;
|
|
/* Vitesse 7385 isn't on the MDIO bus */
|
|
fixed-link = <1 1 1000 0 0>;
|
|
fsl,magic-packet;
|
|
|
|
mdio@520 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,gianfar-tbi";
|
|
reg = <0x520 0x20>;
|
|
|
|
tbi1: tbi-phy@11 {
|
|
reg = <0x11>;
|
|
device_type = "tbi-phy";
|
|
};
|
|
};
|
|
};
|
|
|
|
serial0: serial@4500 {
|
|
cell-index = <0>;
|
|
device_type = "serial";
|
|
compatible = "fsl,ns16550", "ns16550";
|
|
reg = <0x4500 0x100>;
|
|
clock-frequency = <133333333>;
|
|
interrupts = <9 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
};
|
|
|
|
serial1: serial@4600 {
|
|
cell-index = <1>;
|
|
device_type = "serial";
|
|
compatible = "fsl,ns16550", "ns16550";
|
|
reg = <0x4600 0x100>;
|
|
clock-frequency = <133333333>;
|
|
interrupts = <10 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
};
|
|
|
|
gpio@c00 {
|
|
#gpio-cells = <2>;
|
|
device_type = "gpio";
|
|
compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
|
|
reg = <0xc00 0x18>;
|
|
interrupts = <74 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
gpio-controller;
|
|
};
|
|
|
|
/* IPIC
|
|
* interrupts cell = <intr #, sense>
|
|
* sense values match linux IORESOURCE_IRQ_* defines:
|
|
* sense == 8: Level, low assertion
|
|
* sense == 2: Edge, high-to-low change
|
|
*/
|
|
ipic: interrupt-controller@700 {
|
|
compatible = "fsl,ipic";
|
|
interrupt-controller;
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x700 0x100>;
|
|
device_type = "ipic";
|
|
};
|
|
|
|
ipic-msi@7c0 {
|
|
compatible = "fsl,ipic-msi";
|
|
reg = <0x7c0 0x40>;
|
|
msi-available-ranges = <0x0 0x100>;
|
|
interrupts = < 0x43 0x8
|
|
0x4 0x8
|
|
0x51 0x8
|
|
0x52 0x8
|
|
0x56 0x8
|
|
0x57 0x8
|
|
0x58 0x8
|
|
0x59 0x8 >;
|
|
interrupt-parent = < &ipic >;
|
|
};
|
|
|
|
dma@2c000 {
|
|
compatible = "fsl,mpc8308-dma";
|
|
reg = <0x2c000 0x1800>;
|
|
interrupts = <3 0x8
|
|
94 0x8>;
|
|
interrupt-parent = < &ipic >;
|
|
};
|
|
|
|
};
|
|
|
|
pci0: pcie@e0009000 {
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
#interrupt-cells = <1>;
|
|
device_type = "pci";
|
|
compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
|
|
reg = <0xe0009000 0x00001000
|
|
0xb0000000 0x01000000>;
|
|
ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
|
|
0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
|
|
bus-range = <0 0>;
|
|
interrupt-map-mask = <0xf800 0 0 7>;
|
|
interrupt-map = <0 0 0 1 &ipic 1 8
|
|
0 0 0 2 &ipic 1 8
|
|
0 0 0 3 &ipic 1 8
|
|
0 0 0 4 &ipic 1 8>;
|
|
interrupts = <0x1 0x8>;
|
|
interrupt-parent = <&ipic>;
|
|
clock-frequency = <0>;
|
|
|
|
pcie@0 {
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
reg = <0 0 0 0 0>;
|
|
ranges = <0x02000000 0 0xa0000000
|
|
0x02000000 0 0xa0000000
|
|
0 0x10000000
|
|
0x01000000 0 0x00000000
|
|
0x01000000 0 0x00000000
|
|
0 0x00800000>;
|
|
};
|
|
};
|
|
};
|