97 lines
2.4 KiB
ArmAsm
97 lines
2.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* OMAP34xx and OMAP44xx secure APIs file.
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
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* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
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*/
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#include <linux/linkage.h>
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/*
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* This is common routine to manage secure monitor API
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* used to modify the PL310 secure registers.
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* 'r0' contains the value to be modified and 'r12' contains
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* the monitor API number. It uses few CPU registers
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* internally and hence they need be backed up including
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* link register "lr".
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* Function signature : void omap_smc1(u32 fn, u32 arg)
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*/
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.arch armv7-a
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.arch_extension sec
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ENTRY(omap_smc1)
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stmfd sp!, {r2-r12, lr}
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mov r12, r0
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mov r0, r1
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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ENDPROC(omap_smc1)
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/**
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* u32 omap_smc2(u32 id, u32 falg, u32 pargs)
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* Low level common routine for secure HAL and PPA APIs.
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* @id: Application ID of HAL APIs
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* @flag: Flag to indicate the criticality of operation
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* @pargs: Physical address of parameter list starting
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* with number of parametrs
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*/
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ENTRY(omap_smc2)
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stmfd sp!, {r4-r12, lr}
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mov r3, r2
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mov r2, r1
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mov r1, #0x0 @ Process ID
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mov r6, #0xff
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mov r12, #0x00 @ Secure Service ID
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mov r7, #0
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mcr p15, 0, r7, c7, c5, 6
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dsb
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dmb
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smc #0
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ldmfd sp!, {r4-r12, pc}
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ENDPROC(omap_smc2)
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/**
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* u32 omap_smc3(u32 service_id, u32 process_id, u32 flag, u32 pargs)
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* Low level common routine for secure HAL and PPA APIs via smc #1
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* r0 - @service_id: Secure Service ID
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* r1 - @process_id: Process ID
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* r2 - @flag: Flag to indicate the criticality of operation
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* r3 - @pargs: Physical address of parameter list
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*/
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ENTRY(omap_smc3)
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stmfd sp!, {r4-r11, lr}
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mov r12, r0 @ Copy the secure service ID
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mov r6, #0xff @ Indicate new Task call
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dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
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smc #1 @ Call PPA service
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ldmfd sp!, {r4-r11, pc}
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ENDPROC(omap_smc3)
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ENTRY(omap_modify_auxcoreboot0)
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stmfd sp!, {r1-r12, lr}
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ldr r12, =0x104
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dsb
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smc #0
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ldmfd sp!, {r1-r12, pc}
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ENDPROC(omap_modify_auxcoreboot0)
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ENTRY(omap_auxcoreboot_addr)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x105
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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ENDPROC(omap_auxcoreboot_addr)
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ENTRY(omap_read_auxcoreboot0)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x103
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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ENDPROC(omap_read_auxcoreboot0)
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