65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* OMAP1 reset support
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/reboot.h>
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#include <mach/hardware.h>
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#include "iomap.h"
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#include "common.h"
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/* ARM_SYSST bit shifts related to SoC reset sources */
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#define ARM_SYSST_POR_SHIFT 5
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#define ARM_SYSST_EXT_RST_SHIFT 4
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#define ARM_SYSST_ARM_WDRST_SHIFT 2
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#define ARM_SYSST_GLOB_SWRST_SHIFT 1
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/* Standardized reset source bits (across all OMAP SoCs) */
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#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0
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#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1
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#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3
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#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5
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void omap1_restart(enum reboot_mode mode, const char *cmd)
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{
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/*
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* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
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* "Global Software Reset Affects Traffic Controller Frequency".
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*/
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if (cpu_is_omap5912()) {
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omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
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omap_writew(0x8, ARM_RSTCT1);
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}
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omap_writew(1, ARM_RSTCT1);
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}
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/**
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* omap1_get_reset_sources - return the source of the SoC's last reset
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*
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* Returns bits that represent the last reset source for the SoC. The
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* format is standardized across OMAPs for use by the OMAP watchdog.
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*/
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u32 omap1_get_reset_sources(void)
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{
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u32 ret = 0;
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u16 rs;
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rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
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if (rs & (1 << ARM_SYSST_POR_SHIFT))
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ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT;
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if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT))
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ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT;
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if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT))
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ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT;
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if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT))
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ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT;
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return ret;
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}
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