Commit Graph

650072 Commits

Author SHA1 Message Date
Huang Rui fce293ca3d drm/amd/powerplay: add didt config table for polaris kicker
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-16 11:43:32 -05:00
Huang Rui 28a488848f drm/amd/powerplay: modify VddcPhase value for polaris kicker
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-16 11:43:22 -05:00
Huang Rui 5d7213b0be drm/amd/powerplay: add kicker flag into smumgr
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-16 11:43:11 -05:00
ozeng d238326755 drm/amdgpu: Initialize pipe priority order on graphic initialization
Initialized PIPE_ORDER_TS0/1/2/3 field of SPI_ARB_PRIORITY register to 2.
This set the pipe priority order to:
02 - HP3D, CS_H, GFX, CS_M, CS_L

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-13 15:08:33 -05:00
Rex Zhu 254cd2e08d drm/amdgpu: read hw register to check pg status.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-13 12:43:04 -05:00
Alan Harrison d50e5c2448 drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register
Add a bit needed during initialization into the driver, where it is supposed
to be.  Currently, this is happening in the VCE firmware, and although
functional, this is the correct place to perform this initialization.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alan Harrison <Alan.Harrison@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-13 12:41:07 -05:00
Alex Deucher c10c8f7c27 drm/amdgpu/pm: check for headless before calling compute_clocks
Don't update display bandwidth on headless asics.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=99387

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-02-10 18:09:32 -05:00
Samuel Pitoiset a73effaf58 drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()
This removes code duplication.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-10 12:07:33 -05:00
Alex Deucher 4ce3bd45b3 drm/amdgpu: add more cases to DCE11 possible crtc mask setup
Add cases for asics with 3 and 5 crtcs.  Fixes an artificial
limitation on asics with 3 or 5 crtcs.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=99744

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-02-10 12:07:33 -05:00
Dave Airlie 13f62f54d1 Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
Some additional fixes for 4.11.  Delayed a bit due to Chinese New Year. Highlights:
- Powerplay fixes
- VCE and UVD powergating fixes
- Clean up amdgpu SI gfx code to match CI and VI
- Misc bug fixes

* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (30 commits)
  drm/amdgpu: report the number of bytes moved at buffer creation
  drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
  drm/amdgpu: add support for new smc firmware on polaris
  drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
  drm/amdgpu: shut up #warning for compile testing
  drm/amdgpu/virt: fix double kfree on bo_va
  drm/radeon: remove some dead code
  drm/radeon: avoid kernel segfault in vce when gpu fails to resume
  drm/amd/powerplay: set fan speed to max in profile peak mode only.
  drm/amd/gfx6: update gb_addr_config
  drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: refine si_read_register
  drm/amdgpu/gfx6: clean up spi configuration
  drm/amdgpu/gfx6: clean up cu configuration
  drm/amdgpu/gfx6: clean up rb configuration
  drm/amdgpu: refine vce3.0 code and related powerplay pg code.
  drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
  drm/amdgpu: enable vce pg feature on Kv.
  drm/amdgpu: refine code for VCE2.0 and related dpm code.
  ...
2017-02-10 10:13:30 +10:00
Dave Airlie f320d35723 Merge tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next
two minor fixes.

* tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu:
  drm/fsl-dcu: check for clk_prepare_enable() error
  drm/fsl-dcu: remove unneeded 'ret' assignment
2017-02-10 10:12:56 +10:00
Dave Airlie 79b33494af Merge tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Just 3 bugfixes for 4.11 merge window:

- fbdev module unload oops fix from Chris
- patch from Dan that look really dangers, better safe than sorry

* tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc:
  drm/atomic: fix an error code in mode_fixup()
  drm: Cancel drm_fb_helper_resume_work on unload
  drm: Cancel drm_fb_helper_dirty_work on unload
2017-02-10 10:12:00 +10:00
Samuel Pitoiset fad061270a drm/amdgpu: report the number of bytes moved at buffer creation
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.

v2: fix computation

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09 11:29:44 -05:00
Samuel Pitoiset 38fc4856ad drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
When ttm_bo_init() fails, the reservation mutex should be unlocked.

In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fails and the
mutex was locked as expected.

This should fix (random) GPU hangs. The easy way to reproduce the
issue is to change the "Super Sampling" option from 1.0 to 2.0 in
Hitman. It will create a huge buffer, evict a bunch of buffers
(around ~5k) and deadlock.

This regression has been introduced pretty recently.

v2: only release the mutex if resv is NULL

Fixes: 12a852219583 ("drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09 11:28:24 -05:00
Alex Deucher a52d120f62 drm/amdgpu: add support for new smc firmware on polaris
Some polaris variants require new smc firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09 10:54:45 -05:00
Rex Zhu 4d8d44c6ce drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09 10:54:08 -05:00
Arnd Bergmann 31bb90f1cd drm/amdgpu: shut up #warning for compile testing
My randconfig tests on linux-next showed a newly introduced warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function 'amdgpu_bo_create_restricted':
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:377:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp]

Generally speaking, warnings about bad kernel configuration are not particularly
helpful. We could enforce the selection of X86_PAT through Kconfig, so the driver
cannot even be used unless it is enabled, or we could just rely on the runtime
warning that is also there.

In this version, I'm making the warning conditional on CONFIG_COMPILE_TEST, which
shuts it up for me, but not people that may actually want to run the kernel
as a compromize.

Fixes: a2e2f29970 ("drm/amdgpu: Bring bo creation in line with radeon driver (v2)")
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09 00:23:24 -05:00
Colin Ian King 6127f4aee4 drm/amdgpu/virt: fix double kfree on bo_va
bo_va is being kfree'd twice, once in the call to amdgpu_vm_bo_rmv
and then a short while later. Fix this double free by removing
the 2nd kfree.

Detected by CoverityScan, CID#1399524 ("Double Free")

Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 21:06:00 -05:00
Dan Carpenter 9338acc579 drm/radeon: remove some dead code
If "rdev->bios" is NULL then we don't need to free it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 21:04:29 -05:00
Jérôme Glisse 3b4821f8a4 drm/radeon: avoid kernel segfault in vce when gpu fails to resume
When GPU fails to resume we can not trust that value we write to GPU
memory will post and we might get garbage (more like 0xffffffff on
x86) when reading them back. This trigger out of range memory access
in the kernel inside the vce resume code path.

This patch use canonical value to compute offset instead of reading
back value from GPU memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 20:59:16 -05:00
Rex Zhu 5ada90d55f drm/amd/powerplay: set fan speed to max in profile peak mode only.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:27:39 -05:00
Flora Cui 0d09a096c4 drm/amd/gfx6: update gb_addr_config
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:25:19 -05:00
Flora Cui ea0875a0b6 drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:25:02 -05:00
Flora Cui 2c0c8f2d38 drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:24:45 -05:00
Flora Cui dd5dfa61b4 drm/amdgpu: refine si_read_register
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:24:26 -05:00
Flora Cui c5dc14fb98 drm/amdgpu/gfx6: clean up spi configuration
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:24:09 -05:00
Flora Cui 375d6f7057 drm/amdgpu/gfx6: clean up cu configuration
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:23:52 -05:00
Flora Cui 69dd3d2c61 drm/amdgpu/gfx6: clean up rb configuration
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:23:37 -05:00
Rex Zhu 6fc11b0ed3 drm/amdgpu: refine vce3.0 code and related powerplay pg code.
1. not start vce3.0 when hw_init
2. stop vce3.0 when vce idle.
3. pg mask used to ctrl power down/up vce.
4. change cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:23:19 -05:00
Rex Zhu f1ea278d6f drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:23:03 -05:00
Rex Zhu ca6d35031f drm/amdgpu: enable vce pg feature on Kv.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:22:45 -05:00
Rex Zhu beeea9819d drm/amdgpu: refine code for VCE2.0 and related dpm code.
v2: clean up vce cg function.
    use sw cg when vce stoped.

1. implement vce_stop function.
2. not start vce when hw_init.
3. refine vce cg/pg code.
4. delete bypass mode.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:22:27 -05:00
Rex Zhu 28ed5504ab drm/amdgpu: when dpm disabled, also need to stop/start vce.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:22:09 -05:00
Rex Zhu e3e672e631 drm/amdgpu: refine uvd5.0/6.0 code.
1. delete redundant cg pg mask check.
   pg mask use to ctrl power on/down uvd.
   not start/stop uvd.
   cg mask will be check when enable mgcg.
2. no need to start uvd when initializ.
   when ring test/ib test/encode, uvd was enabled.
   when uvd idle, uvd was stopped.
3. chang cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:21:52 -05:00
Rex Zhu bac601ec00 drm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.
need to start smc when dpm disabled.
otherwise, uvd can't get response from smu.
so uvd ring test and ib test will timeout.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:21:32 -05:00
Rex Zhu 8b55d17eee drm/amdgpu: refine uvd4.2 init/stop code.
1. set uvd_status busy before uvd_start.
2. clear uvd_status to 0 after uvd stop.
   smu firmware may check uvd_status.
3. wait uvd idle before stop uvd.
4. not start uvd when hw_init.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:21:14 -05:00
Rex Zhu d01c6236ac drm/amdgpu: refine uvd pg code in kv_dpm.c
1. no need to set cg as use hw dynamic cg.
2. when uvd idle, stop uvd. encode, start uvd.
3. if pg feature enabled, power on/down uvd by smu.
4. drm/amdgpu: dpm do not set uvd pg status.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:20:55 -05:00
Rex Zhu 3a78696658 drm/amdgpu: power down/up uvd4 when smu disabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:20:40 -05:00
Rex Zhu cbd9262f80 drm/amdgpu: add current_pg_status register define for smu7.1
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:20:22 -05:00
Rex Zhu e38ca2b325 drm/amdgpu: when dpm disabled, also can enable uvd cg/pg.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:20:03 -05:00
Dan Carpenter f9ad86e42d drm/atomic: fix an error code in mode_fixup()
Having "ret" be a bool type works for everything except
ret = funcs->atomic_check().  The other functions all return zero on
error but ->atomic_check() returns negative error codes.  We want to
propagate the error code but instead we return 1.

I found this bug with static analysis and I don't know if it affects
run time.

Fixes: 4cd4df8080 ("drm/atomic: Add ->atomic_check() to encoder helpers")
Cc: stable@vger.kernel.org
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207234601.GA23981@mwanda
2017-02-08 16:15:42 +01:00
Chris Wilson 24f76b2c87 drm: Cancel drm_fb_helper_resume_work on unload
We can not allow the worker to run after its fbdev, or even the module,
has been removed.

Fixes: cfe63423d9 ("drm/fb-helper: Add drm_fb_helper_set_suspend_unlocked()")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: dri-devel@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v4.9+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207124956.14954-2-chris@chris-wilson.co.uk
2017-02-08 16:15:42 +01:00
Chris Wilson f21b9a92ca drm: Cancel drm_fb_helper_dirty_work on unload
We can not allow the worker to run after its fbdev, or even the module,
has been removed.

Fixes: eaa434defa ("drm/fb-helper: Add fb_deferred_io support")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: dri-devel@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v4.7+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207124956.14954-1-chris@chris-wilson.co.uk
2017-02-08 16:15:41 +01:00
Fabio Estevam ef15d36154 drm/fsl-dcu: check for clk_prepare_enable() error
clk_prepare_enable() may fail, so we should better check its return
value.

Also place the of_node_put() function right after clk_prepare_enable(),
in order to avoid calling of_node_put() twice in case clk_prepare_enable()
fails.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2017-02-07 20:28:04 -08:00
Fabio Estevam 5d2883d51d drm/fsl-dcu: remove unneeded 'ret' assignment
When devm_kzalloc() fails there is no need to assign an error code
to the 'ret' variable as it will not be used after jumping to the
'err_node_put' label, so just remove the assignment.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2017-02-07 20:26:49 -08:00
Dave Airlie f864b00e03 Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
   - Add UHD support on TM2/TM2E boards.
     . adding interlace mode support and 297MHz pixel clock support
       for UHD mode, setting sysreg register in case of HW trigger mode,
       and adding SiI8620 MHL bridge device support.
   - Fix trigger mode issue on Rinato board.
     . On Rinato board, HW trigger mode doesn't work so fix it.
   - Some fixup and cleanup.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos: fimd: Do not use HW trigger for exynos3250
  drm/exynos/hdmi: add bridge support
  drm/exynos/decon5433: signal vblank only on odd fields
  drm/exynos/decon5433: add support for interlace modes
  drm/exynos/hdmi: fix PLL for 27MHz settings
  drm/exynos/hdmi: fix VSI infoframe registers
  drm/exynos/hdmi: add 297MHz pixel clock support
  drm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'
  drm/exynos/decon5433: configure sysreg in case of hardware trigger
2017-02-08 11:34:56 +10:00
Dave Airlie 4eaa39c63c Merge branch 'drm-rockchip-next-2017-02-07' of https://github.com/markyzq/kernel-drm-rockchip into drm-next
Single compile fix.

* 'drm-rockchip-next-2017-02-07' of https://github.com/markyzq/kernel-drm-rockchip:
  drm/rockchip: cdn-dp: fix cdn-dp complie warning
2017-02-08 11:28:19 +10:00
Hoegeun Kwon 7ff093d09f drm/exynos: fimd: Do not use HW trigger for exynos3250
Commit a6f75aa161 ("drm/exynos: fimd: add HW trigger support") added
hardware trigger support to the FIMD controller driver. I have tested
but this broke the display in at least the exynos3250 Gear 2. So until
the issue is fixed, avoid using HW trigger for the exynos3250 based
boards and use SW trigger as it was before the mentioned commit.

Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07 13:54:01 +09:00
Andrzej Hajda aa18157016 drm/exynos/hdmi: add bridge support
On TM2/TM2e platforms HDMI output is connected to MHL bridge
SiI8620. To allow configure UltraHD modes on the bridge
and to eliminate unsupported modes this bridge should be
attached to drm_encoder implemented in exynos_hdmi.

Changelog v1:
- fix drm_attach_bridge argument.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07 13:52:52 +09:00
Andrzej Hajda 1514d50b7a drm/exynos/decon5433: signal vblank only on odd fields
In case of interlace mode irq is generated for odd and even fields, but
vblank should be signaled only for the last emitted field.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07 13:52:52 +09:00