3 Commits

Author	SHA1	Message	Date
Doyle, Patrick	fd0d8d85f7	mtd: nand: bbt: Fix corner case in bad block table handling ... In the unlikely event that both blocks 10 and 11 are marked as bad (on a 32 bit machine), then the process of marking block 10 as bad stomps on cached entry for block 11. There are (of course) other examples. Signed-off-by: Patrick Doyle <pdoyle@irobot.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com> [<miquel.raynal@bootlin.com>: Fixed the title] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/774a92693f311e7de01e5935e720a179fb1b2468.1616635406.git.ytc-mb-yfuruyama7@kioxia.com	2021-05-10 18:20:54 +02:00
Frieder Schrempf	40b412897c	mtd: nand: Fix memory allocation in nanddev_bbt_init() ... Fix the size of the buffer allocated to store the in-memory BBT. This bug was previously hidden by a different bug, that was fixed in commit d098093ba0 ("mtd: nand: Fix nanddev_neraseblocks()"). Fixes: 9c3736a3de ("mtd: nand: Add core infrastructure to deal with NAND devices") Cc: <stable@vger.kernel.org> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>	2018-11-28 15:41:50 +01:00
Boris Brezillon	9c3736a3de	mtd: nand: Add core infrastructure to deal with NAND devices ... Add an intermediate layer to abstract NAND device interface so that some logic can be shared between SPI NANDs, parallel/raw NANDs, OneNANDs, ... Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>	2018-02-16 10:10:53 +01:00