Commit Graph

19 Commits

Author SHA1 Message Date
Padmavathi Venna 3075741417 spi/s3c64xx: Bug fix for SPI with different FIFO level
The existing macro fails for following scenarios.
1) S5P64X0 channel 1
2) S5PV210 channel 1

The FIFO data level supported in the above SoCs either 64 or
256 bytes depending on the channel. Because of this the TX_DONE
is the 25 bit in the status register.

The existing macro works for the following scenarios
1) S3C6410 all channels
2) S5PC100 all channels

The FIFO data level supported in the above SoCs 64 bytes
on all the channels. Because of this the TX_DONE is the 21 bit
in the status register.

So when we use the existing macro for the non-working SoCs
it is not anding with the TX_DONE bit for transmission status check.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-06 15:03:08 +09:00
Jassi Brar 0c92ecf10d spi/s3c64xx: Correction for 16,32 bits bus width
We can't do without setting channel and bus width to
same size. In order to do that, use loop read/writes in
polling mode and appropriate burst size in DMA mode.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-29 17:31:33 +09:00
Jassi Brar b42a81ca0f spi/s3c64xx: Consider the clk_from_cmu flag
Newer SoCs have the SPI clock scaling control in platform's
clock management unit. Inorder for such SoCs to work, we need
to check the flag clk_from_cmu before making any clock changes.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-29 17:31:33 +09:00
Jassi Brar e02ddd442a spi/s3c64xx: Prevent unnecessary map-unmap
Since we use DMA mode only for xfers bigger than FIFO size,
do not map/unmap buffers for polling mode transfers.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-29 17:31:31 +09:00
Mark Brown be7852a839 spi/spi_s3c64xx: Warn if PIO transfers time out
When using PIO we have a timeout for the TX and RX FIFOs to ensure that
the data actually gets transferred. Warn if we hit that timeout - it
should never happen, but this makes sure we'll find out if it does.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-08 12:23:03 -06:00
Jassi Brar c3f139b655 spi/s3c64xx: Fix incorrect reuse of 'val' local variable.
Instead of, wrongly, reusing the 'val' variable, use a dedicated
one for reading the status register.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-08 12:05:02 -06:00
Jassi Brar 251ee478f2 spi/s3c64xx: Fix compilation warning
Fix compilation warning by typecasting the tx_buf pointer.

[I'm not thrilled with resorting to a cast; but I cannot see a better
way to go about this.  I don't want to drop the const from struct
spi_transfer ~~glikely]

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-08 12:03:45 -06:00
Mark Brown 9d8f86b560 spi/spi_s3c64xx: Increase dead reckoning time in wait_for_xfer()
For small transfers at high speeds the expected transfer time can easily
be well under 1ms, causing the delay in wait_for_xfer() to be only the
dead reckoning fudge factor of 5ms currently included. Experiments on
some of my systems shows that this is marginal for some transfers so
double it to 10ms.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-08 10:00:15 -06:00
Mark Brown d2a787fc57 spi/spi_s3c64xx: Move to subsys_initcall()
Allow the use of the S3C64xx SPI controller with things like PMICs by
moving the init up to subsys_initcall().

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-08 09:59:37 -06:00
Mark Brown 8944f4f3d9 spi/spi_s3c64xx: Staticise non-exported functions
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-01 08:55:23 -06:00
Mark Brown cc0fc0bbeb spi/spi_s3c64xx: Make probe more robust against missing board config
The S3C64xx SPI driver requires the machine to call s3c64xx_spi_set_info()
to select a few options, including the clock to use for the SPI controller.
If this is not done then a NULL will be passed as the clock name for
clk_get(), causing an obscure crash. Guard against this and other missing
configuration by validating that the clock name has been filled in in
the platform data that ets passed in.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-09-01 08:55:22 -06:00
Joe Perches 8a349d4b13 spi/spi_s3c64xx.c: Fix continuation line formats
String constants that are continued on subsequent lines with \
are not good.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-02 01:07:07 -07:00
Jassi Brar fa0fcde66a spi/s3c64xx: Add new parameter to cs callback
Since most of the chip-selects are simply going to be like
gpio_set_value, it would do good to have the same callback type
so that it could simply be made to point at gpio_set_value.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:45 -07:00
Jassi Brar e6b873c966 spi/s3c64xx: Include moved header
Header for platform specific stuff has been rename to include the SoC
type. Include the new header instead.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:45 -07:00
Jassi Brar ef6c680dc5 spi/s3c64xx: Check before mem-region release
Add precautionary check before releasing memory region.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:44 -07:00
Jassi Brar b0d5d6e553 spi/s3c64xx: Move src_clk to local driver data
The pointer to SPI rate source clock had better be the member of
driver local data structure rather than platform specific.
Also, remove definitions of variable 'sci' that are rendered
useless as a consequence.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:44 -07:00
Jassi Brar ee64a37732 spi/s3c64xx: Differentiate ip and rate clock
The instance of SPI clock for controller and that used for generating
signals ought to be independently handled.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:44 -07:00
Jassi Brar ad7de729c6 spi/s3c64xx: Rename s3c64xx_spi_cntrlr_info
Rename 'struct s3c64xx_spi_cntrlr_info' to lesser wordy
'struct s3c64xx_spi_info'

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:44 -07:00
Jassi Brar 230d42d422 spi: Add s3c64xx SPI Controller driver
Each SPI controller has exactly one CS line and as such doesn't
provide for multi-cs. We implement a workaround to support
multi-cs by _not_ configuring the mux'ed CS pin for each SPI
controller. The CS mechanism is assumed to be fully machine
specific - the driver doesn't even assume some GPIO pin is used
to control the CS.

The driver selects between DMA and POLLING mode depending upon
the xfer size - DMA mode for xfers bigger than FIFO size, POLLING
mode otherwise.

The driver has been designed to be capable of running SoCs since
s3c64xx and till date, for that reason some of the register fields
have been passed via, SoC specific, platform data.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-12-17 08:58:17 -07:00