Pull m68knommu arch update from Greg Ungerer:
"Quite a varied set of changes this time.
- A little more merge cleanup, this time the assembler entry code.
- New sub-architecture support for the ColdFire 5251/5253 and 5441x
CPU families.
- Specific clk support code for the ColdFire 520x and 532x CPU
familes.
- Refactoring of the ColdFire GPIO support.
- PCI bus support for some ColdFire CPUS that have PCI hardware (54xx
family). This showed up a few problems with ColdFire cache,
allocating coherent memory and bi-directional DMA support. Fixes
for those too."
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits)
m68k: allow PCI bus to be enabled for ColdFire m54xx CPUs
m68k: add PCI bus code support for the ColdFire M54xx SoC family
m68k: add IO access definitions to support PCI on ColdFire platforms
m68k: add PCI bus support definitions for the ColdFire M54xx SoC family
m68k: common PCI support definitions and code
m68k: add support for DMA_BIDIRECTIONAL in dma support functions
m68k: fix ColdFire clear cache operation
m68k: use simpler dma_alloc_coherent() for ColdFire CPUs
m68knommu: platform support for 8390 based ethernet used on some boards
m68knommu: Add clk definitions for m532x.
m68knommu: Add clk definitions for m520x.
m68knommu: Add rtc device for m5441x.
m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller.
m68knommu: Add support for the Coldfire m5441x.
m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1
coldfire-qspi: Add support for the Coldfire 5251/5253.
m68knommu: Add support for the Coldfire 5251/5253
m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips.
m68k: merge the MMU and non-MMU versions of the entry.S code
m68k: use jbsr to call functions instead of bsrl
...
Clock support is moving to the clk subsystem. These tegra, omap and imx
changes are for code that is still platform specific and not (yet)
part of that subsystem.
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Merge tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc clk changes from Arnd Bergmann:
"Clock support is moving to the clk subsystem. These tegra, omap and
imx changes are for code that is still platform specific and not (yet)
part of that subsystem."
Fix up conflicts in arch/arm/mach-{imx/clk-imx51-imx53.c,omap2/Makefile}
* tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
ARM: imx: clk-imx31: Fix clock id for rnga driver
ARM: imx: add missing item to the list of clock event modes
ARM: i.MX5x CSPI: Fixed clock name for CSPI
ARM: i.MX5x clocks: Fix GPT clocks
ARM: i.MX5x clocks: Fix parent for PWM clocks
ARM: i.MX5x clocks: Add EPIT support
ARM: mx27: Reenable silicon version print
ARM: clk-imx27: Fix rtc clock id
ARM: tegra: Provide clock for only one PWM controller
ARM: tegra: Fix PWM clock programming
ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
ARM: tegra: Remove second instance of uart clk
crypto: add clk_prepare/clk_unprepare
ASoC: tegra: add clk_prepare/clk_unprepare
staging: nvec: add clk_prepare/clk_unprepare
spi/tegra: add clk_prepare/clk_unprepare
Input: tegra-kbc - add clk_prepare/clk_unprepare
USB: ehci-tegra: add clk_prepare/clk_unprepare
...
They have very few users and they're both just doing a single register
write so the advantage of having the macro is a bit limited. An inline
function might make sense but it's as easy to just do the writes directly.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Saves some error handling and a small amount of code.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
No call was being made by the GPIO driver to put the GPIO into output
mode meaning that the calls to gpio_set_value() which were being done
were not valid. A similar issue appears to exist with the DT GPIO
requests but as they appear to be being used for pinmux it's less clear
to me that we want to configure them.
Without this fix Cragganmore systems can't talk to their SPI devices.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
When gpio_request() fails the driver logged the failure but while it'd
try to print an error code in the non-DT case it didn't pass the error
code in so garbage would be logged and in the DT case the error wasn't
logged.
Further, in the non-DT case the error code was then overwritten with -EBUSY
depriving the caller of information and breaking automatic probe deferral
pushing back from the GPIO level. Also reformat the non-DT log message
so it's not word wrapped and we can grep for it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The Coldfire 5251/5253 have a QSPI controller. Enable selection of the
coldfire-qspi driver if the M525x is selected.
Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Add support for device based discovery.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The set_level callback in the controller data, which is used to configure
the slave select line, cannot be supported when migrating the driver to
device tree based discovery. Since all the platforms currently use gpio
as the slave select line, this callback can be removed from the
controller data and replaced with call to gpio_set_value in the driver.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The platform data pointer that is passed to the spi gpio setup functions
is not used. Hence, this parameter is removed from all the spi gpio setup
functions.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The macro S3C64XX_SPI_ST_TRLCNTZ is not used and hence it is removed.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
From Stephen Warren <swarren@wwwdotorg.org>:
This branch contains numerous changes required as a baseline in order to
convert Tegra to the common clock framework. The intention was to also
include patches to actually convert Tegra to the common clock framework.
However, those patches appeared late in the kernel cycle and currently
cause regressions on some boards, so were dropped for now.
* 'for-3.6/common-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: Provide clock for only one PWM controller
ARM: tegra: Fix PWM clock programming
ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
ARM: tegra: Remove second instance of uart clk
crypto: add clk_prepare/clk_unprepare
ASoC: tegra: add clk_prepare/clk_unprepare
staging: nvec: add clk_prepare/clk_unprepare
spi/tegra: add clk_prepare/clk_unprepare
Input: tegra-kbc - add clk_prepare/clk_unprepare
USB: ehci-tegra: add clk_prepare/clk_unprepare
mmc: tegra: add clk_prepare/clk_unprepare
i2c: tegra: Add clk_prepare/clk_unprepare
ARM: tegra: add clk_prepare/clk_unprepare
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Config operation is separated from request operation in
DMA common operation. Because spi driver can change the
DMA config for every transfer. So this patch is using the
separated DMA config operation.
Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kyoungil Kim <ki0351.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
1a77b127ae (OMAP : SPI : use devm_* functions) converted the SPI
device controller state to use devm_kzalloc(). Unfortunately, this
is used against an unbound struct device, which results in the
following when the device is bound to its driver:
------------[ cut here ]------------
WARNING: at /home/rmk/git/linux-rmk/drivers/base/dd.c:257 driver_probe_device+0x78/0x21c()
Modules linked in:
Backtrace:
[<c0017d0c>] (dump_backtrace+0x0/0x10c) from [<c033e208>] (dump_stack+0x18/0x1c) r7:00000000 r6:c01ff28c r5:c040050c r4:00000101
[<c033e1f0>] (dump_stack+0x0/0x1c) from [<c00337ec>] (warn_slowpath_common+0x58/0x70)
[<c0033794>] (warn_slowpath_common+0x0/0x70) from [<c0033828>] (warn_slowpath_null+0x24/0x2c)
[<c0033804>] (warn_slowpath_null+0x0/0x2c) from [<c01ff28c>] (driver_probe_device+0x78/0x21c)
[<c01ff214>] (driver_probe_device+0x0/0x21c) from [<c01ff49c>] (__driver_attach+0x6c/0x90)
[<c01ff430>] (__driver_attach+0x0/0x90) from [<c01fda70>] (bus_for_each_dev+0x58/0x98)
[<c01fda18>] (bus_for_each_dev+0x0/0x98) from [<c01ff0f4>] (driver_attach+0x20/0x28)
[<c01ff0d4>] (driver_attach+0x0/0x28) from [<c01fe2f4>] (bus_add_driver+0xb4/0x230)
[<c01fe240>] (bus_add_driver+0x0/0x230) from [<c01ffb24>] (driver_register+0xac/0x138)
[<c01ffa78>] (driver_register+0x0/0x138) from [<c0215d4c>] (spi_register_driver+0x4c/0x60)
[<c0215d00>] (spi_register_driver+0x0/0x60) from [<c045414c>] (ks8851_init+0x14/0x1c)
[<c0454138>] (ks8851_init+0x0/0x1c) from [<c0008770>] (do_one_initcall+0x9c/0x164)
[<c00086d4>] (do_one_initcall+0x0/0x164) from [<c0436410>] (kernel_init+0x128/0x210)
[<c04362e8>] (kernel_init+0x0/0x210) from [<c0038754>] (do_exit+0x0/0x72c)
---[ end trace 4dcda79f5e89dd84 ]---
ks8851 spi1.0: message enable is 0
ks8851 spi1.0: eth0: revision 0, MAC 08:00:28:01:4d:c6, IRQ 194, has EEPROM
Fix this by partially reverting the original commit.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds support for the spear13xx platform, which has first been under
review a long time ago and finally been completed after generic spear
work has gone into the clock, dt and pinctrl branches.
Also a number of updates for the samsung socs are part of this branch.
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Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc: soc specific changes (part 2) from Olof Johansson:
"This adds support for the spear13xx platform, which has first been
under review a long time ago and finally been completed after generic
spear work has gone into the clock, dt and pinctrl branches.
Also a number of updates for the samsung socs are part of this branch."
Fix up trivial conflicts in drivers/gpio/gpio-samsung.c that look much
worse than they are: the exonys5 init code was refactored in commit
fd454997d6 ("gpio: samsung: refactor gpiolib init for exynos4/5"), and
then commit f10590c983 ("ARM: EXYNOS: add GPC4 bank instance") added a
new gpio chip define and did tiny updates to the init code.
So the conflict diff looks like hell, but it's actually a fairly simple
change.
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
ARM: exynos: fix building with CONFIG_OF disabled
ARM: EXYNOS: Add AUXDATA for i2c controllers
ARM: dts: Update device tree source files for EXYNOS5250
ARM: EXYNOS: Add device tree support for interrupt combiner
ARM: EXYNOS: Add irq_domain support for interrupt combiner
ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
ARM: EXYNOS: update irqs for EXYNOS5250 SoC
ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
ARM: EXYNOS: add GPC4 bank instance
ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
ARM: EXYNOS: Modify the GIC physical address for static io-mapping
ARM: EXYNOS: Add watchdog timer clock instance
pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
SPEAr: Update MAINTAINERS and Documentation
SPEAr13xx: Add defconfig
SPEAr13xx: Add compilation support
SPEAr13xx: Add dts and dtsi files
pinctrl: Add SPEAr13xx pinctrl drivers
pinctrl: SPEAr: Create macro for declaring GPIO PINS
SPEAr13xx: Add common clock framework support
...
The new clock subsystem was merged in linux-3.4 without any users, this
now moves the first three platforms over to it: imx, mxs and spear.
The series also contains the changes for the clock subsystem itself,
since Mike preferred to have it together with the platforms that require
these changes, in order to avoid interdependencies and conflicts.
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Merge tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc clock driver changes from Olof Johansson:
"The new clock subsystem was merged in linux-3.4 without any users,
this now moves the first three platforms over to it: imx, mxs and
spear.
The series also contains the changes for the clock subsystem itself,
since Mike preferred to have it together with the platforms that
require these changes, in order to avoid interdependencies and
conflicts."
Fix up trivial conflicts in arch/arm/mach-kirkwood/common.c (code
removed in one branch, added OF support in another) and
drivers/dma/imx-sdma.c (independent changes next to each other).
* tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
clk: Provide dummy clk_unregister()
SPEAr: Update defconfigs
SPEAr: Add SMI NOR partition info in dts files
SPEAr: Switch to common clock framework
SPEAr: Call clk_prepare() before calling clk_enable
SPEAr: clk: Add General Purpose Timer Synthesizer clock
SPEAr: clk: Add Fractional Synthesizer clock
SPEAr: clk: Add Auxiliary Synthesizer clock
SPEAr: clk: Add VCO-PLL Synthesizer clock
SPEAr: Add DT bindings for SPEAr's timer
ARM i.MX: remove now unused clock files
ARM: i.MX6: implement clocks using common clock framework
ARM i.MX35: implement clocks using common clock framework
ARM i.MX5: implement clocks using common clock framework
ARM: Kirkwood: Replace clock gating
ARM: Orion: Audio: Add clk/clkdev support
ARM: Orion: PCIE: Add support for clk
ARM: Orion: XOR: Add support for clk
ARM: Orion: CESA: Add support for clk
...
Bug fixes and new features for SPI device drivers. Also move device
tree support code out of drivers/of and into drivers/spi/spi.c where
it makes more sense.
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Merge tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull SPI changes from Grant Likely:
"Bug fixes and new features for SPI device drivers. Also move device
tree support code out of drivers/of and into drivers/spi/spi.c where
it makes more sense."
* tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6:
spi: By default setup spi_masters with 1 chipselect and dynamics bus number
SPI: PRIMA2: use the newest APIs of PINCTRL to fix compiling errors
spi/spi-fsl-spi: reference correct pdata in fsl_spi_cs_control
spi: refactor spi-coldfire-qspi to use SPI queue framework.
spi/omap2-mcspi: convert to the pump message infrastructure
spi/rspi: add dmaengine support
spi/topcliff: use correct __devexit_p annotation
spi: Dont call prepare/unprepare transfer if not populated
spi/ep93xx: clean probe/remove routines
spi/devicetree: Move devicetree support code into spi directory
spi: use module_pci_driver
spi/omap2-mcspi: Trivial optimisation
spi: omap2-mcspi: add support for pm_runtime autosuspend
spi/omap: Remove bus_num usage for instance index
OMAP : SPI : use devm_* functions
spi: omap2-mcspi: convert to module_platform_driver
spi: omap2-mcspi: make it behave as a module
Trivial simplification. Instead of requiring spi master drivers to
always set the bus number (even when a dynamic number is desired),
this patch modifies spi_alloc_master() to initialize num_chipselect to
1 (because there will always be at least one CS) and bus_num to -1 for
dynamic allocation. This simplifies the code needed to be written for
drivers.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Fix the compiling errors:
drivers/spi/spi-sirf.c: In function 'spi_sirfsoc_probe':
drivers/spi/spi-sirf.c:563: error: implicit declaration of function 'pinmux_get'
drivers/spi/spi-sirf.c:563: warning: assignment makes pointer from integer without a cast
drivers/spi/spi-sirf.c:568: error: implicit declaration of function 'pinmux_enable'
drivers/spi/spi-sirf.c:602: error: implicit declaration of function 'pinmux_disable'
drivers/spi/spi-sirf.c:603: error: implicit declaration of function 'pinmux_put'
make[3]: *** [drivers/spi/spi-sirf.o] Error 1
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Commit 178db7d3, "spi: Fix device unregistration when unregistering
the bus master", changed spi device initialization of dev.parent pointer
to be the master's device pointer instead of his parent.
This introduced a bug in spi-fsl-spi, since its usage of spi device
pointer was not updated accordingly. This was later fixed by commit
5039a86, "spi/mpc83xx: fix NULL pdata dereference bug", but it missed
another spot on fsl_spi_cs_control function where we also need to update
usage of spi device pointer. This change address that.
Cc: stable@vger.kernel.org
Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com>
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Use the new SPI queue framework; remove use of workqueue, replace
mcfqspi_transfer with mcfqspi_transfer_one_message, add
mcfqspi_prepare_transfer_hw and mcfqspi_unprepare_transfer_hw, update power
management routines.
Signed-off-by: Steven King <sfking@fdwdc.com>
Acked-by: Greg Ungerer <gerg@snapgear.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch converts the OMAP SPI driver to use the SPI infrastructure
pump message queue.Also fixes the below warning.
master is unqueued, this is deprecated
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds dmaengine supporting using sh_dma driver. The module
receives data by DMAC, it also needs TX DMAC to generate SPI's clocks.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
__devexit functions are discarded when CONFIG_HOTPLUG
is not set, so the symbol needs to be referenced carefully.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'clk-next' of git://git.linaro.org/people/mturquette/linux:
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
clk: Provide dummy clk_unregister()
ARM: Kirkwood: Replace clock gating
ARM: Orion: Audio: Add clk/clkdev support
ARM: Orion: PCIE: Add support for clk
ARM: Orion: XOR: Add support for clk
ARM: Orion: CESA: Add support for clk
ARM: Orion: SDIO: Add support for clk.
ARM: Orion: NAND: Add support for clk, if there is one.
ARM: Orion: EHCI: Add support for enabling clocks
ARM: Orion: SATA: Add per channel clk/clkdev support.
ARM: Orion: UART: Get the clock rate via clk_get_rate().
ARM: Orion: WDT: Add clk/clkdev support
ARM: Orion: Eth: Add clk/clkdev support.
ARM: Orion: SPI: Add clk/clkdev support.
ARM: Orion: Add clocks using the generic clk infrastructure.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/net/ethernet/freescale/fec.c
drivers/spi/spi-imx.c
drivers/tty/serial/imx.c
This resolves dependencies between the pinctrl and clock changes
in imx.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently the prepare/unprepare transfer are called unconditionally.
The assumption is that every driver using the spi core queue infrastructure
has to populate the prepare and unprepare functions. This encourages
drivers to populate empty functions to prevent crashing.
This patch prevents the call to prepare/unprepare if not populated.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[grant.likely: fix whitespace defect]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Use devm_* functions for managing devres resources.
Also use local variable irq and remove irq variable from
struct ep93xx_spi, as it is needed only in probe routine.
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Hannu Heikkinen <hannuxx@iki.fi>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Remove now redundant tclk from SPI platform data. This makes the platform
data empty, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This patch ensures that the last bit of a transfer gets correctly
flushed out of the register.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This condition is used to determine 8 bits or 16 and 32 bits transfer.
Obviously it is reversed.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Since the member was dropped from the common Blackfin header, we need
to stop using it in the SPORT driver too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
No other SPI controller has this field, and SPI clients should be setting
this up in their own drivers. So drop it from the Blackfin controller to
keep people from using it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Each transfer may have its own bits per word.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This controller is only for blackfin 5xx soc, so rename it to BFIN5XX
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Currently, if we request for frequency greater than maximum possible, spi driver
returns error.
For example, if the spi block src frequency is 333/4 MHz, i.e. 83.33.. MHz,
maximum frequency programmable would be src/2. Which would come around 41.6...
It is difficult to pass frequency in these figures. We normally try to program
in round figures, like 42 MHz and it should get programmed to <=
requested_frequency, i.e. 41.6...
For this to happen, we must not return error even if requested freq is higher
than max possible. But should program it to max possible.
Reported-by: Vinit Kamalaksha Shenoy <vinit.shenoy@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We were not properly advertising the MODE bits supported by this driver, fix
that.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We do not need to use a flag to indicate if the master driver is stopping
it is sufficient to perform spi master unregistering in the platform
driver's remove function.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch converts the bcm63xx SPI driver to use the SPI infrastructure
pump message queue. Since we were previously sleeping in the SPI
driver's transfer() function (which is not allowed) this is now fixed as well.
To complete that conversion a certain number of changes have been made:
- the transfer len is split into multiple hardware transfers in case its
size is bigger than the hardware FIFO size
- the FIFO refill is no longer done in the interrupt context, which was a
bad idea leading to quick interrupt handler re-entrancy
Tested-by: Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
A new enum indicating the dma channel direction was introduced by:
commit 49920bc669
dmaengine: add new enum dma_transfer_direction
The following commit changed spi-ep93xx to use the new enum:
commit a485df4b44
spi, serial: move to dma_transfer_direction
In doing so a sparse warning was introduced:
warning: mixing different enum types
int enum dma_data_direction versus
int enum dma_transfer_direction
This is produced because the 'dir' passed in ep93xx_spi_dma_prepare
is an enum dma_data_direction and is being used to set the
dma_slave_config 'direction' which is now an enum dma_transfer_direction.
Fix this by converting spi-ep93xx to use the new enum type in all
places.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
calculate_effective_freq() was still not optimized and there were cases when it
returned without error and with values of cpsr and scr as zero.
Also, the variable named found is not used well.
This patch targets to optimize and correct this routine. Tested for SPEAr.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Vinit Kamalaksha Shenoy <vinit.shenoy@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
the current i.MX clock support groups together unrelated clocks
to a single clock which is then used by the driver. This can't
be accomplished with the generic clock framework so we instead
request the individual clocks in the driver. For i.MX there are
generally three different clocks:
ipg: bus clock (needed to access registers)
ahb: dma relevant clock, sometimes referred to as hclk in the datasheet
per: bit clock, pixel clock
This patch changes the driver to request the individual clocks.
Currently all clk_get will get the same clock until the SoCs
are converted to the generic clock framework
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Newer SoCs from the S3C24XX line, namely S3C2416/2443/2450 contain
hsspi-controllers compatible with the s3c64xx type.
The previous patches enabled platform support for it, so make the
driver also usable for the S3C24xx architecture.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
pl022 ssp controller supports word lengths from 4 to 16 (or 32) bits.
Currently implemented checks were incorrect. It has following check
if (pl022->vendor->max_bpw >= 32)
which must be checking for <=.
Also error print message is incorrect, that prints "range is from 1 to
16".
Fix both these issues.
Signed-off-by: Vinit Shenoy <vinit.shenoy@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Linus Torvalds