Include ACT8945A mfd, regulator and power drivers.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Use the functions from context_tracking.h directly.
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Fixes a build issue without CONFIG_ARM_PMU and plugs pid leak on arm/arm64.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXdSB4AAoJEEtpOizt6ddyg10H/1lQnxqF8K+NOIahMMvDs26N
efujHsGlwHjCQTjThb+BC4qfA2tvcbZ+0UIV0mgvk750llVlrAz83aw83Wvgll9L
hDIwE55yePR9zFeOtTnwLOSIhYyeozSC58RB1OR8oQ1IzHIuokFx/3Iylbk7UjY0
y5LAxdNRWUK7IsFrnC2u8kfYaT+6xxV40KFE23NlCy8drHesrbEPOzDwRpX51u2z
o/68icxpU6TakmTZQwM5RvpgoTn1uEGneSgLSYbVlnHtkA1tr97+fOTFlzmFJyQj
oM7Mk7d9hRSr77dkXKwsDIGVcd0kRvzax2taGHmrrcPgDpkl0PHAfkseWKbb3LI=
=yPs9
-----END PGP SIGNATURE-----
Merge tag 'kvm-arm-for-v4.7-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master
KVM/ARM Fixes for v4.7-rc6:
Fixes a build issue without CONFIG_ARM_PMU and plugs pid leak on arm/arm64.
Add the device tree nodes for the Advanced Power Management Unit (APMU)
and the second Cortex-A15 CPU core.
Use the "enable-method" prop to point out that the APMU should be used
for the SMP support.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
A cleanup to include the headers correctly caused another build problem:
arch/arm/mach-mvebu/kirkwood-pm.c:70:13: error: redefinition of 'kirkwood_pm_init'
arch/arm/mach-mvebu/kirkwood-pm.h:23:20: note: previous definition of 'kirkwood_pm_init' was here
The underlying issue is that kirkwood-pm.o is not actually meant to be
used when CONFIG_PM is disabled, so we should also leave it out of the
Makefile.
The same seems to be true for the PM code in MACH_MVEBU_V7, and I'm
treating it the same way here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: d705c1a66e ("ARM: Kirkwood: fix kirkwood_pm_init() declaration/type")
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Several cases of overlapping changes, except the packet scheduler
conflicts which deal with the addition of the free list parameter
to qdisc_enqueue().
Signed-off-by: David S. Miller <davem@davemloft.net>
Drop dmtimer usage for pulse timer in favor of hrtimer. That allows
removing PWM dmitimer platform data usage.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the upcoming removal of legacy boot, lets add support to one of the
last N900 drivers remaining without it. As the driver still uses omap
dmtimer, add auxdata as well.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert driver to use PWM framework instead of calling dmtimer functions
directly for PWM timer. Remove paragraph about writing to the Free Software
Foundation's mailing address while at it.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adjust the r8a7791 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adjust the r8a7790 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a function to check if other DT based method is available, and
if so return false to not hook up smp_ops from the machine vector.
This results in that DT-based SMP support has priority over older
C-based smp_ops code, and in case DT-based SMP support code does not
exist in the DTB then the old smp_ops code will still work as-is.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to prevent DTB breakage for older
SoCs that do not rely on the enable-method for SMP support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
[geert: Fix CONFIG_SMP=n build]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
shmobile_smp_apmu_prepare_cpus() is used only if CONFIG_SMP=y.
Hence move the #ifdef to cover shmobile_smp_apmu_prepare_cpus() and all
functions only called by it (apmu_init_cpu() and apmu_parse_cfg()).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to the datasheet, the frequency of the ARM architecture timer
on R-Car V2H depends on the frequency of the ZS clock, just like on
R-Car E2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On some R-Car Gen2 SoCs, the frequency of the ARM architecture timer
depends on the frequency of the external clock crystal. Currently the
latter is determined indirectly from the state of the mode pins, which
is a relic predating DT.
Obtain the external clock crystal frequency from DT instead, removing
the dependency on the mode pins.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On R-Car H1 and Gen2, the SYSC interrupt registers are always configured
using hardcoded values in platform code. For R-Car Gen2, values are
provided for H2 and M2-W only, other SoCs are not yet supported, and
never will be.
Move this configuration from SoC-specific platform code to the
rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured
from DT. This would be the case not only for H1, H2, and M2-W using a
modern DTS, but also for other R-Car Gen2 SoCs not supported by the
platform code, relying purely on DT.
There is no longer a need to return the mapped register block, hence
make the function return void.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core. Use the enable-method to point out that the APMU
should be used for SMP support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DT node for the Advanced Power Management Units (APMU), and use
the enable-method to point out that the APMU should be used for SMP
support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT nodes for the Advanced Power Management Units (APMU), and use the
enable-method to point out that the APMU should be used for SMP
support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the console alias to "serial0", for consistency with other
boards (the first unlabeled serial port is always called "serial0").
This does change the serial console from /dev/ttySC4 to /dev/ttySC0.
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Drop the "console=" parameters from the kernel command line, as they're
no longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a "serial1" alias for the serial console (it is labeled "uart1").
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Drop the "console=" parameter from the kernel command line, as it's no
longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the console alias to "serial0", for consistency with other
boards (the first unlabeled serial port is always called "serial0").
This does change the serial console from /dev/ttySC2 to /dev/ttySC0.
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the console alias to "serial0", for consistency with other
boards (the first unlabeled serial port is always called "serial0").
This does change the serial console from /dev/ttySC1 to /dev/ttySC0.
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Drop the "console=" parameters from the kernel command line, as they're
no longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Structures that can be generally written to don't have any requirement
to be executable (quite the opposite). This includes the kvm and vcpu
structures, as well as the stacks.
Let's change the default to incorporate the XN flag.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
There should be no reason for mapping the HYP text read/write.
As such, let's have a new set of flags (PAGE_HYP_EXEC) that allows
execution, but makes the page as read-only, and update the two call
sites that deal with mapping code.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
In order to be able to use C code in HYP, we're now mapping the kernel's
rodata in HYP. It works absolutely fine, except that we're mapping it RWX,
which is not what it should be.
Add a new HYP_PAGE_RO protection, and pass it as the protection flags
when mapping the rodata section.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Currently, create_hyp_mappings applies a "one size fits all" page
protection (PAGE_HYP). As we're heading towards separate protections
for different sections, let's make this protection a parameter, and
let the callers pass their prefered protection (PAGE_HYP for everyone
for the time being).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The PMIC driver used to register itself as poweroff controller by
default, hence assuming that this device is using the PMIC as
system power controller.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch fixes the following DTC warnings for am57xx-sbc-am57x.dtb:
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap5-igep0050.dtb,
omap5-sbc-t54.dtb and omap5-uevm.dtb:
"connector@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"encoder@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap5-cm-t54.dtb:
"connector@0 has a unit name, but no reg property"
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am437x-sbc-t43.dtb:
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am437x-gp-evm.dtb:
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am43xx-epos-evm.dtb:
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-var-dvk-om44.dtb
and omap4-var-stk-om44.dtb:
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-sdp.dtb
and omap4-sdp-es23plus.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-panda.dtb,
omap4-panda-a4.dtb and omap4-panda-es.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"encoder@1 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-duovero-parlor.dtb:
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-thunder.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-sbc-t3517.dtb,
omap3-sbc-t3530.dtb and omap3-sbc-t3730.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-pandora-600mhz.dtb
and omap3-pandora-1ghz.dtb:
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-overo-summit.dtb,
omap3-overo-storm-tobi.dtb, omap3-overo-storm-summit.dtb and
omap3-overo-tobi.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-igep0020.dtb
and omap3-igep0020-rev-f.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-overo-gallop43.dtb,
omap3-overo-chestnut43.dtb, omap3-overo-storm-chestnut43.dtb,
omap3-overo-palo43.dtb, and omap3-overo-storm-palo43.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-ha-lcd.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-gta04a3.dtb,
omap3-gta04a4.dtb and omap3-gta04a5.dtb:
"dmtimer-pwm@11 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-devkit8000-lcd43.dtb
and omap3-devkit8000-lcd70.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-devkit8000.dtb,
omap3-devkit8000-lcd43.dtb and omap3-devkit8000-lcd70.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-cm-t3517.dtb,
omap3-cm-t3530.dtb and omap3-cm-t3730.dtb:
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-beagle-xm.dtb:
"encoder@0 has a unit name, but no reg property"
"encoder@0/ports/port@0/endpoint@0 has a unit name, but no reg property"
"encoder@0/ports/port@1/endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-beagle.dtb:
"encoder@0 has a unit name, but no reg property"
"encoder@0/ports/port@0/endpoint@0 has a unit name, but no reg property"
"encoder@0/ports/port@1/endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-n900.dtb:
"dmtimer-pwm@9 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"dmtimer-pwm@10 has a unit name, but no reg property"
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am3517-craneboard.dtb:
"fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap2430-sdp.dtb:
"func_96m_ck has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix pll3x2 and pll7x2 not having a parent clock, specifically this
fixes the kernel turning of pll3 while simplefb is using it when
uboot has configured things to use pll3x2 as lcd ch clk parent.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for the Broadcom BCM953012 Enterprise Router reference
board, enable the following peripherals:
- UART0 (UART1 is not populated)
- WPS and restart GPIO buttons
- Ethernet switch w/ only two facing ports
- NAND flash
- SPI-NOR flash
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The two functions hix5hd2_set_scu_boot_addr() and
hip01_set_boot_addr() are not declared or exported
outside arch/arm/mach-hisi/platsmp.c file. Avoid
the following warnings by making them static:
arch/arm/mach-hisi/platsmp.c:142:6: warning: symbol 'hip01_set_boot_addr' was not declared. Should it be static?
arch/arm/mach-hisi/platsmp.c:106:6: warning: symbol 'hix5hd2_set_scu_boot_addr' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add "ti,cpsw-mdio" for am335x/am437x/dra7 SoCs where MDIO is
implemented as part of TI CPSW and, this way, enable PM runtime auto
suspend for Davinci MDIO driver on these paltforms.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_INTEGRATOR_AP_TIMER and is selected
by the platform. Then the clocksource's Kconfig is changed to make this
option selectable by the user if the COMPILE_TEST option is set. Otherwise,
it is up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_KEYSTONE_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_NSPIRE_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_U300_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Due on the delay specific code, this driver will compile only on the ARM
architecture.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_PRIMA2_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_MXS_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_MOXART_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_ATLAS7_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_CLPS711X_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_BCM_KONA_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_BCM2835_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it
is up to the platform's Kconfig to select the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
All the clocksource drivers's init function are now converted to return
an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the
clksrc-of table.
Let's convert back the names:
- CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE
- clksrc-of-ret => clksrc-of
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
For exynos_mct and samsung_pwm_timer:
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
For arch/arc:
Acked-by: Vineet Gupta <vgupta@synopsys.com>
For mediatek driver:
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
For the Rockchip-part
Acked-by: Heiko Stuebner <heiko@sntech.de>
For STi :
Acked-by: Patrice Chotard <patrice.chotard@st.com>
For the mps2-timer.c and versatile.c changes:
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
For the OXNAS part :
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
For LPC32xx driver:
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
For Broadcom Kona timer change:
Acked-by: Ray Jui <ray.jui@broadcom.com>
For Sun4i and Sun5i:
Acked-by: Chen-Yu Tsai <wens@csie.org>
For Meson6:
Acked-by: Carlo Caione <carlo@caione.org>
For Keystone:
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
For NPS:
Acked-by: Noam Camus <noamca@mellanox.com>
For bcm2835:
Acked-by: Eric Anholt <eric@anholt.net>
The init functions do not return any error. They behave as the following:
- panic, thus leading to a kernel crash while another timer may work and
make the system boot up correctly
or
- print an error and let the caller unaware if the state of the system
Change that by converting the init functions to return an error conforming
to the CLOCKSOURCE_OF_RET prototype.
Proper error handling (rollback, errno value) will be changed later case
by case, thus this change just return back an error or success in the init
function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Looks like I only partially fixed up things if CONFIG_SMP
is not set for the recent kexec changes. We don't have
boot_secondary available without SMP as reported by Arnd.
Fixes: 0573b957fc ("ARM: OMAP4+: Prevent CPU1 related hang with kexec")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the Computer on Module Colibri iMX7S/iMX7D along
with the development/evaluation carrier board device trees. Follow
the usual hierarchic include model, maintaining shared configuration
in imx7-colibri.dtsi and imx7-colibri-eval-v3.dtsi respectively.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The base device tree uses KEY_POWER in the snvs-powerkey node,
hence include the input.h header file in the base device tree.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7Solo implements a subset of features available on
i.MX 7Dual. Recreate imx7s.dtsi as the base device tree for
i.MX 7Dual boards. The i.MX 7Dual's additional features over
i.MX 7Solo are:
- Second Cortex-A7 core
- Second Gigabit Ethernet controller
- EPD (Electronc Paper Display, not yet part of the device tree)
- PCIe (not yet part of the device tree)
- Additional USB2.0 OTG controller
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and
7Dual. The former has a subset of features of the latter, hence
use imx7s.dtsi as the new base device tree. To keep diffstat nice,
just move imx7d.dtsi to imx7s.dtsi temporarily and recreate
imx7d.dtsi in a second commit.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Most peripherals on the i.MX51 have an Off-Platform Peripheral Access
Control Register (OPACR) in which the access rights (together with the
MPROT registers) can be declared.
However, this does not seem to work for example for SSI1+SDMA, because the
supervisor bit is not set for the SDMA unit.
A similar problem was described in the patch for i.MX53 CPU
(ARM: i.MX53: globally disable supervisor protect), and the same solution
is applicable for i.MX51 CPU.
Patch has tested on custom board based on Digi CCMX-51 module (i.MX51).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The mxc_cpu_type and cpu_is_mx() logic is largely unused, and the
few remaining users were easy to convert into simpler code. Now that
they are gone, we can remove all those macros as well.
The related cpu_is_imx6*() set of function unfortunately is harder
to remove, so those are staying around for now.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The check for cpu_is_mx51/cpu_is_mx53() in mx51_revision()/mx53_revision()
is just a safety precaution, but there are only two callers of this
are using it only on the correct CPUs, and none of the other respective
functions have this extra check.
Removing these lets us kill off the cpu_is_* functions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
mx27_pm_init() uses its own initcall, unlike all of the other
functions like it. Replacing the initcall with a .init_late()
callback makes imx27 more like the others and lets us remove
the last caller of cpu_is_mx27().
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx31 and imx35 idle functions are almost the same, but we
currently have to check the cpu type every time. This can be
simplified by moving the logic from mx3_cpu_lp_set() into
two separate idle functions, removing the last user of
cpu_is_mx35.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The rnga platform device is initialized for all imx31 machines
from its own initcall, but is never initialized anywhere else.
This moves the platform device creation into both the imx31
dt and non-dt machine init sequences, which has basically the
exact same effect as before, but makes it more obvious what
is going on, while reducing the amount of code and removing
the last user of cpu_is_mx31().
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is only one call site for this, and it's easily replaced
by initializing the reset value at boot time.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
bx50v3 boards can be powered off via GPIO, this patch specifies the GPIO to
be used with the gpio-poweroff driver.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for cortex-a7-pmu present on ipq4019 SoCs.
Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This is the first Dragonboard based on APQ8060 and PM8058. It
was produced in 2011 in cooperation between Qualcomm and
BSQUARE.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
There is currently a fixed regulator in the .dtsi file for
the MSM8660 chipset, used by the SURF board. We want to define
real regulators for a board using this chipset, so push the fixed
regulator down to the SURF board which is the only user.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The RTC was defined on 0x11d but on the MSM8660/APQ8060 it is
actually on 0x1e8. We were saved by the fact that the driver does
not use the reg parameter: instead it uses the compatible string
to figure out where the RTC is.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The I2C block on the GSBI12 is used on the APQ8060 Dragonboard for
sensors. Make it available in the chipset file.
Take this opportunity to fix the IRQ flag "0" to "NONE" using the
IRQ DT include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the L2CC IPC resource and RPM devices plus the nodes
for the PM8901 and PM8058 regulators to the MSM8660 device tree.
This was tested on the APQ8060 Dragonboard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The SDCC5 SD/MMC controller is used for a second uSD slot
on the APQ8060 Dragonboard. On most other systems it is just
dark silicon so define it and leave it as "disabled" in the core
SoC file.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660
DTSI. Verified against the vendor tree to be in these locations
with these interrupts, tested on the APQ8060 Dragonboard.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since the pmic8xxx-pwrkey driver is already supported in the
qcom-apq8064.dtsi, and the pmic8xxx-pwrkey supports logic to
configure proper device shutdown when ps_hold goes low, it is
better to use that driver then a generic gpio button.
Thus this patch remove the gpio power key entry here, so we
don't get double input events from having two drivers enabled.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch updates the qcom,state-cells to qcom,smem-state-cells to
match recent changes to the binding.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the qcom,controlled-remotely property for the blsp2_bam
controller node. This board requires this, otherwise the board fails to
boot due to access of protected registers during BAM initialization.
Fixes: 62bc817922 dts: msm8974: Add blsp2_bam dma node
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This board locks up if we stress test the eMMC, as the regulator s4 is
unable to supply enough current for all the peripherials attached to it.
As this supply is wired up to most of the peripherials including DDR,
it resulted in such lockup.
This patch fixes this issue by setting s4 regulator correctly with
Auto power mode.
Reported-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[Srinivas Kandagatla: rewrote the change log]
Tested-by: Girish Sharma <girish.sharma@einfochips.com>
Signed-off-by: Parth Pancholi <parth.pancholi@einfochips.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This board has been renamed recently and announced at
https://eragon.einfochips.com/products/sd-600eval.html
So rename this board files so that it reflects actual product in market.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch move sdcc3 pinctrl nodes out of board file, so that
other boards do not duplicate the same thing.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch moves out the sdcc1 pinctrl nodes out of board files to soc file,
so that it will be duplicated in other board files.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Initial release for rk3229 evb board, and turn the GMAC on.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We have the brother chipset that RK3228 and RK3229, they share most
of dts configuration, but there are a number of different features.
In order to develop the future when they are easy to distinguish,
we need them to be independent.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the DT node for the random number generator peripheral.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
kvm provides kvm_vcpu_uninit(), which amongst other things, releases the
last reference to the struct pid of the task that was last running the vcpu.
On arm64 built with CONFIG_DEBUG_KMEMLEAK, starting a guest with kvmtool,
then killing it with SIGKILL results (after some considerable time) in:
> cat /sys/kernel/debug/kmemleak
> unreferenced object 0xffff80007d5ea080 (size 128):
> comm "lkvm", pid 2025, jiffies 4294942645 (age 1107.776s)
> hex dump (first 32 bytes):
> 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> backtrace:
> [<ffff8000001b30ec>] create_object+0xfc/0x278
> [<ffff80000071da34>] kmemleak_alloc+0x34/0x70
> [<ffff80000019fa2c>] kmem_cache_alloc+0x16c/0x1d8
> [<ffff8000000d0474>] alloc_pid+0x34/0x4d0
> [<ffff8000000b5674>] copy_process.isra.6+0x79c/0x1338
> [<ffff8000000b633c>] _do_fork+0x74/0x320
> [<ffff8000000b66b0>] SyS_clone+0x18/0x20
> [<ffff800000085cb0>] el0_svc_naked+0x24/0x28
> [<ffffffffffffffff>] 0xffffffffffffffff
On x86 kvm_vcpu_uninit() is called on the path from kvm_arch_destroy_vm(),
on arm no equivalent call is made. Add the call to kvm_arch_vcpu_free().
Signed-off-by: James Morse <james.morse@arm.com>
Fixes: 749cf76c5a ("KVM: ARM: Initial skeleton to compile KVM support")
Cc: <stable@vger.kernel.org> # 3.10+
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This commit makes a few slight modifications to the efi_call_virt() macro
to get it to work with function pointers that are stored in locations
other than efi.systab->runtime, and renames the macro to
efi_call_virt_pointer(). The majority of the changes here are to pull
these macros up into header files so that they can be accessed from
outside of drivers/firmware/efi/runtime-wrappers.c.
The most significant change not directly related to the code move is to
add an extra "p" argument into the appropriate efi_call macros, and use
that new argument in place of the, formerly hard-coded,
efi.systab->runtime pointer.
The last piece of the puzzle was to add an efi_call_virt() macro back into
drivers/firmware/efi/runtime-wrappers.c to wrap around the new
efi_call_virt_pointer() macro - this was mainly to keep the code from
looking too cluttered by adding a bunch of extra references to
efi.systab->runtime everywhere.
Note that I also broke up the code in the efi_call_virt_pointer() macro a
bit in the process of moving it.
Signed-off-by: Alex Thorlton <athorlton@sgi.com>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Roy Franz <roy.franz@linaro.org>
Cc: Russ Anderson <rja@sgi.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1466839230-12781-5-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
- dts: rename 'ide-disk' to 'disk-activity'
- platform: rename 'ide-disk' to 'disk-activity'
- defconfig: rename 'LEDS_TRIGGER_IDE_DISK' to 'LEDS_TRIGGER_DISK'
Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
The Virtual Video Test Driver can be used to emulate video capture and
output devices so it's very useful for testing. Since is not necessary
to boot, can be enabled as module to avoid increasing the kernel size.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The Virtual Video Test Driver can be used to emulate video capture and
output devices so it's very useful for testing. Since is not necessary
to boot, can be enabled as module to avoid increasing the kernel size.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Various I/O memory fix for Cortex A9 based SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAldo+JYACgkQCwYYjhRyO9XI5QCglOxAOJSamD5IgIpMklk/5ZpG
/MEAn0j80ClwN+YB+/eii/iUMwHwMDQe
=iyoH
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.7-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.7 (part 1)
Various I/O memory fix for Cortex A9 based SoCs
* tag 'mvebu-fixes-4.7-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-38x: fix MBUS_ID for crypto SRAM on Armada 385 Linksys
ARM: mvebu: map PCI I/O regions strongly ordered
ARM: mvebu: fix HW I/O coherency related deadlocks
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for Qualcomm MDM9615 in Kconfig and in DT match list.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
After enabling this I get pins, GPIO, keys and everything on
the MSM8660 surf (APQ8660 DragonBoard).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This is the third version of the patchset previously sent [1]. I have
basically only rebased it on top of 4.7-rc1 tree and dropped "dm: get
rid of superfluous gfp flags" which went through dm tree. I am sending
it now because it is tree wide and chances for conflicts are reduced
considerably when we want to target rc2. I plan to send the next step
and rename the flag and move to a better semantic later during this
release cycle so we will have a new semantic ready for 4.8 merge window
hopefully.
Motivation:
While working on something unrelated I've checked the current usage of
__GFP_REPEAT in the tree. It seems that a majority of the usage is and
always has been bogus because __GFP_REPEAT has always been about costly
high order allocations while we are using it for order-0 or very small
orders very often. It seems that a big pile of them is just a
copy&paste when a code has been adopted from one arch to another.
I think it makes some sense to get rid of them because they are just
making the semantic more unclear. Please note that GFP_REPEAT is
documented as
* __GFP_REPEAT: Try hard to allocate the memory, but the allocation attempt
* _might_ fail. This depends upon the particular VM implementation.
while !costly requests have basically nofail semantic. So one could
reasonably expect that order-0 request with __GFP_REPEAT will not loop
for ever. This is not implemented right now though.
I would like to move on with __GFP_REPEAT and define a better semantic
for it.
$ git grep __GFP_REPEAT origin/master | wc -l
111
$ git grep __GFP_REPEAT | wc -l
36
So we are down to the third after this patch series. The remaining
places really seem to be relying on __GFP_REPEAT due to large allocation
requests. This still needs some double checking which I will do later
after all the simple ones are sorted out.
I am touching a lot of arch specific code here and I hope I got it right
but as a matter of fact I even didn't compile test for some archs as I
do not have cross compiler for them. Patches should be quite trivial to
review for stupid compile mistakes though. The tricky parts are usually
hidden by macro definitions and thats where I would appreciate help from
arch maintainers.
[1] http://lkml.kernel.org/r/1461849846-27209-1-git-send-email-mhocko@kernel.org
This patch (of 19):
__GFP_REPEAT has a rather weak semantic but since it has been introduced
around 2.6.12 it has been ignored for low order allocations. Yet we
have the full kernel tree with its usage for apparently order-0
allocations. This is really confusing because __GFP_REPEAT is
explicitly documented to allow allocation failures which is a weaker
semantic than the current order-0 has (basically nofail).
Let's simply drop __GFP_REPEAT from those places. This would allow to
identify place which really need allocator to retry harder and formulate
a more specific semantic for what the flag is supposed to do actually.
Link: http://lkml.kernel.org/r/1464599699-30131-2-git-send-email-mhocko@kernel.org
Signed-off-by: Michal Hocko <mhocko@suse.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: "Theodore Ts'o" <tytso@mit.edu>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chen Liqin <liqin.linux@gmail.com>
Cc: Chris Metcalf <cmetcalf@mellanox.com> [for tile]
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jan Kara <jack@suse.cz>
Cc: John Crispin <blogic@openwrt.org>
Cc: Lennox Wu <lennox.wu@gmail.com>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rich Felker <dalias@libc.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The davinci-i2s driver ("davinci-mcbsp") does not use platform
data any longer. Remove the dummy pdata provided by the board
drivers dm355, dm365, dm644x and neuros-osd2.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Describe JPEG Processing Unit (JPU) in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add JPU clock and its parent, M2 clock to the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the (previously omitted) DU pin data to the SILK board's device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On systems with PCI_PROBE_ONLY set, we rely on BAR assignments from
firmware. Previously we did not insert those resources into the resource
tree, so we had to skip pci_enable_resources() because it fails if
resources are not in the resource tree.
Now that we *do* insert resources even when PCI_PROBE_ONLY is set, we no
longer need the ARM-specific pcibios_enable_device(). Remove it so we
use the generic version.
[bhelgaas: changelog]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Russell King <linux@arm.linux.org.uk>
We claim PCI BAR and bridge window resources in pci_bus_assign_resources(),
but when PCI_PROBE_ONLY is set, we treat those resources as immutable and
don't call pci_bus_assign_resources(), so the resources aren't put in the
resource tree.
When the resources aren't in the tree, they don't show up in /proc/iomem,
we can't detect conflicts, and we need special cases elsewhere for
PCI_PROBE_ONLY or resources without a parent pointer.
Claim all PCI BAR and window resources in the PCI_PROBE_ONLY case.
If a PCI_PROBE_ONLY platform assigns conflicting resources, Linux can't fix
the conflicts. Previously we didn't notice the conflicts, but now we will,
which may expose new failures.
[bhelgaas: changelog, add resource comment, remove size/assign comments]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Russell King <linux@armlinux.org.uk>
Use helper of_platform_default_populate() in linux/of_platform
when possible, instead of calling of_platform_populate() with
the default match table.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Krzysztof Halasa <khalasa@piap.pl>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Roland Stigge <stigge@antcom.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Viresh Kumar <vireshk@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Rob Herring <robh@kernel.org>
After patch "of/platform: Add common method to populate default bus",
it is possible for arch code to remove unnecessary callers of
of_platform_populate with default match table.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Lee Jones <lee@kernel.org>
Cc: Krzysztof Halasa <khalasa@piap.pl>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Roland Stigge <stigge@antcom.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Viresh Kumar <vireshk@kernel.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Rob Herring <robh@kernel.org>
The of_iommu_init() is called multiple times by arch code,
make it postcore_initcall_sync, then we can drop relevant
calls fully.
Note, the IOMMUs should have a chance to perform some basic
initialisation before we start adding masters to them. So
postcore_initcall_sync is good choice, it ensures of_iommu_init()
called before of_platform_populate.
Acked-by: Rich Felker <dalias@libc.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Rich Felker <dalias@libc.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Rob Herring <robh@kernel.org>
This patch fixes an old bug where requests can be reordered because
some are processed by cryptd while others are processed directly
in softirq context.
The fix is to always postpone to cryptd if there are currently
requests outstanding from the same tfm.
This patch also removes the redundant use of cryptd in the async
init function as init never touches the FPU.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
We need to reset CPU1 properly for kexec when booting different
kernel versions. Otherwise CPU1 will attempt to boot the the
previous kernel's start_secondary(). Note that the restctrl
register is different from the low-power mode wakeup register
CPU1_WAKEUP_NS_PA_ADDR. We need to configure both.
Let's fix the issue by defining SoC specific data to initialize
things in a more generic way. And let's also standardize omap-smp.c
to use soc_is instead of cpu_is while at it.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Kexec booted kernels on omap4 will hang early during the boot if the
booted kernel is different version from the previous kernel.
This is because the previous kernel may have configured low-power mode
using CPU1_WAKEUP_NS_PA_ADDR. In that case it points to the previous
kernel's omap4_secondary_startup(), and CPU1 can be in low power mode
from the previous kernel. When the new kernel configures the CPU1
clockdomain, CPU1 can wake from low power state prematurely during
omap44xx_clockdomains_init() running random code.
Let's fix the issue by configuring CPU1_WAKEUP_NS_PA_ADDR before we
call omap44xx_clockdomains_init(). Note that this is very early during
the init, and we will do proper CPU1 reset during SMP init a bit later
on in omap4_smp_prepare_cpus(). And we need to do this when SMP is
not enabled as the previous kernel may have had it enabled.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Prepare things for making kexec work on SMP omap variants by initializing
SARM RAM base early. This allows us to configure CPU1 for kexec in case
the previous kernel has put CPU1 in low power mode.
Note that this should not prevent moving other SAR RAM code to live
under drivers. However for kexec, we will need this very early.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that we don't support ARMv3 anymore, the loop based delay code can
convert microsecs into number of loops using a 64-bit multiplication
and more precision.
This allows us to lift the hard limit of 3355 on the bogomips value as
loops_per_jiffy may now safely span the full 32-bit range.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix the following warnings by including declarations
from <asm/prom.h>:
arch/arm/kernel/devtree.c:69:13: warning: symbol 'arm_dt_init_cpu_maps' was not declared. Should it be static?
arch/arm/kernel/devtree.c:210:27: warning: symbol 'setup_machine_fdt' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 3939f33450 ("ARM: 8418/1: add boot image dependencies to
not generate invalid images") fixed bad image generation for the
parallel building, but as its side effect, Kbuild now descends into
arch/arm/boot/ again and again, duplicating the log messages.
It looks clumsy, so let's display the same message only once.
This commit moves the log rules from arch/arm/boot/Makefile to
arch/arm/Makefile. I did not delete them completely because *Image
are the final targets that users are interested in.
Without this commit, the log of incremental build is like follows:
$ make ARCH=arm UIMAGE_LOADADDR=0x80208000 uImage
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK include/generated/bounds.h
CHK include/generated/timeconst.h
CHK include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
CHK include/generated/compile.h
Kernel: arch/arm/boot/Image is ready
Kernel: arch/arm/boot/Image is ready
Kernel: arch/arm/boot/zImage is ready
Kernel: arch/arm/boot/Image is ready
Kernel: arch/arm/boot/zImage is ready
Image arch/arm/boot/uImage is ready
With this commit, it will look like follows:
$ make ARCH=arm UIMAGE_LOADADDR=0x80208000 uImage
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK include/generated/bounds.h
CHK include/generated/timeconst.h
CHK include/generated/asm-offsets.h
CALL scripts/checksyscalls.sh
CHK include/generated/compile.h
Kernel: arch/arm/boot/Image is ready
Kernel: arch/arm/boot/zImage is ready
Kernel: arch/arm/boot/uImage is ready
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Set no bits, mask all bits in the AUX l2x0 register for the
default DT ARM system: if anything needs to be modified, it
should be done using DT bindings.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the code duplication between put_user() and __put_user(). The
code which selected the implementation based upon the pointer size, and
declared the local variable to hold the value to be put are common to
both implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since commit 8c56cc8be5 ("ARM: 7449/1: use generic strnlen_user and
strncpy_from_user functions"), the definition of __addr_ok() has been
languishing unused; eradicate the sucker.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Get rid of the horrible "*(unsigned int *)(regs + 1)" to get at the
parent context domain access register value, instead using the newly
introduced svc_pt_regs structure.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since the privileged mode pt_regs are an extended version of the saved
userland pt_regs, introduce a new svc_pt_regs structure to describe this
layout.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
S_FRAME_SIZE is no longer the size of the kernel stack frame, so this
name is misleading. It is the size of the kernel pt_regs structure.
Name it so.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
As per the TRM: http://www.ti.com/lit/ug/spruh73m/spruh73m.pdf
offset 0x4 is reserved for PRM_PER. Hence removing the wrongly
defined address offset.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The declaration of s5p_init_cpu() in arch/arm/mach-exynos/common.h
is not included in the platform file arch/arm/plat-samsung/cpu.c
which generates a warning.
Fix the following warning by moving the declaration to somewhere
both the machine and platform code can get to it, and including
the right files as necessary:
arch/arm/plat-samsung/cpu.c:47:13: warning: symbol 's5p_init_cpu' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The ti81xx_rtc_hwmod is not exported, or declared outside the file
arch/arm/mach-omap2/omap_hwmod_81xx_data.c so make it static to
avoid the following warning:
arch/arm/mach-omap2/omap_hwmod_81xx_data.c:246:19: warning: symbol 'ti81xx_rtc_hwmod' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
pruss hwmod RSTST register wrongly points to PWRSTCTRL register in case of
am43xx. Fix the RSTST register offset value.
This can lead to setting of wrong power state values for PER domain.
Fixes: 1c7e224d ("ARM: OMAP2+: hwmod: AM335x: runtime register update")
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that we've a clock node describing pll3 we must add it to the
simplefb nodes clocks lists to avoid it getting turned off when
simplefb is used.
This fixes the screen going black when using simplefb.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Adding dt node for hardware random number generator IP.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC has the same SHA IP as OMAP5. Add DT entry for the same.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: changed SHA to use EDMA instead of SDMA]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC has the same AES IP as OMAP4. Add DT entries for both AES cores.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squashed in the change to use EDMA, squashed in
support for two AES cores]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Exynos542x SoCs using A15+A7 can boot to A15 or A7. If it boots using
A7 (like on Odroid XU family boards), it can't choose right UART
physical address only the part number of CP15. Fix the detection logic
by checking the Cluster ID additionally.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.kozlowski: Extend commit message]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The declaration of keystone_pm_runtime_init() is not included
from keystone.h in pm_domain.c. Including the file fixes the
following sparse warning:
arch/arm/mach-keystone/pm_domain.c:37:12: warning: symbol 'keystone_pm_runtime_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
For callers of pci_common_init_dev(), we previously always required a PCI
I/O port resource. If the caller's ->setup() function had added an I/O
resource, we used that; otherwise, we added a default 64K I/O port space
for it.
There are PCI host bridges that do not support I/O port space, and we
should not add fictitious spaces for them.
If a caller sets struct hw_pci.io_optional, assume it is responsible for
adding any I/O port resource it desires, and do not add any default I/O
port space.
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Fix a pair of missing statics on un-exported functions and
include <linux/platform_data/atmel.h> to provide the declaration
of at91_suspend_entering_slow_clock() to fix the following
sparse warnings:
arch/arm/mach-at91/pm.c:127:5: warning: symbol 'at91_suspend_entering_slow_clock' was not declared. Should it be static?
arch/arm/mach-at91/pm.c:358:6: warning: symbol 'at91rm9200_idle' was not declared. Should it be static?
arch/arm/mach-at91/pm.c:367:6: warning: symbol 'at91sam9_idle' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
There's no need to explicitly call l2x0_of_init() since it will be
called as a part of init_IRQ() (see arch/arm/kernel/irq.c for
details). This way we can simplify imx_init_l2cache() and ditch the call
to it on i.MX35 (which does not claim compatibility with
"arm,pl310-cache") alltogether.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Update Prefetch Control Register settings to match that of Freescale's
Linux tree. As the commit e3addf1b773964eac7f797e8538c69481be4279c
states (author Nitin Garg):
"... set Prefetch offset to 15, since it improves memcpy performance by
35%. Don't enable Incr double Linefill enable since it adversely affects
memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K
to 16MB sized src and dst aligned buffer..."
Those results are also corroborated by our own testing.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Applying a fix for ARM errata 752271 would already be taken care by a
call to a 'fixup' hook as a part of l2x0_of_init() -> __l2c_init() call
chain. Moreso the code in 'fixup' function would do that based on the
PL310's revsion information, whereas removed code does so based on SoC
version which does not work very well on i.MX6Q+ which identifies itself
as i.MX6Q as well but is not affected by 752271.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Using goto here doesn't bring any advantages and only makes the code
flow less clear. No functional changes.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The <soc/imx/cpuidle.h> file has declarations of two funcitons
exported from cpuidle-imx6q.c but it is not included. Fix the
following warnings by adding the include:
arch/arm/mach-imx/cpuidle-imx6q.c:71:6: warning: symbol 'imx6q_cpuidle_fec_irqs_used' was not declared. Should it be static?
arch/arm/mach-imx/cpuidle-imx6q.c:76:6: warning: symbol 'imx6q_cpuidle_fec_irqs_unused' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit adds the stdout-path propety in /chosen for all Beaglebone
boards.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix the PMU code endian access code to deal with kernels built for
big endian operation by changing the __raw IO accessors to the
_relaxed variants.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Fix the use of __raw accesors in pm-common.c to use the _relaxed
variants to deal with any issues due to endian related fetches.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Fix the PMU code endian access code to deal with kernels built for big endian
operation.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
If the kernel is built big endian, then using the __raw read and write IO
accessors is not going to work as they end up writing big-endian data to
little-endian IO registers. Fix this by using the readl and writel relaxed
versions which ensure little endian IO.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
If the system is built for big endian, then the CPU identificaiton register
will be read in the wrong order. Fix this by using readl_relaxed() on the
register.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The exynos low-level debug macros need to be fixed if the system is being
built big endian. Add the necessary endian swaps for accessing the registers
to get output working again
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
IRQ number should be translated from VIRQ to HWIRQ for TZIC.
As a solution for this issue, move existing translation code
from AVIC to common place.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Few fixes to remove build warnings with W=1
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXYqwfAAoJEABBurwxfuKYN44QAI/lNznZw0PZhKCzpXJyyr37
le42sQtCxEv9qjklzXS0zi9PXBGIZJ/yPH8HkcrKYUWM0UJjQVbpyD4zDCDBAu4A
6R1aO/BDedTeDg78NOJlJQrH8D4lSeYYVPZRkFrEqNRtqTaRvafRFhgiFSZfHTSI
vi8znwgYd1a2pw5pb5AaneV2dHGsILDEg0E7z/jOYj0M0t4HTGUolZvJgwJjddJa
gEF0RmO8jvKVXlGLhq6B5BeHWG88HorTpdJajr/9A8+SuCPLllOHeXdy/pPpgskr
ojeTTCWcUP7vsVdnpLuK70R+i+d1UPQ+om1CSv6y6pJ30o7qZVd8lxS71SLw8X/r
QtkUtwK85AGEffG3XpoAvh75laQwBVumFUvRn0NxxtM/xw/z/GU2vPB8KLvor4Pu
9CkKMs587CBQHDEoPKCQfkknICCh8fQMUkUDfYee6DDaGEzFVhKaLI2P2cM7tOFk
ZcnBj/0RKBKsIvBNtDvATrsp044bNbsB/3/sDCvm8m9G5mAvAF8Z+0/K2yg1dYWg
qu4UfBj3X3S1ukwt8Mf8rh21uD8/H9ajtffWgY+dRvLajqVpxjJO+prg7AioAeCQ
ng+5aIUbqWKOkYwY5WArpiQXFLYwdNdjSWEEiL7CUMLFKUvwA5HuhTntPJl2kHUb
94bRbhQyf9HTvTbc0krR
=Izhy
-----END PGP SIGNATURE-----
Merge tag 'vexpress-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/cleanup
ARMv7 VExpress fixes for v4.8
Few fixes to remove build warnings with W=1
* tag 'vexpress-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
power: vexpress: make dev_attr_active static
ARM: vexpress/spc: fix missing include of spc.h
ARM: versatile: fix missing <plat/platsmp.h> include
ARM: vexpress/hotplug: fix missing core.h include
ARM: vexpress/spc: remove unused variable perf_stat_reg
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable the PL330 DMA and DMATEST on SoCFPGA.
make savedefconfig says CONFIG_FHANDLE is not needed in the defconfig,
remove it.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Also enable DMATEST as a kernel module
- Florian enables support for the BCM63xx DSL SoCs basic peripherals, enables
the networking subsystems for Set Top Box SoCs, enables the PWM, watchdog and
the AHCI controller and SATA PHY drivers
- Florian removes the bcm_defconfig file which is no longer useful and updates
multi_v7_defconfig to include the Kona watchdog to provide proper reboot for the
Broadcom Kona platforms
Please note that Tejun Heo has queued a patch which renames AHCI_BRCMSTB into
AHCI_BRCM, to avoid two patches in a row, we just enable AHCI_BRCM to be future
proof
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY1BGAAoJEIfQlpxEBwcEkkgQAITurehP8Wbt0aBSt42OUmCP
xvBTuecYkDeoZCTAT3QxfLt2f6aXHWxhl1c4nbnEF3bHqSvwDN1d4QjORC2vNN/j
4pfLXwRN2wpWk40j7ee3rrJVM2iYyHyfa1qY3cBUD11rtBFWTX0DTvevbG9jUvsL
dqfV51QHXAbod0L7QZKAmBmjQsjpBjDOfdrxULad0wJcOpIImDc1ynKV1PPd5hOw
SFTyQe2rtNmhoIiLThwA694upfxPxguz6SlWZo503n6vMoF5U/z51EGne9scTTxi
kjATpQAuYWakN3qD1AeT8oHm4/Mq5vMLqvjyRLrxlDCkrQp4UliLPEzwGIhB0BU+
sBcmWhLieuYaR09in46wkuBbiWXGR6vh5TkN2MIlV61Y6Q99YUumTUiDO8d3fKus
DqdPXACxpM9FoP4I/HniOMdl4FXInBqq3Ec/rBCb5fbsyxbO+FgxRBZkvZmoTouO
6ZRIx/opi1GzW8te1hZvdzzL9uJaWFDXwnpehhQk9xlYz66R2u06lWsDsLt45DnE
5vujTQcst6PtmqrKwehkqPDIgYRIuU1T66wPzIeMQyiF3yD/cpx+8b5j/lye8Kh+
TaZTeCh4susttrVjhee68asFAnXpNSpwm61tNVIiypFhvrvPCLKOL0YETo/wwIJt
AgJ92oi9NxNT4LDVdeni
=vr6G
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.8/defconfig' of http://github.com/Broadcom/stblinux into next/defconfig
This pull request contains defconfig changes for Broadcom ARM-based SoCs:
- Florian enables support for the BCM63xx DSL SoCs basic peripherals, enables
the networking subsystems for Set Top Box SoCs, enables the PWM, watchdog and
the AHCI controller and SATA PHY drivers
- Florian removes the bcm_defconfig file which is no longer useful and updates
multi_v7_defconfig to include the Kona watchdog to provide proper reboot for the
Broadcom Kona platforms
Please note that Tejun Heo has queued a patch which renames AHCI_BRCMSTB into
AHCI_BRCM, to avoid two patches in a row, we just enable AHCI_BRCM to be future
proof
* tag 'arm-soc/for-4.8/defconfig' of http://github.com/Broadcom/stblinux:
ARM: Remove bcm_defconfig
ARM: multi_v7_defconfig: Enable Broadcom Kona watchdog
ARM: multi_v7_defconfig: Enable Broadcom STB PWM
ARM: multi_v7_defconfig: Enable BCM7038 Watchdog
ARM: multi_v7_defconfig: Enable Broadcom AHCI
ARM: multi_v7_defconfig: Enable BRCMSTB networking
ARM: multi_v7_defconfig: Enable BCM63xx
Signed-off-by: Olof Johansson <olof@lixom.net>
- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY1hBAAoJEIfQlpxEBwcEY6gQAKRAF/CK920lh6BeW0JKgzix
L1J2TBirqYv/yRB0hiBY9myh61yV31SgCksgJbJrOREWTJMxx8lLve3jnCqVdzd+
ODfgb2QLGgQJZfLFaK2JHxY8NkgrrABkNEb7kIv+MCes3FrtBJHtH02y661w5goB
t5zJyvz9FeIQJULFv9jNyVpa+A7Hy8jg1Wvin62mF7uXewFEr9kcddbeXsmRw/EB
j491pFNDw4lkYecyMWyb5c4QqJEtVWIFWxCFRDf4OvG3JhzvMWfyNfhSm9t4nPUU
pxadZsnVrPPYBQq5QC0zC5bSBCZHRgTt+JsXAl557rAGePuPSKTennri3ubxwQbi
9w8PevstBXKq0J6Ynl0lrqLAUrLbnt57bq49hxMM7ur0CXGL5CdzRKRkiUme4ZsB
G5shPXsYlfpCwjAvthshb1npreUxTyxQkO6D6y3Zojb/tlNrwBvV3QmqC8Lpe4wm
7J/hznwOUyhgm+IR92tSL+nyFd8gqOBAHOipUNDTQGix2BuYveAngh0I7lysVvQt
E47UAc6+y6IHt7iNbubZVfJ6HQnu5EZPoPwoev0/2Xbr0Bd7wBYshAYnVynkj0lf
9v47CYKNvaYDzXSacpxodA+iZMVgkGrRzoyMskaqzPgcBCnMiQeVLuivrUerx1in
yYxPjRCv+QMd1qbv3K4+
=0GWx
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Device Tree changes for Broadcom ARM-based SoCs:
- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
* tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
ARM: dts: BCM5301X: Add SRAB interrupts
ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
ARM: dts: NSP: Add PL330 support
ARM: dts: NSP: Add XMC board support
ARM: dts: bcm23550: Add device tree files
Documentation: devicetree: Document BCM23550 bindings
ARM: BCM5301X: Enable SPI-NOR on dual flash devices
ARM: dts: NSP: Add new DT file for bcm958625hr
ARM: dts: NSP: modify second CPU address
ARM: dts: NSP: Add MSI support on PCI
ARM: BCM: modify Broadcom CPU enable method
ARM: dts: fix use of bcm11351 enable method
Documentation: Binding docs for bcm11351 enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
- Chris prepares support for the BCM23550 by removing reset code in the
BCM21664 machine code since a proper drivers/power/reset driver is provided and
shared, he then adds a machine entry point for BCM23550 and updates the SMP
code to bring-up the secondary cores on BCM23550
- Ben fixes a warning in the Kona L2 SMC code by adding the missing include file
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY1beAAoJEIfQlpxEBwcEFKYQAN0/ba6mCFmr8DLthDJkqeMt
yrVeVRB1H6HYnt2cqaG/tbEeZZ+d+S4PhyRbHtAQ4cjgUq0qw8HNc/paN68K4pj0
JuY/52T2mL9WY9f96VBOAnmyRGC2YjTO3xC902BHOVBqQnYzHZm/ki9nxePo8F98
JTAsZuTR+NthfWuwFAAhI6xRws8d9jLXsirPPld6iuRo48/3UoxnHIzz+dQJghIy
EVqXf3ckL09LYZqvY6dagcWQxR0RC80Z2hHska4uRirfmPjFKXYM6NvftKu3YaKz
cRC0bE6t4WR7YX3LCLYWMers7rnElhfqpgvwJVvYnnwDTpc7469CF9ql2IJSM+Dj
8DDX9pHWwNZTaHglmigIW8inaOS3ChtOb+V5nZxAsaSh5h9W99JTbpnFjqgvBZ0x
uHHwsiv6xWDDujeD5lF6+VcVekk1WGoJ8ALaa4MBxdasljw9SyRpb3q8PWXAcbk2
WMPBhED6OdfRuQ/Gf2466LcM1LBkd0nL5mYUZtN/py5B2xtvHgmee2H9AZQQlHhb
DhmXpjG4gV5ySInJs30HrK1Z6iELa+hI3gouhsqCCo4Tj+EK7/yGRncUZ02tHjEk
Tnmf3tepkX1paukYriVwLwRtuf3KkJJH5U+P4wRR/vREewbIy9iqaQFTg2IZUJr9
Mh4vZRnzjw0Qgjy0M4Dj
=zoLK
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.8/soc' of http://github.com/Broadcom/stblinux into next/soc
This pull request contains SoC changes for Broadcom ARM-based SoCs:
- Chris prepares support for the BCM23550 by removing reset code in the
BCM21664 machine code since a proper drivers/power/reset driver is provided and
shared, he then adds a machine entry point for BCM23550 and updates the SMP
code to bring-up the secondary cores on BCM23550
- Ben fixes a warning in the Kona L2 SMC code by adding the missing include file
* tag 'arm-soc/for-4.8/soc' of http://github.com/Broadcom/stblinux:
ARM: bcm: fix missing include of kona_l2_cache.h
ARM: BCM23550 SMP support
ARM: Add support for Broadcom BCM23550 SoC
ARM: bcm21664: Remove reset code
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull s5p-mfc changes from media tree so the arm/mach-exynos code
could be removed. The bindings are converted to generic reserved memory
bindings.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXVWQ8AAoJEME3ZuaGi4PXGWIP/3FwCkH8XNJIDLGZ/RJq/b1+
YI9ixVOW9E3vdDgk3I3vLG+jL6bUVicJSS47L/DscN4CyNml6YNaNa+RJdB2pw+E
hJJ3tcGz04jCLvk6+6abLEfpfPC40DkDVj7ZOKjzWypZYDFyjB018p2DECzc+RFf
zVlY8P9OKeaBMZNCk2H2cT46NLTgL4dY3KR8y5TLUHsgYLVdLmU4QtCv/RiRnTcn
OuzBTyLvVR97lup1mVf7zhE2OLkyskishKbYbMuD1I8flho22y4vJG998zSIIl5C
Tz8MYJsVN1mFEjonJcbreNTAe4LB++F8tXcytCADHSGM2O9m04HeROdqqKUiPWrw
hAG6DS+tVq7FqGBii3IlfTg08AG8uNoOzJ14Qc1BmcgEPlkpLMNHKgdNgzvJx7VB
yukGUVUDBQTM19q1QwH3keIRfOWm030ODA/q24ExUVZ8TgWdjLWIz5/U2jyV4aph
TKtwcruFXpCVwQ6gXWTyVb95Fre4miONqFRTOFWk1lbXDEk9fM8qL1ih4OUzKM5m
khSNfAMeKHKxkXHSzsU9PBZp66jeqdQQIv6i2fnZhk4OMqYDz5iTTRGV+LaPkrQ+
1Jz1VZ+0iKka30x/LhKtOlRuq6rPlIaXyPHrr/POfETVv3eG4OKTQJzVfX++tNCw
CdJKxIKlT0lZtuwg0BWu
=bfnE
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-exynos-mfc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Topic branch for Exynos MFC changes for v4.8:
Pull s5p-mfc changes from media tree so the arm/mach-exynos code
could be removed. The bindings are converted to generic reserved memory
bindings.
* tag 'samsung-drivers-exynos-mfc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable MFC device on Exynos4412 Odroid boards
ARM: dts: exynos: Convert MFC device to generic reserved memory bindings
ARM: EXYNOS: Remove code for MFC custom reserved memory handling
media: s5p-mfc: add iommu support
media: s5p-mfc: replace custom reserved memory handling code with generic one
media: s5p-mfc: use generic reserved memory bindings
of: reserved_mem: add support for using more than one region for given device
media: set proper max seg size for devices on Exynos SoCs
media: vb2-dma-contig: add helper for setting dma max seg size
s5p-mfc: Fix race between s5p_mfc_probe() and s5p_mfc_open()
s5p-mfc: Add release callback for memory region devs
s5p-mfc: Set device name for reserved memory region devs
Signed-off-by: Olof Johansson <olof@lixom.net>
Another batch of fixes for ARM SoC platforms. Most are smaller fixes,
Two areas that are worth pointing out are:
* OMAP had a handful of changes to voltage specs that caused a bit of churn,
most of volume of change in this branch is due to this.
* There are a couple of _rcuidle fixes from Paul that touch common code and
came in through the OMAP tree since they were the ones who saw the problems.
The rest is smaller changes across a handful of platforms.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXZjf6AAoJEIwa5zzehBx3ExoP/2eGTZyGUt9DFutZs2OhZRgh
tI3zBgfPaAEmt+rnvVE3NhDbfjPsV2cANDxE/MaZsFaKkgkHNBbmZpJ3Y7OlgB+k
3kl4y87Ez1NEJrzQKzqVICzCD3IKA3cxUwUELIp3C7LhnKO1UXmRXp8UXee1Yc1E
gL23Z2FncrDLOdvVfp/dTj1scB1XQrt3kePSu7sIuyDuGiPLRvO8fNjvIfOQaGDt
Y27Yk1GrNpvqiOAkziOzUmSGZ6ZZ+wUdUKc/+QcxSnqxrSldtaQDsmmL4z6DQ1xj
j0jagfVGXNLrCUj0zyWwwPG7pZ37BDJ1mj7AMiX9N7LDQFHR9owEVNf2zd1ar37k
64Vlz+38m8lXNHM2/gL6gqFZIm0Kjt9C/wrvyealsuflGmx4xMSTRr2yvde5URBO
diFzee3y2NPhvaRaEd1/yFJ/c0D5bVS8M1lced6GXn/l8SrWjg1SrYZley2PGjQH
esEr7odTR7Um1UIXalpL1yBxoOVfGJl3bPYe8/veniFSi4DV+yeCOCc6pN0Km4WQ
huUlzJkIXgtgAUt5gvWAw7sC+qzYPL+qOMAJsfb/vANoGg2QMrt+u9RAWnMKidpo
GcjKNvAhAmAfwUgVHeLxO714MjIHWhKEVGkGsiDwoLCisn7HTLmaYk8qmOTlExcC
g/nj7vtaXFfMDcD3uco0
=C0Az
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another batch of fixes for ARM SoC platforms. Most are smaller fixes.
Two areas that are worth pointing out are:
- OMAP had a handful of changes to voltage specs that caused a bit of
churn, most of volume of change in this branch is due to this.
- There are a couple of _rcuidle fixes from Paul that touch common
code and came in through the OMAP tree since they were the ones who
saw the problems.
The rest is smaller changes across a handful of platforms"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
ARM: dts: STi: stih407-family: Disable reserved-memory co-processor nodes
ARM: dts: am437x-sk-evm: Reduce i2c0 bus speed for tps65218
ARM: OMAP2+: timer: add probe for clocksources
ARM: OMAP1: fix ams-delta FIQ handler to work with sparse IRQ
memory: omap-gpmc: Fix omap gpmc EXTRADELAY timing
arm: Use _rcuidle for smp_cross_call() tracepoints
MAINTAINERS: Add myself as reviewer of ARM FSL/NXP
ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_mem_ret
ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_logic_ret
ARM: OMAP: DRA7: powerdomain data: Set L3init and L4per to ON
ARM: imx6ul: Fix Micrel PHY mask
ARM: OMAP2+: Select OMAP_INTERCONNECT for SOC_AM43XX
ARM: dts: DRA74x: fix DSS PLL2 addresses
ARM: OMAP2: Enable Errata 430973 for OMAP3
ARM: dts: socfpga: Add missing PHY phandle
ARM: dts: exynos: Fix port nodes names for Exynos5420 Peach Pit board
ARM: dts: exynos: Fix port nodes names for Exynos5250 Snow board
ARM: dts: sun6i: yones-toptech-bs1078-v2: Drop constraints on dc1sw regulator
ARM: dts: sun6i: primo81: Drop constraints on dc1sw regulator
ARM: dts: sunxi: Add OLinuXino Lime2 eMMC to the Makefile
...
- Fix dra7 for hardware issues limiting L4Per and L3init power domains
to on state. Without this the devices may not work correctly after
some time of use because of asymmetric aging. And related to this,
let's also remove the unusable states.
- Always select omap interconnect for am43x as otherwise the am43x
only configurations will not boot properly. This can happen easily
for any product kernels that leave out other SoCs to save memory.
- Fix DSS PLL2 addresses that have gone unused for now
- Select erratum 430973 for omap3, this is now safe to do and can
save quite a bit of debugging time for people who may have left
it out.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXXm6cAAoJEBvUPslcq6VzgiAP/3j+Zvaks93gLf0Hc1sQ5ow+
UxQ3Gb3/gVGEh1OSb/c4MI800UBK1B0f6CqLK7zDFAuDHyUwmqJ27nrARfazoMPD
DxRYZoEs897peB0/SWwDtHR+yje5UmIB0P31kRJ+t5nYwXBKvmvkWPFrOISxgI1Z
yLc62tFoVy37IYfeH6pRNwMyJz9scl4qXjiBCHTmBQvgo4I3IPpvhFAWN5YMBZlz
VwXDtmR9B/WlcRYel+RplYQrQrXVvaaT01wTPfejKHI9dyNQmbJQDWFMuuvdQKjE
O7yjcgR6DdWjdDwCmIHLuc2FyrwW+wt1AY/5UXKGroxfW6Ct3JKuhUPPxsHfRMKX
2NnQtgUcUxiIAGrsEZFadUAIEedd+DBVK+aztn1reaaHR1R/pBnMcEnch9WRuAOQ
srOaaL2Had/NG+QRE0psgck9ayzpDHw+LMd18BckCN+1mIiFBnXYZrCVUPrutgPP
5RbDWIeSVeAwbdaxPRqkXOcMGZ1MDRGoS+UBlTms+gWuSLjFj6sye0+Dao+68Ehz
im/xhh0YCHgN0TvuvTla5BgLgOunlCNtXMNWyg801lDIvzOj/ngEQlasng9uzuri
mfGf5w8ctub0Ileq4eU+rYb+bRDiDagjmiVBjbRmLWtgOUcsrNr+FX9sp5NDELmS
oEa/VB8jNmI3aSv6OrNi
=mQyc
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/fixes-powedomain' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.7-rc cycle:
- Fix dra7 for hardware issues limiting L4Per and L3init power domains
to on state. Without this the devices may not work correctly after
some time of use because of asymmetric aging. And related to this,
let's also remove the unusable states.
- Always select omap interconnect for am43x as otherwise the am43x
only configurations will not boot properly. This can happen easily
for any product kernels that leave out other SoCs to save memory.
- Fix DSS PLL2 addresses that have gone unused for now
- Select erratum 430973 for omap3, this is now safe to do and can
save quite a bit of debugging time for people who may have left
it out.
* tag 'omap-for-v4.7/fixes-powedomain' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_mem_ret
ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_logic_ret
ARM: OMAP: DRA7: powerdomain data: Set L3init and L4per to ON
ARM: OMAP2+: Select OMAP_INTERCONNECT for SOC_AM43XX
ARM: dts: DRA74x: fix DSS PLL2 addresses
ARM: OMAP2: Enable Errata 430973 for OMAP3
+ Linux 4.7-rc2
Signed-off-by: Olof Johansson <olof@lixom.net>
- Two boot warning fixes from the RCU tree that should have gotten
merged several weeks ago already but did not because of issues
with who merges them. Paul has now split the RCU warning fixes into
sets for various maintainers.
- Fix ams-delta FIQ regression caused by omap1 sparse IRQ changes
- Fix PM for omap3 boards using timer12 and gptimer, like the
original beagleboard
- Fix hangs on am437x-sk-evm by lowering the I2C bus speed
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY8wuAAoJEBvUPslcq6VzGBQQAJ6OIH0Gws19Wyi8IqnjMLJN
npu+JXU0xP5bBZ+HbCVjyN8k32drhXdwDMQ+u1DvBYwUuyLIIRZPZF4aHb8fDfOC
v1VqUzQRzj1FCh9MlkdqTedA180WCo5PCGlFOon0BmaZlv9WevEaTOYrEgyZPrmk
quBnaE+baZfGxWBbDSN+OrGYobQRs7Eu8bel0gh628CDiajrbwlIyAcNdEn5C/Uu
GHiEuIQcxb4b62mwAwh/t7el9ureirsS1b6mFB41puPmF/lYawI6YaCWIL48lbMd
XsgKGnFDU6dgSO5QRx5PhP/7YP9FetS0U+g7iFhgjmArNCraNQYBY0ltMweOG0qe
M8BPxDuCnhm1Q+PcjBORteN/PF47kcnBMpiJVVTmq5JRlXUqXecKpoScCt9HfPgy
EJq+esLQNIuRw9cEwVPQBj80GyxFUVqL/Rzo7xjEwTDPYRQERGCB7V68iV25on3w
07dOVl/lSwe902ik580wnlGUq+J09wk+9hIKV2XwQAV/8mKaWMc3pA8rE/efLJoC
buAsccxVcEsR3+uLSsU/P+fFm8nfBRmiOO9yIR4gez0BhbiDMc1zpwwhLkI+vTT4
D3PnuUdVeBvoGTNnpwqSURxajhaK0DSKTwhWnWGubYfXd3B48sW76rvKLO1FThgL
qyaed06QFeWj8gV+VZLb
=P0Vi
-----END PGP SIGNATURE-----
Merge tag 'fixes-rcu-fiq-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.7-rc cycle:
- Two boot warning fixes from the RCU tree that should have gotten
merged several weeks ago already but did not because of issues
with who merges them. Paul has now split the RCU warning fixes into
sets for various maintainers.
- Fix ams-delta FIQ regression caused by omap1 sparse IRQ changes
- Fix PM for omap3 boards using timer12 and gptimer, like the
original beagleboard
- Fix hangs on am437x-sk-evm by lowering the I2C bus speed
* tag 'fixes-rcu-fiq-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am437x-sk-evm: Reduce i2c0 bus speed for tps65218
ARM: OMAP2+: timer: add probe for clocksources
ARM: OMAP1: fix ams-delta FIQ handler to work with sparse IRQ
arm: Use _rcuidle for smp_cross_call() tracepoints
arm: Use _rcuidle tracepoint to allow use from idle
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes a non-booting issue in Mainline.
When booting with a compressed kernel, we need to be careful how we
populate memory close to DDR start. AUTO_ZRELADDR is enabled by default
in multi-arch enabled configurations, which place some restrictions on
where the kernel is placed and where it will be uncompressed to on boot.
AUTO_ZRELADDR takes the decompressor code's start address and masks out
the bottom 28 bits to obtain an address to uncompress the kernel to
(thus a load address of 0x42000000 means that the kernel will be
uncompressed to 0x40000000 i.e. DDR START on this platform).
Even changing the load address to after the co-processor's shared memory
won't render a booting platform, since the AUTO_ZRELADDR algorithm still
ensures the kernel is uncompressed into memory shared with the first
co-processor (0x40000000).
Another option would be to move loading to 0x4A000000, since this will
mean the decompressor will decompress the kernel to 0x48000000. However,
this would mean a large chunk (0x44000000 => 0x48000000 (64MB)) of
memory would essentially be wasted for no good reason.
Until we can work with ST to find a suitable memory location to
relocate co-processor shared memory, let's disable the shared memory
nodes. This will ensure a working platform in the mean time.
NB: The more observant of you will notice that we're leaving the DMU
shared memory node enabled; this is because a) it is the only one in
active use at the time of this writing and b) it is not affected by
the current default behaviour which is causing issues.
Fixes: fe135c6 (ARM: dts: STiH407: Move over to using the 'reserved-memory' API for obtaining DMA memory)
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Correct Micrel PHY mask to fix the issue that i.MX6UL ethernet works
in U-Boot but not in kernel.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXYg70AAoJEFBXWFqHsHzO/dcH/jrXxr9zJgXclSVjLx0a+HJB
27v2KtrTBKjeLBOuv1WE5J49SA4PaQ8og7MeAUGIVeuXjGk7v4Ba/+3CIauXQ7fF
oEBr6e5WbzHeoSXpwgPkuMAA0vQ09kIKy2uUOecdIVrCCfS+N1koPj/jjzSTWNdk
7OOTI5itm2T4KeuFTm5RqN0JwhsAgVECuA3JZWvmTCXScC1bjFKhi9wRcBIjt5zf
jOVYJ3kCM7OqxCp82EM6SBY0q2MNkUlV50PjKVYeSpeiSJw3nvg+yBlvwCMTssbn
EdH8cYI/Y+snbcvfsEJMzEpoPgBAujKxQaT3aDVF0mSkH0UykfoPjUmTFrOpjSY=
=fD61
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
The i.MX fixes for 4.7:
- Correct Micrel PHY mask to fix the issue that i.MX6UL ethernet works
in U-Boot but not in kernel.
* tag 'imx-fixes-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx6ul: Fix Micrel PHY mask
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"A couple of fixes for pmd_mknotpresent()/pmd_present() for LPAE
systems"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8579/1: mm: Fix definition of pmd_mknotpresent
ARM: 8578/1: mm: ensure pmd_present only checks the valid bit
There is no reason to hold s/w dependent parameter in device tree.
Even more, there is no reason in this parameter because davinici_cpdma
driver splits pool of descriptors equally between tx and rx channels
anyway.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on the latest timing specifications for the TPS65218 from the data
sheet, http://www.ti.com/lit/ds/symlink/tps65218.pdf, document SLDS206
from November 2014, we must change the i2c bus speed to better fit within
the minimum high SCL time required for proper i2c transfer.
When running at 400khz, measurements show that SCL spends
0.8125 uS/1.666 uS high/low which violates the requirement for minimum
high period of SCL provided in datasheet Table 7.6 which is 1 uS.
Switching to 100khz gives us 5 uS/5 uS high/low which both fall above
the minimum given values for 100 khz, 4.0 uS/4.7 uS high/low.
Without this patch occasionally a voltage set operation from the kernel
will appear to have worked but the actual voltage reflected on the PMIC
will not have updated, causing problems especially with cpufreq that may
update to a higher OPP without actually raising the voltage on DCDC2,
leading to a hang.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Aparna Balasubramanian <aparnab@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A few platforms are currently missing clocksource_probe() completely
in their time_init functionality. On OMAP3430 for example, this is
causing cpuidle to be pretty much dead, as the counter32k is not
going to be registered and instead a gptimer is used as a clocksource.
This will tick in periodic mode, preventing any deeper idle states.
While here, also drop one unnecessary check for populated DT before
existing clocksource_probe() call.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
After OMAP1 IRQ definitions have been changed by commit 685e2d08c5
("ARM: OMAP1: Change interrupt numbering for sparse IRQ") introduced
in v4.2, ams-delta FIQ handler which depends on them no longer works
as expected. Fix it.
Created and tested on Amstrad Delta against Linux-4.7-rc3
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In order to use Wake-on-Lan on RK3288 integrated MAC, we need to wake-up
the CPU on the PMT interrupt when the MAC and the PHY are in low power mode.
Adding the interrupt declaration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
We have everything we need in multi_v7_defconfig that exists in
bcm_defconfig, so get rid of that file to reduce the maintenance burden.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
In order to get rid of bcm_defconfig, enable this driver which is needed
by some Broadcom SoCs based on the Kona architecture to reboot.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The BCM7038 watchdog is used by all Broadcom STB SoCs but is not needed
for system reboot, we just turn it on as a module.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable the Broadcom AHCI driver and its companion PHY driver to get
functional SATA3 support.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add sata support to the Northstar Plus SoC device tree.
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
When the support for the Marvell crypto engine was added in the Device
Tree of the various Armada 385 Device Tree files in commit
d716f2e837 ("ARM: mvebu: define crypto SRAM ranges for all armada-38x
boards"), a typo was made in the MBus window attributes for the Armada
385 Linksys board: 0x09/0x05 are used instead of 0x19/0x15. This commit
fixes this typo, which makes the CESA engines operational on Armada 385
Linksys boards.
Reported-by: Terry Stockert <stockert@inkblotadmirer.me>
Cc: Terry Stockert <stockert@inkblotadmirer.me>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: <stable@vger.kernel.org>
Fixes: d716f2e837 ("ARM: mvebu: define crypto SRAM ranges for all armada-38x boards")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In order for HW I/O coherency to work on Cortex-A9 based Marvell SoCs,
all MMIO registers must be mapped strongly ordered. In commit
1c8c3cf0b5 ("ARM: 8060/1: mm: allow sub-architectures to override PCI
I/O memory type") we implemented a new function,
pci_ioremap_set_mem_type(), that allow sub-architecture code to override
the memory type used to map PCI I/O regions.
In the discussion around this patch series [1], Arnd Bergmann made the
comment that maybe all PCI I/O regions should be mapped
strongly-ordered, which would have made our proposal to add
pci_ioremap_set_mem_type() irrelevant. So, we submitted a patch [2] that
did what Arnd suggested.
However, Russell in the end merged our initial proposal to add
pci_ioremap_set_mem_type(), but it was never used anywhere. Further
discussion with Arnd and other folks on IRC lead to the conclusion that
in fact using strongly-ordered for all platforms was maybe not
desirable, and therefore, using pci_ioremap_set_mem_type() was the most
appropriate solution.
As a consequence, this commit finally adds the
pci_ioremap_set_mem_type() call in the mach-mvebu platform code, which
was originally part of our initial patch series [3] and is necessary for
the whole mechanism to work.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-May/256565.html
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-May/256755.html
[3] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-May/256563.html
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Until now, our understanding for HW I/O coherency to work on the
Cortex-A9 based Marvell SoC was that only the PCIe regions should be
mapped strongly-ordered. However, we were still encountering some
deadlocks, especially when testing the CESA crypto engine. After
checking with the HW designers, it was concluded that all the MMIO
registers should be mapped as strongly ordered for the HW I/O coherency
mechanism to work properly.
This fixes some easy to reproduce deadlocks with the CESA crypto engine
driver (dmcrypt on a sufficiently large disk partition).
Tested-by: Terry Stockert <stockert@inkblotadmirer.me>
Tested-by: Romain Perier <romain.perier@free-electrons.com>
Cc: Terry Stockert <stockert@inkblotadmirer.me>
Cc: Romain Perier <romain.perier@free-electrons.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The kirkwood-pm.c was missing the include of kirkwood-pm.h to
define the kirkwood_pm_init() function. However once this is
included, the types do not match.
Fixup the include, and then the prototype to avoid the following
warning:
arch/arm/mach-mvebu/kirkwood-pm.c:69:12: warning: symbol 'kirkwood_pm_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The kirkwood_disable_mbus_error_propagation is not exported or declared
elsewhere, so make it static to avoid the following warning:
arch/arm/mach-mvebu/kirkwood.c:153:6: warning: symbol 'kirkwood_disable_mbus_error_propagation' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The orion5x_legacy_handle_irq() is not used or declared outside
of irq.c so make it static to avoid the following warning:
arch/arm/mach-orion5x/irq.c:30:23: warning: symbol 'orion5x_legacy_handle_irq' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fix the warning that coherency_base is not defined by adding
it to coherency.h (it is only used in the coherency_ll.S):
arch/arm/mach-mvebu/coherency.c:41:14: warning: symbol 'coherency_base' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The mvebu_armada375_smp_wa_init() is not exported or declared
anywhere, so make it static to fix the following warning:
arch/arm/mach-mvebu/system-controller.c:130:6: warning: symbol 'mvebu_armada375_smp_wa_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The mvebu_cpu_reset_deassert() is missing the definition for
it, so include common.h where it is defined to fix the warning:
arch/arm/mach-mvebu/cpu-reset.c:25:5: warning: symbol 'mvebu_cpu_reset_deassert' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The mvebu_pm_suspend_init() is missing a definition, so
include common.h which defines this function into pm.c to
fix the following warning:
arch/arm/mach-mvebu/pm.c:235:12: warning: symbol 'mvebu_pm_suspend_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The file is missing definitions for some functions due to not
including two header files. Fix the following warnings by
including "pmsu.h" and <linux/mvebu-pmsu.h> in pmsu.c:
arch/arm/mach-mvebu/pmsu.c:127:5: warning: symbol 'mvebu_setup_boot_addr_wa' was not declared. Should it be static?
arch/arm/mach-mvebu/pmsu.c:267:5: warning: symbol 'armada_370_xp_pmsu_idle_enter' was not declared. Should it be static?
arch/arm/mach-mvebu/pmsu.c:313:5: warning: symbol 'armada_38x_do_cpu_suspend' was not declared. Should it be static?
arch/arm/mach-mvebu/pmsu.c:340:6: warning: symbol 'mvebu_v7_pmsu_idle_exit' was not declared. Should it be static?
arch/arm/mach-mvebu/pmsu.c:570:5: warning: symbol 'mvebu_pmsu_dfs_request' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Since all architectures have this implemented now natively, remove this
dead code.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Implement FETCH-OP atomic primitives, these are very similar to the
existing OP-RETURN primitives we already have, except they return the
value of the atomic variable _before_ modification.
This is especially useful for irreversible operations -- such as
bitops (because it becomes impossible to reconstruct the state prior
to modification).
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Davidlohr Bueso <dbueso@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The sun4i-timer driver registers its sched_clock only if the machine is
compatible with "allwinner,sun5i-a13", "allwinner,sun5i-a10s" or
"allwinner,sun4i-a10".
Add the missing "allwinner,sun5i-a13" string to the machine compatible.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 465a225fb2 ("ARM: sun5i: Add C.H.I.P DTS")
Cc: <stable@vger.kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
At some boards, it has no ethernet support. As an alternative, we can use
USB Ethernet card to support NFS (u-boot supports it too). It supports
AXIS cards which are used most frequently.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the imx6ul-pico-hobbit schematics the Ethernet PHY reset GPIO
is GPIO1_28, so fix it accordingly.
Also adjust the reset duration to 1ms, because the KSZ8081 datasheet
requires 500μs.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt the
polarity of "reset-gpio" is assumed to be active-low unless a separate
property "reset-gpio-active-high" is available. So replace the inconsistent
polarity description to make the correct active-low reset behavior more
obvious.
Signed-off-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6sx-sdb has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6ul-evk has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-sdb has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6qdl-sabresd has WDOG2_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Utilite Pro has a mmc card slot connected to the usdhc3
controller. There is no card detection until hardware revision 1.3.
Add support for it and signal the controller with the broken-cd
property that polling has to be used to detect a card.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current ldo settings of the cm-fx6 do not allow 1.2GHz cpu
frequency. At this frequency the module behaves unstable.
But the imx6q fuse indicates that 1.2GHz operation is possible.
Hence, remove the 1.2GHz operation point in the device tree.
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
[christopher.spinrath@rwth-aachen.de: enhance commit message, adjust
remaining operation points to match the ones in imx6q.dtsi and add
a comment in the device tree]
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6 SMP system has the same DMA memory coherency issue [1] with
pl310 L2 controller. With this shared override bit set, the customer
reports the DMA coherency issue is gone. Besides, I have tested
the performance using USB ethernet with/without this bit, it shows
no difference.
[1] http://patchwork.ozlabs.org/patch/469362/
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
chip was used instead on the Blanche board; this chip is compatible with
SMSC LAN9115 for which there's a (device tree aware) driver. Describe
the chip in the Blanche device tree; enable DHCP and NFS root in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The PCI_MSI symbol is used inconsistently throughout the tree, with some
drivers using 'select' and others using 'depends on', or using conditional
selects. This keeps causing problems; the latest one is a result of
ARCH_ALPINE using a 'select' statement to enable its platform-specific MSI
driver without enabling MSI:
warning: (ARCH_ALPINE) selects ALPINE_MSI which has unmet direct dependencies (PCI && PCI_MSI)
drivers/irqchip/irq-alpine-msi.c:104:15: error: variable 'alpine_msix_domain_info' has initializer but incomplete type
static struct msi_domain_info alpine_msix_domain_info = {
^~~~~~~~~~~~~~~
drivers/irqchip/irq-alpine-msi.c:105:2: error: unknown field 'flags' specified in initializer
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
^
drivers/irqchip/irq-alpine-msi.c:105:11: error: 'MSI_FLAG_USE_DEF_DOM_OPS' undeclared here (not in a function)
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
^~~~~~~~~~~~~~~~~~~~~~~~
There is little reason to enable PCI support for a platform that uses MSI
but then leave MSI disabled at compile time.
Select PCI_MSI from irqchips that implement MSI, and make PCI host bridges
that use MSI on ARM depend on PCI_MSI_IRQ_DOMAIN.
For all three architectures that support PCI_MSI_IRQ_DOMAIN (ARM, ARM64,
X86), enable it by default whenever MSI is enabled.
[bhelgaas: changelog, omit crypto config change]
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
With the SION bit set a pin can be read as GPIO even though it's not muxed
as GPIO. This is useful at times. The downside however is that the signal
is not only routed to the GPIO IP but also all other IPs that can make use
of the pin. This resulted in more than one issue for me in the past. Things
like spi transfers that result in usb reenumeration or setting a GPIO to a
value that triggers an RTS irq for an UART.
This convinces me that the SION bit does more harm than good and so all
SION bits are removed that are not known to be needed.
Note that this has no influence on GPIOs under Linux as the gpio-mxc
driver just reports the level the pin is driven to for outputs and not
the level as seen on the pin.
If this commit introduces a regression for you, please report which SION
bit is essential for your setup.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Further testing with false negatives suppressed by commit 293e2421fe
("rcu: Remove superfluous versions of rcu_read_lock_sched_held()")
identified another unprotected use of RCU from the idle loop. Because RCU
actively ignores idle-loop code (for energy-efficiency reasons, among
other things), using RCU from the idle loop can result in too-short
grace periods, in turn resulting in arbitrary misbehavior.
The resulting lockdep-RCU splat is as follows:
------------------------------------------------------------------------
===============================
[ INFO: suspicious RCU usage. ]
4.6.0-rc5-next-20160426+ #1112 Not tainted
-------------------------------
include/trace/events/ipi.h:35 suspicious rcu_dereference_check() usage!
other info that might help us debug this:
RCU used illegally from idle CPU!
rcu_scheduler_active = 1, debug_locks = 0
RCU used illegally from extended quiescent state!
no locks held by swapper/0/0.
stack backtrace:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.6.0-rc5-next-20160426+ #1112
Hardware name: Generic OMAP4 (Flattened Device Tree)
[<c0110308>] (unwind_backtrace) from [<c010c3a8>] (show_stack+0x10/0x14)
[<c010c3a8>] (show_stack) from [<c047fec8>] (dump_stack+0xb0/0xe4)
[<c047fec8>] (dump_stack) from [<c010dcfc>] (smp_cross_call+0xbc/0x188)
[<c010dcfc>] (smp_cross_call) from [<c01c9e28>] (generic_exec_single+0x9c/0x15c)
[<c01c9e28>] (generic_exec_single) from [<c01ca0a0>] (smp_call_function_single_async+0 x38/0x9c)
[<c01ca0a0>] (smp_call_function_single_async) from [<c0603728>] (cpuidle_coupled_poke_others+0x8c/0xa8)
[<c0603728>] (cpuidle_coupled_poke_others) from [<c0603c10>] (cpuidle_enter_state_coupled+0x26c/0x390)
[<c0603c10>] (cpuidle_enter_state_coupled) from [<c0183c74>] (cpu_startup_entry+0x198/0x3a0)
[<c0183c74>] (cpu_startup_entry) from [<c0b00c0c>] (start_kernel+0x354/0x3c8)
[<c0b00c0c>] (start_kernel) from [<8000807c>] (0x8000807c)
------------------------------------------------------------------------
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: <linux-omap@vger.kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>
Update DTSI file to add the reset controller node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the following bits:
CONFIG_TOUCHSCREEN_STMPE
- STMPE touchscreen support, needed on MCVEVK as it contains the
chip. This also enables the STMPE MFD device and touchscreen
input support.
CONFIG_USB_STORAGE
- USB storage support is often used, so enable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Close the hole where ptrace can change a syscall out from under seccomp.
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Currently, if arch code wants to supply seccomp_data directly to
seccomp (which is generally much faster than having seccomp do it
using the syscall_get_xyz() API), it has to use the two-phase
seccomp hooks. Add it to the easy hooks, too.
Cc: linux-arch@vger.kernel.org
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
On these two boards, the serial0 is used for inter-chip connection,
so cannot be used for login console. The serial2 is used instead
for them, but it is tedious to use because upper level deployment
projects must switch login console per board.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This node consists of various system-level configuration registers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This pin-muxing is needed to get access to the UniPhier System Bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Solve an issue with DEBUG_LL and multi_v7
- Also make DEBUG_LL more user friendly
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJXW0h2AAoJENiigzvaE+LCx/EQAI9wbtmT3wBD/VbRnsZouc8C
PCkf8LVyg/bBVE27L7DOIFbOzYXuUOnWApXXzQO/vvyGbkSbouUYKIoCd7DUPe20
ENzNtca57ZxvduV/FYjHVxC/FS04HkzuGopM6/z7NUXIy3iS77Bql//C0900g7+B
iLZw8XMyN81gIfJK8Z8noHAAfZxUPJpwzdcfasT/sSwPC5yvUwMW1kwKT2Yh8Y/t
tm3xYtKZRMdIDHHRWMkyFexxNtZZSoW3QYPFul4LW+aWefAh8aNlV8gO22edtqx+
6IyrDvJdCJGQ9iSROuq2JpcmlPSOTWDohRU5odFPB0Y2Ym6mi8JK3XaMe3YnQz4l
CVXVuYqDDZK5SLIA0pMg++9aHonnvilbR5eEGLLYvrhZw4aSeNAzTWM2nbF+XEWk
irnjHXzpSbhtaG03tlI2dH1J7J2MNDVEYrV0Qywk3BXl10xlADzdaM5Z0yG7nilq
45uOYlX0lq7K6vjQ9vo5POW/r+erw0/tc1RT3Vj4Kvqx5rW5mAnNMZ7veZ+UGocw
rA5qEu9q7bGTzQ+envFJWqqP0YaMpSSekPrZ0EwcveBEWjIWUlh/va90+Ffd4XPZ
DLVfGxo6WKMyvkW3o5UCKnAwOCNDmSFE7jyJzU/WslEgTge3I8rGOMTzi8tgBWEH
6+MaRJqdy9fQoxMMz+Dx
=uP+5
-----END PGP SIGNATURE-----
Merge tag 'at91-ab-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/soc
SoC changes for 4.8:
- Solve an issue with DEBUG_LL and multi_v7
- Also make DEBUG_LL more user friendly
* tag 'at91-ab-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: debug: add default DEBUG_LL addresses
ARM: at91: debug: use DEBUG_UART_VIRT
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch updates/fixes all spin_unlock_wait() implementations.
The update is in semantics; where it previously was only a control
dependency, we now upgrade to a full load-acquire to match the
store-release from the spin_unlock() we waited on. This ensures that
when spin_unlock_wait() returns, we're guaranteed to observe the full
critical section we waited on.
This fixes a number of spin_unlock_wait() users that (not
unreasonably) rely on this.
I also fixed a number of ticket lock versions to only wait on the
current lock holder, instead of for a full unlock, as this is
sufficient.
Furthermore; again for ticket locks; I added an smp_rmb() in between
the initial ticket load and the spin loop testing the current value
because I could not convince myself the address dependency is
sufficient, esp. if the loads are of different sizes.
I'm more than happy to remove this smp_rmb() again if people are
certain the address dependency does indeed work as expected.
Note: PPC32 will be fixed independently
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: chris@zankel.net
Cc: cmetcalf@mellanox.com
Cc: davem@davemloft.net
Cc: dhowells@redhat.com
Cc: james.hogan@imgtec.com
Cc: jejb@parisc-linux.org
Cc: linux@armlinux.org.uk
Cc: mpe@ellerman.id.au
Cc: ralf@linux-mips.org
Cc: realmz6@gmail.com
Cc: rkuo@codeaurora.org
Cc: rth@twiddle.net
Cc: schwidefsky@de.ibm.com
Cc: tony.luck@intel.com
Cc: vgupta@synopsys.com
Cc: ysato@users.sourceforge.jp
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Name the Pin Function Controller subnode for SCIFA4 after its device
name, instead of after the serial port alias.
This avoids conflicts when adding support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF2 after its device
name, instead of using some arbitrary name that looks like a serial port
alias, but differs from the actual alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF2 after its device
name, instead of using some arbitrary name that looks like a serial port
alias, but differs from the actual alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for QSPI and MSIOF0 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for VIN1 after its device name,
instead of using the generic and indexless "vin".
This avoids conflicts when enabling support for more video inputs later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for QSPI and MSIOF1 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF0 and SCIFA1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF2 and SCIF4 after
their device names, instead of using some arbitrary names that look like
serial port aliases, but differ from the actual aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIFA1 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for MMC0 after its device name,
instead of using the generic and indexless "mmc".
This avoids conflicts when enabling support for more MMC interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIFA0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
4.7-rc1 because OF graph logic expects specific names of child nodes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXXssHAAoJEME3ZuaGi4PXGNwQAIuZyLfPaJpqOlhIACwQsaXj
/X6/sg1dy92QooW1r5VHeYYVBjcY3xfOqpFuJhQbxXbsDuhgrKFLIZh0hyUd1uoY
hWJAlwmTjF85IxhbNtPMoysxDxRpKs/nuR/GiDI+5cR50YNZC8tCiyODurRGCLm2
QQ7Y4DcmuWfLqTR8o65xCGv8AuVEhp4S+b4uLT3Cx5BSZd7cQVlHpcMyI4Ynkm1K
nQ/yWF7SA8q6bQtb4ApofQszUZiC5R5V5xi1iCz9ukktEs1f7F+HkFaCTw9QtlbU
Ej258jvnDxDAHwcAzFWxFHlk6zJV/SIFHH4lxvyPNVnRs6mRoCmBnyWrsKiHOCo3
lCSaAwDluyBFRK+cfa0gZsBco69BBniRBkapqbQeu+GdnOli726XA/vBST+qpQ0C
+2js6i6wpokR3YHqXhaf6HNqM1Q5ORYPQMxz76u2Okdnucha0/q7cBjJPekpIwE0
TyoXUWP8tWWxdDoAVwyHp+0Ai34pof2pyMFFkV2PdIheVYlGYVust5uEhTWGp+ty
4m0ukaMffq5Xp4xOlRraaVgSvZo7/BGxiBRFud8ve9sYEx6uu7a0R365kDsnScVW
gpnUoDTuf0FsH/OAj6ZSraf2oqfOvrJ+TEybMdTD4M9MeZqcxtc8x6bWb2Ilwox3
JFXyCQR4Y+GtpQFEwAfL
=ro/B
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into fixes
Fixes for Exynos-based Snow and Peach Pit boards for regressions introduced in
4.7-rc1 because OF graph logic expects specific names of child nodes.
* tag 'samsung-fixes-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Fix port nodes names for Exynos5420 Peach Pit board
ARM: dts: exynos: Fix port nodes names for Exynos5250 Snow board
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update Arria10 ECC manager
- Add ethernet alias for Arria10
- Update serial alias for Arria10
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXWHESAAoJEBmUBAuBoyj0VV0QALgtV3avO4/bTuAOjkhvUy9Q
KX4Hbene+bK2zkd82ChMfaFErPD8AYttdy6pLKUHp+F6AssTRH2RTyezwv/dlIBH
+Q/qFvs6SRvc+0Jto11hVe/Dx5adV7aeBLjzWwLkNJ/BpqRCyM4hKw228i0JwuMl
/PM3LdZw8V1956rbwcjLCNWV4HaDhOB0hTmfO+nZIGHaj6Qut27BYa4tGLWDKRPs
QE7RwY3FBNMCXcpRGQBhjFzBGJrFEAT5/tkr3UA2vJnUhSKQa99QQon/L/REhPdY
EWkrvLOTa86sof51jsm9bSM2TJvbJs+rQkHsp8qgWfgz2TI0S9kvFq72ttDJtII1
HWxAJqAiJgP6X95RVU/aLPVZ4uyKg3MjPT4mYhIj9H1yex440kPHG9dOx99DKoxA
1UGDh68J4c0UIL9Uvt+QLeTY2PfaunfDxjcsDVxKfw++sXE4OeazhJCJlceq8P+o
z5r5hl2CzWeKLnrWP7oNQhfjuRce8G4NzBKAoL+11JVi1xwv8C1ggX2TqAhfY+kz
WH45OmG2djzuY96sLb3tabatl7i6h3UALFCZTJ6D9XXB3zKbqgwSrq7IlVvkFkf9
ivDNp8TQ1rczho/ue5GLgrqBN3l1El1KX4Kj3K9ZW3Fj60FzVvP+V5tsNBVq+nBb
ntn4eP0ZTeozDIm/XvtK
=WdVs
-----END PGP SIGNATURE-----
Merge tag 'socfpga_updates_v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.8
- Update Arria10 ECC manager
- Add ethernet alias for Arria10
- Update serial alias for Arria10
* tag 'socfpga_updates_v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: fix definitions of serial console
ARM: dts: socfpga: add ethernet alias on Arria10
ARM: dts: Move Arria10 SDRAM as child of ECC Manager
ARM: dts: Arria10 ECC Manager IRQ controller changes
Signed-off-by: Olof Johansson <olof@lixom.net>
- Move the ab8500 compatible string from the board to the
chipset.
- Define GPIO line names for the boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXV8y4AAoJEEEQszewGV1zXRUP/RitlC4vtzEXCfhTHdg3BQI1
uNkHl96N3sgQaj/67ImT46E078JlIz9uNFhxj3jXxIk5BOaJoBBG6Giz8NzFpEl/
Jh7YFzUW4L5v8O4vp5Fl1vEUvXoZn8MZClihcREihcjecm6FAD0CHujmu6dn2cpx
sC7L1mbmS8IWvGeLxohfCoeAJFnSsNwJ2BUqgdnM/dxRFa33fr45XTGIVeV5XkI6
JPYyM7jsGnbg9YqWX+RdLLMLD1DcriSpXjVbmHdfW6avqAjWT6USIe7gjcG6YUwR
6Pqh0HLGVH6PNVRlkIlV1hVizPPb3At4ouMT9I09kmoAD1mpg1AsiadunA4F2EPa
oDgajYRI4Teuj171jCjWyCnJIcluqhXK+QgYFs/ubT1BklKBxBwOHFgz0yIhpSEq
VBMEjfyXko+wYpCfG+ZZEPyqOhBFQfhlQnS8TzL4nMI1oma7XnY7s/Ph0oSuZOlx
L+FeQQ21SV2gBnO1oTTUk+D9D8V0Vwq9WvQWNt6kEt5E8AwGPX0N1FCGCFAyrwa+
+YmCIBpMZj5TtYHhf6frRx+dEe5e3or3NdR0a43jXhPYxPkWhXVcBVKzMuPFfA0z
5/3JDx37bFNmvSXW7ysw5dZeimvYtZfitw/9EOnxk9vS5ASiEOA2VtCTx9h3OZLs
1ZDvxa/0XAOHTp5gbmv8
=sOoX
-----END PGP SIGNATURE-----
Merge tag 'ux500-dt-asoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Ux500 devicetree patches:
- Move the ab8500 compatible string from the board to the
chipset.
- Define GPIO line names for the boards.
* tag 'ux500-dt-asoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: UX500: name the GPIO lines on HREFv60plus
ARM: dts: Ux500: name the GPIO lines on Snowball
ARM: dts: Ux500: move compatible string to chipset
Signed-off-by: Olof Johansson <olof@lixom.net>
* Use ICRAM1 for jump stub on R-Car Gen 2 SoCs
* Postpone call to pm_genpd_init
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXV2vKAAoJENfPZGlqN0++Bi4P/2ZVe7ZQnG0EIdzY+hBHPj/k
pS3dSrenUdeaM7vYVpB2S6f+6lqh3Dn6//jsY2/x127H9oj8cSzTidkLYXEUZb7v
KjZIwjPq4+UjaA1hd2WZxjcbJKgkKz1BGh+GWUjvr/99cyh5ySkHMvsNHfyBjDQd
SwKnklzCIJHws8UkKgEXtUutS+Z3LcClxNe5L+0dAnvh5dMp1Up/zTXsq5pDegr2
ytQYjh+TEFmuUxLx3YB511LjrLDfpAB7yGHDajAbZjDi3KtlKqbypdx+TgiqT9hh
zA5HP67XQFeJFp2DzariztVx+nHMrVd7atRn0qSX64TgqMPwpIMTLPEVFP+wCDyg
2bqgIAoGJfg4bl1IL9QRTt607SyHALIzjP+n7Jb2wPejW8OtubHmKVdTamevrZTe
lQvDNv6RwAZF60X1SkagxL13GAS3YRhKKi7wMDVb9ARzplvbh0KSDsu94k0S+wOE
dGBDnAPGe0A0HHBm5IMgADBW6RRvLAnwkr73gGIbBbTX/rwctawnBi+eIkEZUfqF
YzV3XavNOC5sXxGjQ5IiufHx/WL5XIy8np1aQNA67l3fFNYi/xrtgtFk+YKlcuiJ
OJvNHvM0BaV5g09UYUEfO6zlN1lFUhWji6Q+ro5GSAgDl9Ki8SwQfA5wSjBW113E
TdkCIRN0hkXf+AzPG5or
=DKN7
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Updates for v4.8
* Use ICRAM1 for jump stub on R-Car Gen 2 SoCs
* Postpone call to pm_genpd_init
* tag 'renesas-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: rcar-gen2: Use ICRAM1 for jump stub on all SoCs
ARM: shmobile: pm-rmobile: Postpone call to pm_genpd_init()
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Disable big.LITTLE switcher so the cpufreq-dt could be enabled.
2. Enable Samsung media platform drivers.
3. Enable some board-specific drivers for boards: Trats2, Universal C210.
4. Few more minor additions.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXVWOmAAoJEME3ZuaGi4PX+9IP/RR7BP8TVGGKIqTYboQGR+mc
6JfBYabC2iUZwN3Unnjo4FxUFqCAtSZ/2g5RTe3sPG7wAjTSX3OtpLv4TEvX9gHe
1gVplOuXS4c4IEg2Uw9K7L+SnOFrGyC9Lk7ywCUO4dEk2PJC/xsvQX6JrZRFM3ne
pJ6Fpz86vPqa+yqyYBw6Jd3j0po3VL7LzhKC+n9HyMbuJ7Drl3yOjzgPHxGY6GJq
UlLdKxQ5PEtMCucMoxvgYdbjFHT+VsIM1nJYY9VSKvSUhiczMZvXnrPrUHNk1or8
i/hs0MhgxLiPl/2h3eYKpKzodDp7XOy1+W3NPTralkixMA8ZOwLZRzAiKwAkZBk9
KKIVaW5E6Yh6JEaAJ0KyiVibAuVkMKXnc7JAEDvwwYCu5j4fx/EdzeaYMFS8DUS/
iMeksxP3TOyQ51Le+Z9nWrOAKLsUChZgLAB3b724GRNJqZ73+yprkV/O7A7Lb3T2
joW3ge+JSu/n8RgvFGsZo0i/LLRXJrBGsIqihJtuunBm3wiUjQVGD83XIu2bToNO
SEd42WHpuvAIGgKjKjQlXVyTlhnk5p8AbgI28IZ34FDLxTpG+t1lYErFRulPrScC
g+OfW92wfm6sk9k8upNNTfzAjttHdzHHSAaKa1jxP25eB9T/g1Gu9TEu20QXvqJz
cjUVNYi32q51B22PjvVy
=xPJg
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/defconfig
Samsung defconfig update for v4.8:
1. Disable big.LITTLE switcher so the cpufreq-dt could be enabled.
2. Enable Samsung media platform drivers.
3. Enable some board-specific drivers for boards: Trats2, Universal C210.
4. Few more minor additions.
* tag 'samsung-defconfig-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: exynos_defconfig: Save defconfig on current linux-next
ARM: multi_v7_defconfig: Enable s5p-secss driver
ARM: multi_v7_defconfig: Enable drivers for Exynos4210 Universal C210 board
ARM: multi_v7_defconfig: Enable Trats2 audio codec, touchscreen and sensors
ARM: multi_v7_defconfig: Switch max77693 to module
ARM: multi_v7_defconfig: Enable Exynos MFC driver as module
ARM: exynos_defconfig: Enable MFC driver as module
ARM: multi_v7_defconfig: Enable Samsung media platform drivers as modules
ARM: exynos_defconfig: Enable Samsung media platform drivers as modules
ARM: multi_v7_defconfig: Enable Exynos DRM Mixer driver
ARM: exynos_defconfig: Disable big.LITTLE switcher
Signed-off-by: Olof Johansson <olof@lixom.net>
This brings support for Hardkernel's Odroid XU board. It was the first
design with big.LITTLE SoC from Samsung: Exynos5410. The board is not
very popular. Newer XU3 and XU4 got more attention.
Board details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
revisions though),
6. eMMC 4.5 and microSD slots.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXVWVcAAoJEME3ZuaGi4PXFVQP/3JyYEYpBw+6tu0PasYz2cYr
D2fprLkHlfFOY+wGdHoTuBsjsOj1nwTXyVAA/zhIqudgJFXH67vR+BABoCDVT7J0
/pYfMT4rm9Wa4ddKJnE6bv78IbAI52S1tzKsHRi+YlceVbKFUWJAqSsaJYVDOaci
Sxg4/sbD2VcU7xlDNw2lSux6du3MEkdbarOd3l58eKMwvqSRCmvx7YultrrFwDhV
JByy1VG+WXAWyaE59VRZ+kAGHMDTz7KK8YNjkUGmgJK0Ryd6C8kETw1ZC8fiA/tZ
+QlnDehngSZ15x79RI7JUj/F+UY2QrMDzLk6qIa2E3sgWv4aJ0csFymk1+mUDhJF
vO8EwqF+YnbwNG1mmzmqBgeQxb3EdKdM/onanpazIlQAlpaJIJpBbKR8x2Doa6TZ
g/f37FQW3l1DEBT3H2IXd6Yx1FgCnlFjPb0fwnS5sG05YyOEKdKTss+5LKShG5J4
VeN8/EmaocRvQx0GE0pRr0nhuaWt9E59jXrAmBe8OUVIjQYTvxRoH2mWEQ0iuOEZ
+VRD/WwtkdqeUBOSFYckVWDanJPqh3qLZ+eCEqoguMKtqCTC3eJp2euIBsawA4DW
Nxl6Zy5iIMfc7j4VtoDy7qDtBJ1hzeX8gzRE+tVXrtpiMs2gd1+Jkofr2nTIihU9
h/Hg9dc34pSV9by8hutW
=7u0/
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Topic branch for adding Exynos 5410 Odroid XU board for v4.8.
This brings support for Hardkernel's Odroid XU board. It was the first
design with big.LITTLE SoC from Samsung: Exynos5410. The board is not
very popular. Newer XU3 and XU4 got more attention.
Board details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
revisions though),
6. eMMC 4.5 and microSD slots.
* tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
ARM: dts: exynos: Add watchdog and Security SubSystem to Exynos5410
ARM: dts: exynos: Configure PWM, usb3503, PMIC and thermal on Odroid XU board
ARM: dts: exynos: Add Thermal Management Unit to Exynos5410
ARM: dts: exynos: Interrupt for USB DWC3-1 differs between Exynos5420 and 5410
dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410
dt-bindings: clock: Add TMU clock ID to Exynos5410
ARM: dts: exynos: Add RTC and I2C to Exynos5410
ARM: dts: exynos: Add I2C, PWM and UART pinctrl to Exynos5410
ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsi
ARM: dts: exynos: Add initial support for Odroid XU board
ARM: dts: exynos: Add USB to Exynos5410
ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI
ARM: dts: exynos: MCT is not an interrupt controller and extend length of iomap
ARM: dts: exynos: Enable UART3 on Exynos5410
ARM: dts: exynos: Include common exynos5 in exynos5410.dtsi
ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc
ARM: dts: exynos: Use phandle to get parent node in exynos5250-snow
ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsi
ARM: dts: exynos: Move common nodes to exynos5.dtsi
ARM: dts: exynos: Split Odroid XU3 LEDs to separate DTSI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add missing async bridge for MFC power domain on Exynos5420.
This fixes imprecise abort on s5p-mfc re-bind.
2. Define regulator supplies for MMC nodes on Exynos4412 Odroid boards
and for TMU on Exynos542x Peach boards.
3. Thermal cleanups on Odroid XU3-family (Exynos5422).
4. Enable AX88760 USB hub on Origen board (Exynos4412).
5. Minor cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXVWLzAAoJEME3ZuaGi4PXxwcP/iEIEXDy/0gKaJ2mEMcutI+/
en2KPLXa+pg4JOSoVQKAPgiwwNeC+z4zgT38XJGn2Zs/YO9BbTNzJ4pzafqTXoko
h5us4YNDcy9xUb95gr7zS6YDfs0+hzFJ+Aqzfz/BL5cZgM0dowla2LqNSzqHXPXJ
6e8JYHLRb3uq+eYKVIeO1kj6WgcFuDFgRy627gimtqnZgInpFH3jL4G3e7jcRv1N
yG+UDaOn1lB4NEdwbQ5nBFGok5Ihs9Gh1XiVDigMRBxaiXtyUnoo7BGoHRWf8QrV
fOMl6EZ93fhI/b503W2cxB7zMZ85iReSzpxU6NWI29BcozrcqE5TAVZZRyMZ47Er
MlTSdE2b5E4yU0mwYWHluJ2EugJNJObopWQ7OC850QuS4x056AO3y9tfV4hR1LWD
BvuCo3IDuU0s0M1TX/JeoDXfBA11eLNfwuqbmpsoEKwu2Zy8mLzda3AQvML1ycSr
GusZAKp+FrtXBp/+QlZzYQuYoMbzxnih4aQX+gwGekD6YwhI6DIfqmU4yAUMyHTn
WlTO5Hw0LYb7nCad4X5P9NnGNIzEJLCUa0BSmgjtQkDPmAmMT6UKdAftjuXj0gHy
mRyRGoYdXJxNBD/sTcm9gd7mk+FmkMcUj0qnK4qHG4O3RAnys3rYdLUc4n+DXOha
XOqWdz4GYFA0lv4P6MMg
=E3ZO
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.8:
1. Add missing async bridge for MFC power domain on Exynos5420.
This fixes imprecise abort on s5p-mfc re-bind.
2. Define regulator supplies for MMC nodes on Exynos4412 Odroid boards
and for TMU on Exynos542x Peach boards.
3. Thermal cleanups on Odroid XU3-family (Exynos5422).
4. Enable AX88760 USB hub on Origen board (Exynos4412).
5. Minor cleanups.
* tag 'samsung-dt-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: No need to enable TMU nodes on Odroid XU3 family
ARM: dts: exynos: Add TMU nodes regulator supply for Peach boards
ARM: dts: exynos: Use new compatible string for thermistors in Trats2
ARM: dts: exynos: Remove unneded always-on for regulators on Peach boards
ARM: dts: exynos: Enable AX88760 USB hub on Origen board
ARM: dts: exynos: Only Odroid XU3-family boards use DTSI with CPU thermal nodes
ARM: dts: exynos: Lower SD card interface voltage to 2.8 V on Odroid X/X2/U3
ARM: dts: exynos: Define vqmmc for eMMC card on Odroid X/X2/U3
ARM: dts: exynos: Define vqmmc for SD card and allow disabling regulators on Odroid X/X2/U3
ARM: dts: exynos: Add async-bridge clock to MFC power domain for Exynos5420
Signed-off-by: Olof Johansson <olof@lixom.net>
Define the port mapping for the SmartRG SR400ACE device.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add interrupt mapping for the Switch Register Access Block. Only 12
interrupts are usable at the moment even though up to 32 are dedicated
to the SRAB.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the Switch Register Access Block which is a special piece of
hardware allowing us to perform indirect read/writes towards the
integrated BCM5301X Ethernet switch.
We also add the 4 Gigabit MAC Device Tree nodes within the brcm,bus-axi
bus node to get proper binding between the BCMA instantiated core and
the Device Tree nodes. We will need that to be able to reference
Ethernet Device Tree nodes in a future patch adding the switch ports
layout.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Fix missing function prototypes found in spc.h by including
the file to remove the following warnings:
arch/arm/mach-vexpress/spc.c:131:6: warning: symbol 've_spc_global_wakeup_irq' was not declared. Should it be static?
arch/arm/mach-vexpress/spc.c:156:6: warning: symbol 've_spc_cpu_wakeup_irq' was not declared. Should it be static?
arch/arm/mach-vexpress/spc.c:185:6: warning: symbol 've_spc_set_resume_addr' was not declared. Should it be static?
arch/arm/mach-vexpress/spc.c:210:6: warning: symbol 've_spc_powerdown' was not declared. Should it be static?
arch/arm/mach-vexpress/spc.c:240:5: warning: symbol 've_spc_cpu_in_wfi' was not declared. Should it be static?
arch/arm/mach-vexpress/spc.c:450:12: warning: symbol 've_spc_init' was not declared. Should it be static?
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Fix two missing function declarations by including the
<plat/platsmp.h> file where they are defined. Fixes:
arch/arm/plat-versatile/platsmp.c:35:6: warning: symbol 'versatile_secondary_init' was not declared. Should it be static?
arch/arm/plat-versatile/platsmp.c:50:5: warning: symbol 'versatile_boot_secondary' was not declared. Should it be static?
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Fix the missing declaration of vexpress_cpu_die() by
including core.h where it is defined. Fixes:
arch/arm/mach-vexpress/hotplug.c:88:6: warning: symbol 'vexpress_cpu_die' was not declared. Should it be static?
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The variable 'perf_stat_reg' in ve_spc_set_performance is assigned a
value but that is never used.
So let's remove the variable 'perf_stat_reg'
Reported-by: David Binderman <dcb314@hotmail.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
As per the latest revision F of public TRM for DRA7/AM57xx SoCs
SPRUHZ6F[1] (April 2016), with the exception of MPU power domain, all
other power domains do not have memories capable of retention since
they all operate in either "ON" or "OFF" mode. For these power states,
the retention state for memories are basically ignored by PRCM and does
not require to be programmed.
[1] http://www.ti.com/lit/pdf/spruhz6
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per the latest revision F of public TRM for DRA7/AM57xx SoCs
SPRUHZ6F[1] (April 2016), with the exception of MPU power domain (and
CPUx sub power domains), all other power domains can either operate
in "ON" mode OR in some cases, "OFF" mode. For these power states,
the logic retention state is basically ignored by PRCM and does not
require to be programmed.
[1] http://www.ti.com/lit/pdf/spruhz6
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per the latest revision F of public TRM for DRA7/AM57xx SoCs
SPRUHZ6F[1] (April 2016), L4Per and L3init power domains now operate in
always "ON" mode due to asymmetric aging limitations. Update the same
[1] http://www.ti.com/lit/pdf/spruhz6
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix the following warning by including ../common.h to provide
the protoype for mxc_register_gpio() :
arch/arm/mach-imx/devices/platform-gpio-mxc.c:11:24: warning: symbol 'mxc_register_gpio' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix the following warnings by adding the include files
that define them:
arch/arm/mach-imx/devices/devices.c:25:15: warning: symbol 'mxc_aips_bus' was not declared. Should it be static?
arch/arm/mach-imx/devices/devices.c:29:15: warning: symbol 'mxc_ahb_bus' was not declared. Should it be static?
arch/arm/mach-imx/devices/devices.c:33:12: warning: symbol 'mxc_device_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from
waking the CPUs when they are in wait(unclocked) state. As the hardware
workaround isn't applicable to all boards, disable the deeper idle state
when the workaround isn't present and the FEC is in use.
This allows to safely run a kernel with CPUidle enabled on all i.MX6
boards.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: David S. Miller <davem@davemloft.net> (for network changes)
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove boilerplate code by using IRQCHIP_DECLARE macro.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The header eukrea-baseboards.h is not used, remove it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the firmware node for the SCM
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
This patch adds the power key device tree node.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The #size-cells for the pmics are 0, but we specify a size in the
reg property so that MPP and GPIO modules can figure out how many
pins there are. Now that we've done that by counting irqs, we can
remove the size elements in the reg properties and be DT
compliant.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Enable the sdcard slot and wire up the regulators for the two
storage controllers found on the apq8074 dragonboard.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the appropriate min/max voltages for the regulators on the
apq8074 dragonboard so that they can be used by clients properly.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add "dis_rxdet_inp3_quirk" boolean property to USB3 node. This property
is used to disable rx detection in P3 PHY mode.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PCI reset GPIO is active low, so represent it with the
GPIO_ACTIVE_LOW flag.
Even though the imx6 PCI driver will not take the polarity into account
in this case, it is better to provide a correct description in device-tree.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license. In particular, the Utilite Pro
devicetree file (which includes imx6q-cm-fx6.dts) is already dual
licensed under GPLv2/X11.
Hence, relicense imx6q-cm-fx6.dts under GPLv2/X11 dual license.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The CompuLab Utilite Pro is a miniature fanless desktop pc based on
the i.MX6 Quad powered cm-fx6 module. It features two serial ports,
USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and
DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt.
Add initial support for it including USB, Ethernet (both ports), sata
and HDMI support.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The cm-fx6 module has an on-board spi-flash chip for its firmware, an
eeprom (containing e.g. the mac address of the on-board Ethernet),
a sata port, a pcie controller, an USB hub, and an USB otg port.
Enable support for them. In addition, enable syscon poweroff support.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6q-cm-fx6 iomuxc container node is not required. Remove it.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This fixes the following dtc warning by removing the unnecessary unit:
Warning (unit_address_vs_reg): Node /matrix-keypad@0 has a unit name,
but no reg property
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This fixes the following dtc warning by removing the unnecessary unit:
Warning (unit_address_vs_reg): Node /onewire@0 has a unit name,
but no reg property
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the missing reg properties for the regulator nodes
in order to fix the dtc warnings.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the missing reg properties for the MXS GPIO banks
in order to fix the dtc warnings.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Auvidea H100 is a baseboard for the SolidRun MicroSOM.
Its primary feature is a Toshiba TC358743 HDMI to CSI decoder,
allowing the board to work as HDMI passthrough and framegrabber.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT property to all boards that have the hardware workaround
for erratum ERR006687 present. This allows the CPUidle driver to use
the deep idle states, even if the FEC is active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This node describes the DI1 port of IPU, fix the node name to reflect this.
There's currently no user of this node in mainline, so this change should
not break any supported platforms.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the LCD8000-43T display and for the backlight
controlled via PWM1.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As of commit 1006ed7e1b ("serial: imx: Use generic uart-has-rtscts
DT property"), the Freescale IMX UART driver recognizes the generic
"uart-has-rtscts" DT property, deprecating the vendor-specific
"fsl,uart-has-rtscts" DT property. Hence replace the latter by the
former in all DTS files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As of commit 182cdcb8bb ("serial: mxs-auart: Use generic
uart-has-rtscts DT property"), the Freescale MXS AUART driver recognizes
the generic "uart-has-rtscts" DT property, deprecating the
vendor-specific "fsl,uart-has-rtscts" DT property. Hence replace the
latter by the former in all DTS files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds back the dma channels for the i2c1 node. This is safe now
that the qcom,controlled-remotely changes are in place and will be used
on the boards that require it.
This reverts commit 10c0f0e92f.
This puts back in place the blsp2_bam node. This can be safely added
due to the addition of the special qcom,controlled-remotely flag that
will be used on specific boards that require it.
This reverts commit 338d518898.
Conflicts:
net/sched/act_police.c
net/sched/sch_drr.c
net/sched/sch_hfsc.c
net/sched/sch_prio.c
net/sched/sch_red.c
net/sched/sch_tbf.c
In net-next the drop methods of the packet schedulers got removed, so
the bug fixes to them in 'net' are irrelevant.
A packet action unload crash fix conflicts with the addition of the
new firstuse timestamp.
Signed-off-by: David S. Miller <davem@davemloft.net>
Add PL330 support to the the Broadcom Northstar Plus device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The BCM958525XMC board is a smaller form factor typically used as
controller boards for switches. This smaller board has less devices
pinned out, so only a few need be populated in the device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add configuration options for the most commonly used UART physical and
virtual addresses to ease the use of DEBUG_LL and earlyprintk.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
AT91 still uses an offset (0x0100 0000) from the physical address to map
the debug UART. This is unfortunate as for some platforms (sama5d3 and
earlier), it ends up in the PCI zone and PCI is enabled in multi_v7.
Switch to DEBUG_UART_VIRT to solve that.
Tested on sama5d3 and 9g20.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Joachim Eastwood <manabian@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Fabio Porcedda <fabio.porcedda@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Sergio Tanzilli <tanzilli@acmesystems.it>
Cc: Douglas Gilbert <dgilbert@interlog.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Rodolfo Giometti <giometti@linux.it>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Sergio Tanzilli <tanzilli@acmesystems.it>
Cc: Douglas Gilbert <dgilbert@interlog.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The Denx MA5D4 dts doesn't properly define the slow_xtal and main_xtal
frequencies, the PMC then has to fallback to using the RC oscillators whose
precision is not really good.
As both crystals are populated, define their frequencies, see p17 of
http://www.denx-cs.de/sites/all/files/MA5D4.HWM_.002.pdf
Also, remove the obsolete main_clock definition.
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Use stdout-path to specify the console and remove the console argument from
the kernel command line.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
When building with W=1 this function is flagged as not having a
prototype defined. Add the prototype to avoid a build warning.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some of the functions implemented are flagged as not having a prototype
defined when building with W=1. Include the header to avoid these build
warnings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some of the functions implemented are flagged as not having a prototype
defined when building with W=1. Include the header to avoid these build
warnings and add a prototype as well as a dummy implementation for the
tegra_cpuidle_pcie_irqs_in_use() function.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some of the functions implemented are flagged as not having a prototype
defined when building with W=1. Include the header to avoid these build
warnings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The compatible device tree node that is searched for is imx6q-iomuxc-gpr
but was misspelled imx6q-iomux-gpr in the error handling message.
Signed-off-by: Jean Guyomarc'h <jean.guyomarch@openwide.fr>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for this small MP3 player based on STMP3780 (rev.3).
Currently supported are both external microSD and internal SD-NAND
bridge, PWM and USB gadget.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for this small MP3 player based on STMP3780 (rev.4).
Currently supported is both external microSD and internal SD-NAND
bridge, PWM and USB gadget.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Wenyou Yang