Commit Graph

754812 Commits

Author SHA1 Message Date
Ben Skeggs 8b058ca518 drm/nouveau/gr/gf100-: virtualise r405a14
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs 6f63a5fb1e drm/nouveau/gr/gf100-: support firmware-provided sw_nonctx everywhere
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs 1246f1dc22 drm/nouveau/gr/gf100-: virtualise init_gpc_mmu + apply fixes from traces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs 334cc26d4d drm/nouveau/fifo/gp100-: force individual channels into a channel group
RM does this for some reason, and is enforced in HW on Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs eda12417d3 drm/nouveau/fifo/gm107-: write instance address in channel runlist entry
RM does this for some reason.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs 79bb4b617f drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs 8c4e9f9dff drm/nouveau/fifo/gk110-: support writing channel group runlist entries
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs 4f2fc25c0f drm/nouveau/fifo/gk104-: poll for runlist update completion
Newer HW doesn't appear to send this event, which will cause long delays
in runlist updates if they don't complete immediately.

RM doesn't use these events anywhere, and an NVGPU commit message notes
that polling is the preferred method even on HW that supports the event.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 665870837a drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts
This will be required to support features on newer hardware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs f9360c3aa6 drm/nouveau/fifo/gk104-: simplify definition of channel classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs a7cf01809b drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.

By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.

The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs cc36205085 drm/nouveau/fifo/gk104-: support querying engines available on each runlist
Will be used to improve channel runlist selection.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs ddc669e256 drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs
This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 55b8e85b0b drm/nouveau/fifo/gk104-: accept engine contexts for CE3 and up
These can exist on GP100 and newer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs eb47db4f3b drm/nouveau/fifo: support channel count query
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 6eb01aa898 drm/nouveau/device: support querying available engines of a specific type
Will be used for fifo runlist selection.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs c5c9127b25 drm/nouveau/device: implement a generic method to query device-specific properties
We have a need to fetch data from GPU-specific sub-devices that is not
tied to any particular engine object.

This commit provides the framework to support such queries.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs f5650478ab drm/nouveau/disp/nv50-: pass nvkm_memory objects for channel push buffers
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs a9c44a88ca drm/nouveau/disp/nv50-: add channel interfaces to control error interrupts
This will be required to support Volta, but also allows us to remove code
that's duplicated for each channel type already.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 4a8621a24a drm/nouveau/disp/nv50-: add channel interfaces to determine the user area
This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 8531f57027 drm/nouveau/disp/nv50-: merge handling of pio and dma channels
Unnecessarily complicated, and a barrier to cleanly supporting Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 9b096283bf drm/nouveau/disp/nv50-: simplify definiton of core channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 6d41a7536f drm/nouveau/disp/nv50-: simplify definition of cursor channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs 3ceeef9c03 drm/nouveau/disp/nv50-: simplify definition of base channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs c2c3a00310 drm/nouveau/disp/nv50-: simplify definition of overlay immediate channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 46f74a8ad7 drm/nouveau/disp/nv50-: simplify definition of overlay channels
Introduces a new method of defining channels available from the display,
common to all channel types, allowing for more flexibility in available
channel types/counts, and reducing the amount of boiler-plate required.

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs abc1d4379b drm/nouveau/disp/nv50-: replace user object with engine pointer in channels
More simplification.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs bb3b0a4220 drm/nouveau/disp/nv50-: initialise from the engine, rather than the user object
Engines are initialised on an as-needed basis, so this results in the
same behaviour, whilst allowing us to simplify things a bit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs f5e088d6f0 drm/nouveau/disp/nv50-: fetch mask of available piors during oneinit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 9fe4e17704 drm/nouveau/disp/nv50-: fetch mask of available sors during oneinit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs bf5d1a6b6a drm/nouveau/disp/nv50-: fetch mask of available dacs during oneinit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs f7b2ece37f drm/nouveau/disp/nv50-: fetch mask of available heads during oneinit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 3b9ba66ab0 drm/nouveau/disp/nv50-: delay subunit construction until oneinit
We should be reading registers to determine which subunits are really
present on a given board, and this needs to be done after DEVINIT.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 85a3b9c839 drm/nouveau/fb/gm200-: fix overwriting of big page setting
Likely a rebase bug.  Should have no impact in default configuration due
to using per-instance setting by default.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs d1ea77ab5f drm/nouveau/fb/gf100-: bump size of mmu debug buffers to match big page size
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs d0e9351e42 drm/nouveau/fault/gp100: implement replayable fault buffer initialisation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 36780d7eee drm/nouveau/fault: add infrastructure to support fault buffers
GPU-specific support will be added separately.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 2f68234fb3 drm/nouveau/mc/gp100-: route fault buffer interrupts to FAULT
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs 1ce466894b drm/nouveau/core: define FAULT subdev
This will be responsible for the handling of MMU fault buffers on GPUs
that support them.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Gustavo A. R. Silva 7bf5b70bef drm/nouveau/secboot: remove VLA usage
In preparation to enabling -Wvla, remove VLA. In this particular
case directly use macro NVKM_MSGQUEUE_CMDLINE_SIZE instead of local
variable cmdline_size. Also, remove cmdline_size as it is not
actually useful anymore.

The use of stack Variable Length Arrays needs to be avoided, as they
can be a vector for stack exhaustion, which can be both a runtime bug
or a security flaw. Also, in general, as code evolves it is easy to
lose track of how big a VLA can get. Thus, we can end up having runtime
failures that are hard to debug.

Also, fixed as part of the directive to remove all VLAs from
the kernel: https://lkml.org/lkml/2018/3/7/621

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Arnd Bergmann 9dfbd73199 drm/nouveau: nouveau: use larger buffer in nvif_vmm_map
gcc points out a buffer that is clearly too small to be used
in a meaningful way, as the 'sizeof(*args) + argc > sizeof(stack)'
will always fail:

In function 'memcpy',
    inlined from 'nvif_vmm_map' at drivers/gpu/drm/nouveau/nvif/vmm.c:55:2:
include/linux/string.h:353:9: error: '__builtin_memcpy' offset 40 is out of the bounds [0, 16] of object 'stack' with type 'u8[16]' {aka 'unsigned char[16]'} [-Werror=array-bounds]
  return __builtin_memcpy(p, q, size);
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/nouveau/nvif/vmm.c: In function 'nvif_vmm_map':
drivers/gpu/drm/nouveau/nvif/vmm.c:40:5: note: 'stack' declared here

This makes the buffer large enough so it should serve the purpose
that the author presumably had in mind. Alternatively we could
just get rid of it completely and simplify the code at the cost
of always doing the kmalloc (as we do in the current version).

Fixes: 920d2b5ef2 ("drm/nouveau/mmu: define user interfaces to mmu vmm opertaions")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:19 +10:00
Dave Airlie 1fafef9dfe urgent i686 mmap fix for drm drivers
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Merge drm-fixes-for-v4.17-rc6-urgent into drm-next

Need to backmerge some nouveau fixes to reduce
the nouveau -next conflicts a lot.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-05-18 14:08:53 +10:00
Daniel Stone 5cb8b9969b drm/tegra: Use drm_gem_fb_destroy
Now that our destroy function is the same as the helper, use that
directly.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Daniel Stone c34a997d03 drm/tegra: Move fbdev unmap special case
User framebuffers are created with either bo->pages or bo->vaddr set,
depending on whether or not an IOMMU is present. On the other hand, the
framebuffer created for fbdev emulation has a vaddr mapping made if
bo->pages is set after creation. This is set up in fbdev probe.

Remove the special case unmapping from the general-purpose framebuffer
destroy, and move it to fbdev teardown.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Daniel Stone dbc33c7d65 drm/tegra: tegra_fb -> drm_framebuffer
Since tegra_fb is now the same as drm_framebuffer, we can just replace
the type completely.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Daniel Stone 0bc6af006f drm/tegra: Move GEM BOs to drm_framebuffer
Since drm_framebuffer can now store GEM objects directly, place them
there rather than in our own subclass. As this makes the framebuffer
create_handle function the same as the GEM framebuffer helper, we
can reuse that.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Daniel Stone e1189921b5 drm/tegra: Remove duplicate framebuffer num_planes
drm_framebuffer already stores num_planes for us.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Souptick Joarder cc7add70ca drm/tegra: Adding new typedef vm_fault_t
Use new return type vm_fault_t for fault handler. For now, this is just
documenting that the function returns a VM_FAULT value rather than an
errno. Once all instances are converted, vm_fault_t will become a
distinct type.

Reference id -> 1c8f422059 ("mm: change return type to vm_fault_t")

Previously vm_insert_page() returns err which driver mapped into
VM_FAULT_* type. The new function vmf_insert_page() will replace this
inefficiency by returning VM_FAULT_* type.

Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Thierry Reding f40e1590c5 gpu: host1x: Acquire a reference to the IOVA cache
The IOVA API uses a memory cache to allocate IOVA nodes from. To make
sure that this cache is available, obtain a reference to it and release
the reference when the cache is no longer needed.

On 64-bit ARM this is hidden by the fact that the DMA mapping API gets
that reference and never releases it. On 32-bit ARM, this is papered
over by the Tegra DRM driver (the sole user of the host1x API requiring
the cache) acquiring a reference to the IOVA cache for its own purposes.
However, there may be additional users of this API in the future, so fix
this upfront to avoid surprises.

Fixes: 404bfb78da ("gpu: host1x: Add IOMMU support")
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00
Thierry Reding 24cfdc1ac7 drm/tegra: Acquire a reference to the IOVA cache
The IOVA API uses a memory cache to allocate IOVA nodes from. To make
sure that this cache is available, obtain a reference to it and release
the reference when the cache is no longer needed.

On 64-bit ARM this is hidden by the fact that the DMA mapping API gets
that reference and never releases it. On 32-bit ARM, however, the DMA
mapping API doesn't do that, so allocation of IOVA nodes fails.

Fixes: ad92601521 ("drm/tegra: Add Tegra DRM allocation API")
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-17 17:44:48 +02:00