Commit Graph

4 Commits

Author SHA1 Message Date
Andy Shevchenko 067bd4fdfa dmaengine: dw: move PM to suspend_late / resume_early stages
There is no need to use *_noirq version of suspend and resume PM callbacks. The
suspend_late / resume_early suit better (it was discussed in [1]) and in future
could be used for runtime PM support.

[1] http://www.spinics.net/lists/kernel/msg1650974.html

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07 11:44:06 +05:30
Russell King 24353b8bb4 DMA-API: dma: dw_dmac.c: convert to use dma_coerce_mask_and_coherent()
This code sequence:
	if (!pdev->dev.dma_mask) {
		pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
	}
bypasses the architectures check on the DMA mask.  It can be replaced
with dma_coerce_mask_and_coherent(), avoiding the direct initialization
of this mask.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-31 14:48:51 +00:00
Andy Shevchenko be480dcbb5 dma: dw: append MODULE_DEVICE_TABLE for ACPI case
In rare cases (mostly for the testing purposes) the dw_dmac driver might be
compiled as a module as well as the other LPSS device drivers (I2C, SPI,
HSUART). When udev handles the event of the devices appearing the dw_dmac
module is missing. This patch will fix that.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-05 09:32:26 +05:30
Andy Shevchenko 9cade1a46c dma: dw: split driver to library part and platform code
To simplify the driver development let's split driver to library and platform
code parts. It helps us to add PCI driver in future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[Fixed compile error and few checkpatch issues]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:44 +05:30