"make dtbs_check":
arch/mips/boot/dts/mscc/jaguar2_pcb110.dtb: pca9545@70: $nodename:0: 'pca9545@70' does not match '^(i2c-?)?mux'
From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
arch/mips/boot/dts/mscc/jaguar2_pcb110.dtb: pca9545@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3' were unexpected)
From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
...
Fix this by renaming PCA9545 nodes to "i2c-mux", to match the I2C bus
multiplexer/switch DT bindings and the Generic Names Recommendation in
the Devicetree Specification.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The ocelot driver was converted to phylink, and that expects a valid
phy_interface_t. Without a phy-mode, of_get_phy_mode returns
PHY_INTERFACE_MODE_NA, which is not ideal because phylink rejects that.
The ocelot driver was patched to treat PHY_INTERFACE_MODE_NA as
PHY_INTERFACE_MODE_INTERNAL to work with the broken DT blobs, but we
should fix the device trees and specify the phy-mode too.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The ocelot switch driver used to ignore ports which do not have a
phy-handle property and not probe those, but this is not quite ok since
it is valid to not have a phy-handle property if there is a fixed-link.
It seems that checking for a phy-handle was a proxy for the proper check
which is for the status, but that doesn't make a lot of sense, since the
ocelot driver already iterates using for_each_available_child_of_node
which skips the disabled ports, so I have no idea.
Anyway, a widespread pattern in device trees is for a SoC dtsi to
disable by default all hardware, and let board dts files enable what is
used. So let's do that and enable only the ports with a phy-handle in
the pcb120 and pcb123 device tree files.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device trees and FIT image support for the Microsemi Serval SoC
which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device trees and FIT image support for the Microsemi Jaguar2 SoC
which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device tree for the Microsemi Luton PCB091 evaluation board.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device tree include file for the Microsemi Luton SoC which
belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Ocelot belongs to a family of SoC named the VCore III. In order to add
these new Soc, use the new symbol SOC_VCOREIII instead of a one
dedicated to Ocelot.
In order to avoid regression on driver building, the MSCC_OCELOT
configuration symbol is kept until the driver will be converted.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
As a preparation step for the offloading to ES0, let's create the
infrastructure for talking with this hardware block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
As a preparation step for the offloading to IS1, let's create the
infrastructure for talking with this hardware block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is an add-on patch to the main SoC Sparx5 series
(Message-ID: <20200513125532.24585-1-lars.povlsen@microchip.com>).
This changes the miim pinctrl function name from "miim1" to "miim" due
to refactoring in the driver, obsoleting the instance number.
The change in the driver was to better fit new platforms, as the
instance number is redundant information. Specifically, support for
the Microchip Sparx5 SoC is being submitted, where this change became
necessary.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add ACL support using the TCAM. Using ACL it is possible to create rules
in hardware to filter/redirect frames.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- kexec support for the generic MIPS platform when running on a CPU
including the MIPS Coherence Manager & related hardware.
- Improvements to the definition of memory barriers used around MMIO
accesses, and fixes in their use.
- Switch to CONFIG_NO_BOOTMEM from Mike Rapoport, finally dropping
reliance on the old bootmem code.
- A number of fixes & improvements for Loongson 3 systems.
- DT & config updates for the Microsemi Ocelot platform.
- Workaround to enable USB power on the Netgear WNDR3400v3.
- Various cleanups & fixes.
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Merge tag 'mips_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
- kexec support for the generic MIPS platform when running on a CPU
including the MIPS Coherence Manager & related hardware.
- Improvements to the definition of memory barriers used around MMIO
accesses, and fixes in their use.
- Switch to CONFIG_NO_BOOTMEM from Mike Rapoport, finally dropping
reliance on the old bootmem code.
- A number of fixes & improvements for Loongson 3 systems.
- DT & config updates for the Microsemi Ocelot platform.
- Workaround to enable USB power on the Netgear WNDR3400v3.
- Various cleanups & fixes.
* tag 'mips_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (51 commits)
MIPS: Cleanup DSP ASE detection
MIPS: dts: Change upper case to lower case
MIPS: generic: Add Network, SPI and I2C to ocelot_defconfig
MIPS: Loongson-3: Fix BRIDGE irq delivery problem
MIPS: Loongson-3: Fix CPU UART irq delivery problem
MIPS: Remove unused PREF, PREFE & PREFX macros
MIPS: lib: Use kernel_pref & user_pref in memcpy()
MIPS: Remove unused CAT macro
MIPS: Add kernel_pref & user_pref helpers
MIPS: Remove unused TTABLE macro
MIPS: Remove unused PIC macros
MIPS: Remove unused MOVN & MOVZ macros
MIPS: Provide actually relaxed MMIO accessors
MIPS: Enforce strong ordering for MMIO accessors
MIPS: Correct `mmiowb' barrier for `wbflush' platforms
MIPS: Define MMIO ordering barriers
MIPS: mscc: add PCB120 to the ocelot fitImage
MIPS: mscc: add DT for Ocelot PCB120
MIPS: memset: Limit excessive `noreorder' assembly mode use
MIPS: memset: Fix CPU_DADDI_WORKAROUNDS `small_fixup' regression
...
The Microsemi Ocelot has a set of register for SerDes/switch port muxing
as well as PCIe muxing for a specific SerDes, so let's add the device
and all SerDes in the Device Tree.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
HSIO contains registers for PLL5 configuration, SerDes/switch port
muxing and a thermal sensor, hence we can't keep it in the switch DT
node.
Acked-by: Paul Burton <paul.burton@mips.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Enable the i2c controller on ocelot PCB123. While there are no i2c devices
on the board itself, it can be used to control the SFP transceivers.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20352/
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: linux-i2c@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Allan Nielsen <allan.nielsen@microchip.com>
Ocelot has an i2c controller, add it. There is only one possible pinmux
configuration so add it as well.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20353/
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: linux-i2c@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Allan Nielsen <allan.nielsen@microchip.com>
Ocelot now has a u-boot port, allow building FIT images instead of relying
on the legacy detection and builtin DTB.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19632/
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Add phy to switch port connections for PCB123 for internal PHYs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Signed-off-by: James Hogan <jhogan@kernel.org>
Ocelot has an integrated switch, add support for it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Signed-off-by: James Hogan <jhogan@kernel.org>
arch/mips/boot/dts/Makefile collects objects from sub-directories into
built-in.a only when CONFIG_BUILTIN_DTB is enabled. Reflect it also to
the sub-directory Makefiles. This suppresses unneeded built-in.a
creation in arch/mips/boot/dts/*/ directories.
While I am here, I replaced $(patsubst %.dtb, %.dtb.o, $(dtb-y)) with
$(addsuffix .o, $(dtb-y)) to simplify the code a little bit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Mathieu Malaterre <malat@debian.org>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/19099/
Signed-off-by: James Hogan <jhogan@kernel.org>
Add a device tree include file for the Microsemi Ocelot SoC.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Allan Nielsen <Allan.Nielsen@microsemi.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/18855/
Signed-off-by: James Hogan <jhogan@kernel.org>
Geert Uytterhoeven