Commit Graph

50686 Commits

Author SHA1 Message Date
Ben Skeggs 970a5ee41c drm/nouveau/kms/nv50-: also flush fb writes when rewinding push buffer
Should hopefully fix a regression some people have been seeing since EVO
push buffers were moved to VRAM by default on Pascal GPUs.

Fixes: d00ddd9da ("drm/nouveau/kms/nv50-: allocate push buffers in vidmem on pascal")
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: <stable@vger.kernel.org> # 4.19+
2018-12-12 16:58:43 +10:00
Nicholas Kazlauskas 922454c2e7 drm/amd/display: Fix duplicating scaling/underscan connector state
[Why]
These properties aren't being carried over when the atomic state.
This tricks atomic check and commit tail into performing underscan
and scaling operations when they aren't needed.

With the patch that forced scaling/RMX_ASPECT on by default this
results in many unnecessary surface updates and hangs under certain
conditions.

[How]
Duplicate the properties.

Fixes: 91b66c47ba ("drm/amd/display: Set RMX_ASPECT as default")

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11 15:52:36 -05:00
Nicholas Kazlauskas 65276f2beb drm/amd/display: Fix unintialized max_bpc state values
[Why]
If the "max bpc" isn't explicitly set in the atomic state then it
have a value of 0. This has the correct behavior of limiting a panel
to 8bpc in the case where the panel supports 8bpc. In the case of eDP
panels this isn't a true assumption - there are panels that can only
do 6bpc.

Banding occurs for these displays.

[How]
Initialize the max_bpc when the connector resets to 8bpc. Also carry
over the value when the state is duplicated.

Bugzilla: https://bugs.freedesktop.org/108825
Fixes: 307638884f72 ("drm/amd/display: Support amdgpu "max bpc" connector property")

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11 15:52:36 -05:00
Nicholas Kazlauskas 28c5946930 Revert "drm/amd/display: Set RMX_ASPECT as default"
This reverts commit 91b66c47ba.

Forcing RMX_ASPECT as default uses the preferred/native mode's timings
for any mode the user selects and scales the image. This provides a
a consistently nicer result in the case where the selected mode's
refresh rate matches the native mode's refresh but this isn't always
the case.

For example, if the monitor is 1080p@144Hz and the preferred mode is
60Hz then even if the user selects 1080p@144Hz as their selected mode
they'll get 1080p@60Hz.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11 15:43:24 -05:00
Kuehling, Felix 4f01b73e5a drm/amdgpu: Fix stub function name
This function was renamed in a previous commit. Update the stub
function name for builds with CONFIG_HSA_AMD disabled.

Fixes: 611736d844 ("drm/amdgpu: Add KFD VRAM limit checking")
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11 13:40:58 -05:00
Jayant Shekhar ba0ede185e drm/msm/dpu: Fix clock issue after bind failure
In case of msm drm bind failure, pm runtime put sync
is called from dsi driver which issues an asynchronous
put on mdss device. Subsequently when dpu_mdss_destroy
is triggered the change will make sure to put the mdss
device in suspend and clearing pending work if not
scheduled.

Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:19 -05:00
Jordan Crouse 7adc4a343f drm/msm/dpu: Clean up dpu_media_info.h static inline functions
Do some cleanup in the static inline functions defined in
dpu_media_info.h by cleaning up gotos and unneeded local
variables.

v3: Added spaces between operators per Seal Paul and Sam Ravnborg

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:19 -05:00
Jordan Crouse 3804a98241 drm/msm/dpu: Further cleanups for static inline functions
Remove more static inline functions that are lightly used and/or
very simple and easy to build into the calling functions.

v3: Fix a nit from Sean Paul
v2: Removed another unused function from dpu_hw_lm.c and add back
dpu_crtc_get_client_type() since there was a question regarding
its usefulness.

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:18 -05:00
Jordan Crouse 3d688410e6 drm/msm/dpu: Cleanup the debugfs functions
Do some debugfs cleanups from across the DPU driver. The DRM
destroy functions will do a recursive delete on the entire
debugfs node so there is no need to store dentry pointers for
the debugfs files that are persistent for the life of the
driver. This also means that the destroy functions can go
away too.

Also, use standard API functions where applicable instead of
using hand written code.

v3: No changes
v2: Add more code; most of the dpu debugfs files should be
addressed now.

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:18 -05:00
Jordan Crouse 8fe62a63a8 drm/msm/dpu: Remove dpu_irq and unused functions
dpu_irq.c does some unneeded checks and passes control
to dpu_core_irq.c  The simple functions can be defined
in the same file where we use them and the files and
their associated hangers on can be deleted.

Additionally the postinstall hook isn't used even
in dpu_core_irq.c so zap that entire path.

v3: No changes

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:18 -05:00
Jordan Crouse ab07e0c19f drm/msm: Make irq_postinstall optional
Allow the KMS operation 'irq_postinstall' to be optional
so that the target display drivers don't need to define
a dummy function if they don't need one.

v3: No changes

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:17 -05:00
Jordan Crouse 53edf46259 drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
Outside of superfluous parameter checks the dpu_hw_blk_init()
doesn't have any failure paths. Switch it over to be a void
function and we can remove error handling paths in all the functions
that call it. While we're in those functions remove unneeded
initialization for a static variable.

v3: No changes
v2: Removed a cleanup intended for a different patch

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:17 -05:00
Jordan Crouse fa79bcc3d1 drm/msm/dpu: Remove unused functions
Remove some unused container_of() helper functions.

v3: No changes
v2: Retained still used helper functions in the name of readability

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:17 -05:00
Jordan Crouse 49dfe76479 drm/msm/dpu: Remove dpu_crtc_is_enabled()
The static inline function dpu_crtc_enabled() is only called once
and the function that calls it in turn is only called once and
the return value can be easily checked in the calling functions
so collapse everything down.

v3: No changes

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:16 -05:00
Jordan Crouse 35d600dd92 drm/msm/dpu: Remove dpu_crtc_get_mixer_height
dpu_crtc_get_mixer_height() is only used once and the value it
returns can be easily derived from the calling function.

v3: No changes

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:16 -05:00
Jordan Crouse 27bc773aa6 drm/msm/dpu: Remove dpu_dbg
The functions in dpu_dbg.c aren't used. The two main dump functions
fail after a lookup from dpu_dbg_base.reg_base_list which turns out
to never be populated and once those are removed the rest of the
file doesn't make any sense.

v3: No changes
v2: Moved some unrelated changes to another patch

Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:16 -05:00
Sean Paul f9e81b8da3 drm/msm: dpu: Remove crtc_lock
Each time it's called we're holding the crtc modeset lock, so it's
redundant.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:15 -05:00
Sean Paul 3e46c5df66 drm/msm: dpu: Remove vblank_requested flag from dpu_crtc
It's just for debugfs output, we don't need it

Changes in v2:
- None

Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:15 -05:00
Sean Paul a796ba2cb3 drm/msm: dpu: Separate crtc assignment from vblank enable
Instead of assigning/clearing the crtc on vblank enable/disable, we can
just assign and clear the crtc on modeset. That allows us to just toggle
the encoder's vblank interrupts on vblank_enable.

So why is this important? Previously the driver was using the legacy
pointers to assign/clear the crtc. Legacy pointers are cleared _after_
disabling the hardware, so the legacy pointer was valid during
vblank_disable, but that's not something we should rely on.

Instead of relying on the core ordering the legacy pointer assignments
just so, we'll assign the crtc in dpu_crtc enable/disable. This is the
only place that mapping can change, so we're covered there.

We're also taking advantage of drm_crtc_vblank_on/off. By using this, we
ensure that vblank_enable/disable can never be called while the crtc is
off (which means the assigned crtc will always be valid). As such, we
don't need to use modeset locks or the crtc_lock in the
vblank_enable/disable routine to be sure state is consistent.

...I think.

Changes in v2:
- Changed crtc check in toggle_vblank to != (Jeykumar)

Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[dpu_crtc.c change needed to be manually applied b/c of the dpu_crtc_reset change]

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:15 -05:00
Sean Paul 5c6277c1d2 drm/msm: dpu: Don't bother checking ->enabled in dpu_crtc_vblank
The drm_crtc_vblank_on/off calls in enable/disable guarantee that we
won't call this function when crtc is not enabled.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:14 -05:00
Sean Paul f7aafc8d53 drm/msm: dpu: Use atomic_disable for dpu_crtc_disable
Matches dpu_crtc_enable and we'll need the old state in a future patch

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:14 -05:00
Sean Paul e4914867ac drm/msm: dpu: Remove vblank_callback from encoder
The indirection of registering a callback and opaque pointer isn't reall
useful when there's only one callsite. So instead of having the
vblank_cb registration, just give encoder a crtc and let it directly
call the vblank handler.

In a later patch, we'll make use of this further.

Changes in v2:
- None

Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:14 -05:00
Sean Paul a9d629d71d drm/msm: dpu: Remove crtc_lock from setup_mixers
I think the intention here was to protect the enc->crtc access, but
that's insufficient to avoid enc->crtc changing. Fortunately we're
already holding the modeset lock when this is called (from
atomic_check), so remove the crtc_lock and add a modeset lock check.

While we're at it, use the encoder mask from crtc state instead of
legacy pointer.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:13 -05:00
Sean Paul b77d0f0d4e drm/msm: dpu: Move pm_runtime_(get|put) from vblank_enable
There are 4 times that _dpu_crtc_vblank_enable_no_lock() is called:

1- crtc enable
2- crtc disable
3- crtc vblank enable
4- crtc vblank disable

When we enable or disable the crtc, we call drm_crtc_vblank_on and
drm_crtc_vblank_off respectively. That will gate vblank enables and
disables to only being called when the crtc is active. That means that
we can just enable/disable pm runtime in crtc enable/disable. This will
be beneficial in trying to eliminate blocking calls from the vblank call
chain.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:13 -05:00
Sean Paul 1dfdb0e107 drm/msm: dpu: Add modeset lock checks where applicable
Add modeset lock checks to functions that could be called outside the
core atomic stack.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:13 -05:00
Sean Paul 4b8c627959 drm/msm: dpu: Stop using encoder->crtc pointer
It's for legacy drivers, for atomic drivers crtc->state->encoder_mask
should be used to map encoder to crtc.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[seanpaul resolved conflict with async param of dpu_encoder_kickoff]

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:12 -05:00
Sean Paul f449aa6e44 drm/msm: dpu: Grab the modeset locks in frame_event
This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
since it digs into the state objects.

Changes in v2:
- None
Changes in v3:
- Use those nifty new DRM_MODESET_LOCK_ALL_* helpers (Daniel)

Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:12 -05:00
Sean Paul b01c239922 drm/msm: dpu: Don't drop locks in crtc_vblank_enable
Now that runtime resume is handled in encoder, we don't need to worry
about crtc_lock recursion when calling pm_runtime_(get|put). So drop the
lock drops in _dpu_crtc_vblank_enable_no_lock().

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:12 -05:00
Sean Paul 18a63b3c6f drm/msm: dpu: Move crtc runtime resume to encoder
The crtc runtime resume doesn't actually operate on the crtc, but rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be called while holding the modeset locks (although
it sometimes is), this presents a race condition.

Now that we have ->enabled on the virtual encoders, and a lock to
protect it, just call resume on each encoder and only restore the ones
that are enabled.

Changes in v2:
- None

Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:11 -05:00
Sean Paul fba7427eb5 drm/msm: dpu: Add ->enabled to dpu_encoder_virt
Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.

Changes in v2:
- None

Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:11 -05:00
Sean Paul 585b3f9472 drm/msm: dpu: Fix typo in dpu_encoder
enc_spinlock instead of enc_spin_lock.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:11 -05:00
Sean Paul 09a2e645b0 drm/msm: dpu: Remove dpu_power_handle
Now that we don't have any event handlers, remove dpu_power_handle!

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:10 -05:00
Sean Paul aeb7b49a1b drm/msm: dpu: Move DPU_POWER_HANDLE_DBUS_ID to core_perf
It's only used in core_perf, so stick it there (and change the name to
reflect that).

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:10 -05:00
Sean Paul d53a61e1c0 drm/msm: dpu: Include dpu_io_util.h directly in dpu_kms.h
It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:10 -05:00
Sean Paul b2bb51e835 drm/msm: dpu: Remove power_handle from core_perf
It's unused

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:09 -05:00
Sean Paul 3cf63cd5f8 drm/msm: dpu: Handle crtc pm_runtime_resume() directly
Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:09 -05:00
Sean Paul c24b633003 drm/msm: dpu: Don't use power_event for vbif_init_memtypes
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.

Changes in v2:
- Removed obsolete comment (Jeykumar)

Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:08 -05:00
Sean Paul 88447b9b58 drm/msm: dpu: Remove dpu_power_client
There's only one client -- core, and it's only used for runtime pm which
is already refcounted.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:08 -05:00
Sean Paul d05994dfa9 drm/msm: dpu: Remove unused trace_dpu_perf_update_bus()
Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:10:08 -05:00
Sean Paul 5e1228d7fd drm/msm: dpu: Remove dpu_power_handle_get_dbus_name()
It's only used for debugfs, so just output the enum value instead.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:09:10 -05:00
Sean Paul ff5952a72c drm/msm: dpu: Allocate proper amount for dpu_crtc_state
Since dpu_crtc subclasses crtc_state, we need a custom .reset hook in
order to allocate the right amount of memory to accommodate the
additional struct members in dpu_crtc_state. So bring it [partially]
back.

Relevant KASAN splat:
[   10.333382] ==================================================================
[   10.344288] BUG: KASAN: slab-out-of-bounds in kmemdup+0x50/0x80
[   10.350390] Read of size 736 at addr ffffffc0d9f06080 by task frecon/394

[   10.358861] CPU: 6 PID: 394 Comm: frecon Tainted: G        W         4.19.4 #121
[   10.366476] Hardware name: Google Cheza (rev2) (DT)
[   10.371514] Call trace:
[   10.374087]  dump_backtrace+0x0/0x194
[   10.377878]  show_stack+0x20/0x28
[   10.381330]  dump_stack+0xa0/0xc8
[   10.384783]  print_address_description+0x78/0x2e0
[   10.389639]  kasan_report+0x290/0x2d0
[   10.393428]  check_memory_region+0x20/0x14c
[   10.397740]  __asan_loadN+0x14/0x1c
[   10.401345]  kmemdup+0x50/0x80
[   10.404524]  dpu_crtc_duplicate_state+0x58/0xa0
[   10.409228]  drm_atomic_get_crtc_state+0xac/0x178
[   10.414095]  __drm_atomic_helper_set_config+0x54/0x4a4
[   10.419393]  drm_atomic_helper_set_config+0x60/0xb4
[   10.424435]  drm_mode_setcrtc+0x720/0x760
[   10.428570]  drm_ioctl_kernel+0xd8/0x13c
[   10.432617]  drm_ioctl+0x380/0x4f4
[   10.436150]  drm_compat_ioctl+0x54/0x13c
[   10.440219]  __arm64_compat_sys_ioctl+0x1d8/0xef4
[   10.445086]  el0_svc_common+0xd8/0x138
[   10.448961]  el0_svc_compat_handler+0x58/0x68
[   10.453463]  el0_svc_compat+0x8/0x18

[   10.458712] Allocated by task 56:
[   10.462148]  kasan_kmalloc.part.4+0x48/0xf4
[   10.466465]  kasan_kmalloc+0x8c/0xa0
[   10.470165]  kmem_cache_alloc_trace+0x25c/0x27c
[   10.474848]  drm_atomic_helper_crtc_reset+0x68/0x98
[   10.479877]  drm_mode_config_reset+0xc4/0x19c
[   10.484383]  msm_drm_bind+0x814/0x8dc
[   10.488169]  try_to_bring_up_master.part.7+0x48/0xac
[   10.493282]  component_master_add_with_match+0x158/0x198
[   10.498758]  msm_pdev_probe+0x328/0x348
[   10.502736]  platform_drv_probe+0x74/0xc8
[   10.506877]  really_probe+0x1ac/0x35c
[   10.510659]  driver_probe_device+0xd4/0x118
[   10.514975]  __device_attach_driver+0xc8/0xf4
[   10.519477]  bus_for_each_drv+0xb4/0xe4
[   10.523439]  __device_attach+0xd0/0x158
[   10.527394]  device_initial_probe+0x24/0x30
[   10.531715]  bus_probe_device+0x50/0xe4
[   10.535681]  deferred_probe_work_func+0xac/0xdc
[   10.540376]  process_one_work+0x3f0/0x6d4
[   10.544521]  worker_thread+0x3f4/0x520
[   10.548399]  kthread+0x1b4/0x1c8
[   10.551740]  ret_from_fork+0x10/0x18

[   10.556986] Freed by task 0:
[   10.559967] (stack is not available)

[   10.565216] The buggy address belongs to the object at ffffffc0d9f06080
                which belongs to the cache kmalloc-1024 of size 1024
[   10.578268] The buggy address is located 0 bytes inside of
                1024-byte region [ffffffc0d9f06080, ffffffc0d9f06480)
[   10.590248] The buggy address belongs to the page:
[   10.595195] page:ffffffbf0367c000 count:1 mapcount:0 mapping:ffffffc0de40f680 index:0x0 compound_mapcount: 0
[   10.605321] flags: 0x4000000000008100(slab|head)
[   10.610100] raw: 4000000000008100 ffffffbf0369fa08 ffffffbf0367f008 ffffffc0de40f680
[   10.618077] raw: 0000000000000000 0000000000150015 00000001ffffffff 0000000000000000
[   10.626049] page dumped because: kasan: bad access detected

[   10.633341] Memory state around the buggy address:
[   10.638282]  ffffffc0d9f06180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[   10.645710]  ffffffc0d9f06200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[   10.653139] >ffffffc0d9f06280: 00 00 00 00 00 00 00 fc fc fc fc fc fc fc fc fc
[   10.660571]                                         ^
[   10.665774]  ffffffc0d9f06300: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
[   10.673210]  ffffffc0d9f06380: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
[   10.680639] ==================================================================

Fixes: a6ba45afda41 (drm/msm/dpu: Replace dpu_crtc_reset by atomic helper)
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Bruce Wang <bzwang@chromium.org>
Cc: Rob Clark <robdclark@gmail.com>
Reviewed-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:11 -05:00
Jonathan Marek e6f6d63ed1 drm/msm: add headless gpu device for imx5
This patch allows using drm/msm without qcom display hardware. It adds a
amd,imageon compatible, which is used instead of qcom,adreno, but does
not require a top level msm node.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:11 -05:00
Jonathan Marek f72f4f1ae4 drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment
This allows controlling which of the 8 lanes are used for 6 bit color.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:10 -05:00
Jonathan Marek c2052a4e5c drm/msm: implement a2xx mmu
A2XX has its own very simple MMU.

Added a msm_use_mmu() function because we can't rely on iommu_present to
decide to use MMU or not.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:10 -05:00
Douglas Anderson d1d9d0e172 drm/msm: Only add available components
When trying to get the display up on my sdm845 board I noticed that
the display wouldn't probe if I had the dsi1 node marked as "disabled"
even though my board doesn't use dsi1.  It looks like the msm code
adds all nodes to its list of components even if they are disabled.  I
believe this doesn't work because all registered components need to
come up before we finish probing.  Let's do like other DRM code and
only add available components.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:09 -05:00
Jordan Crouse e400b9edb0 drm/msm/a6xx: Add a name for the crashdumper buffer
Add a buffer object name for the a6xx crashdumper so it can be
seen with the changes introduced by 7799a98edd
("drm/msm: Add a name field for gem objects").

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:09 -05:00
Jordan Crouse d135c7ebb7 drm/msm/a6xx: Use new kernel API free function for gpu state
dadb36b7ec42 ("drm/msm: Add a common function to free kernel buffer objects")
missed freeing the crashdumper state for a6xx.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:09 -05:00
Sean Paul 50bcc689b1 drm/msm: dpu: Make legacy cursor updates asynchronous
This patch sprinkles a few async/legacy_cursor_update checks
through commit to ensure that cursor updates aren't blocked on vsync.
There are 2 main components to this, the first is that we don't want to
wait_for_commit_done in msm_atomic  before returning from atomic_complete.
The second is that in dpu we don't want to wait for frame_done events when
updating the cursor.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:08 -05:00
Sean Paul 5f79e03b1f drm/msm: dpu: Only check flush register against pending flushes
There exists a case where a flush of a plane/dma may have been triggered
& started from an async commit. If that plane/dma is subsequently disabled
by the next commit, the flush register will continue to hold the flush
bit for the disabled plane. Since the bit remains active,
pending_kickoff_cnt will never decrement and we'll miss frame_done
events.

This patch limits the check of flush_register to include only those bits
which have been updated with the latest commit.

Changes in v2:
- None

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:08 -05:00
Jayant Shekhar d4e98855d1 drm/msm/dpu: Correct dpu destroy and disable order
In case of msm drm bind failure, dpu_mdss_destroy is triggered.
In this function, resources are freed and pm runtime disable is
called, which triggers dpu_mdss_disable. Now in dpu_mdss_disable,
driver tries to access a memory which is already freed. This
results in kernel panic. Fix this by ensuring proper sequence
of dpu destroy and disable calls.

Changes in v2:
   - Removed double spacings [Jeykumar]

Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:08 -05:00
Abhinav Kumar c1866d44d1 drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driver
Fix the dsi clock names in the DSI 10nm PLL driver to
match the names in the dispcc driver as those are
according to the clock plan of the chipset.

Changes in v2:
- Update the clock diagram with the new clock name

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:07 -05:00
Jonathan Marek b2ccfdf1dd drm/msm: set priv->kms to NULL before uninit
otherwise, priv->kms is non-NULL and msm_drm_uninit will cause a panic.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:07 -05:00
Jonathan Marek a5cd7b55df drm/msm/mdp5: add config for msm8917
Add the mdp5_cfg_hw entry for MDP5 version v1.15 found on msm8917.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:07 -05:00
Jonathan Marek 21af872cd8 drm/msm/adreno: add a2xx
derived from the a3xx driver and tested on the following hardware:
imx51-zii-rdu1 (a200 with 128kb gmem)
imx53-qsrb (a200)
msm8060-tenderloin (a220)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:06 -05:00
Jonathan Marek 86f46f25d8 drm/msm: use contiguous vram for MSM_BO_SCANOUT when possible
Makes it possible to have MMU for GPU but not display.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:06 -05:00
Jonathan Marek 373931d2d7 drm/msm/mdp4: allocate blank_cursor_no with MSM_BO_SCANOUT flag
For allocation in contiguous memory when the GPU has MMU but not mdp4.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:06 -05:00
Jonathan Marek eb2b47bb9a drm/msm/mdp4: only use lut_clk on mdp4.2+
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:05 -05:00
Rob Clark 1fed8df301 drm/msm: bump UAPI version
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:05 -05:00
Rob Clark f05c83e774 drm/msm: add uapi to get/set debug name
Add UAPI to get/set GEM objects' debug name.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:05 -05:00
Rob Clark 789d2e5a77 drm/msm: rework GEM_INFO ioctl
Prep work to add a way to get/set the GEM objects debug name.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:04 -05:00
Rob Clark 7a93d5c38e drm/msm/gpu: add submit flag to hint which buffers should be dumped
To lower CPU  overhead, future userspace will be switching to pinning
iova and avoiding the use of relocs, and only include cmds table entries
for IB1 level cmdstream (but not IB2 or state-groups).

This leaves the kernel unsure what to dump for rd/hangrd cmdstream
dumping.  So add a MSM_SUBMIT_BO_DUMP flag so userspace can indicate
buffers that contain cmdstream (or are otherwise important to dump).

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:04 -05:00
Sharat Masetty 1df4289d5b drm/msm: Optimize adreno_show_object()
When the userspace tries to read the crashstate dump, the read side
implementation in the driver currently ascii85 encodes all the binary
buffers and it does this each time the read system call is called.
A userspace tool like cat typically does a page by page read and the
number of read calls depends on the size of the data captured by the
driver. This is certainly not desirable and does not scale well with
large captures.

This patch encodes the buffer only once in the read path. With this there
is an immediate >10X speed improvement in crashstate save time.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:03 -05:00
Jordan Crouse 84c6127580 drm/msm/gpu: Map the ringbuffer in the iova at create time
For reasons that I'm sure made perfect sense at the time we were
opting to defer the iova alloc / pin on the ringbuffer until HW
init time so when we moved to iova reference counting we ended
up adding a reference count every time the hardware started.
Not that it mattered (because the ring is always around) but
it did make the debug output look odd. Allocate and pin the iova
at create time instead.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:07:03 -05:00
Jordan Crouse 0815d7749a drm/msm: Add a name field for gem objects
For debugging purposes it is useful to assign descriptions
to buffers so that we know what they are used for. Add
a field to the buffer object and use that to name the various
kernel side allocations which ends up looking like like this
in /d/dri/X/gem:

   flags       id ref  offset   kaddr            size     madv      name
   00040000: I  0 ( 1) 00000000 0000000070b79eca 00004096           memptrs
      vmas: [gpu: 01000000,mapped,inuse=1]
   00020000: I  0 ( 1) 00000000 0000000031ed4074 00032768           ring0

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:06:59 -05:00
Jordan Crouse 7ad0e8cf63 drm/msm: Count how many times iova memory is pinned
Add a reference count to track how many times a particular
chunk of iova memory is pinned (mapped) in the iomu and
add msm_gem_unpin_iova to give up references.

It is important to note that msm_gem_unpin_iova replaces
msm_gem_put_iova because the new implicit behavior
that an assigned iova in a given vma is now valid for the
life of the buffer and what we are really focusing on is
the use of that iova.

For now the unmappings are lazy; once the reference counts
go to zero they *COULD* be unmapped dynamically but that
will require an outside force such as a shrinker or
mm_notifiers.  For now, we're just focusing on getting
the counting right and setting ourselves up to be ready
for the future.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:32 -05:00
Jordan Crouse 9fe041f6fd drm/msm: Add msm_gem_get_and_pin_iova()
Add a new function to get and pin the iova memory in one
step (basically renaming the old msm_gem_get_iova function)
and switch msm_gem_get_iova() to only allocate an iova but
not map it in the IOMMU. This is only currently used by
msm_ioctl_gem_info() since all other users of of the iova
expect that the memory be immediately available.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:32 -05:00
Jordan Crouse 575f048550 drm/msm: Clean up and enhance the output of the 'gem' debugfs node
Add headers for the 'gem' debugfs file to make it easier to remember
what all the values mean and move the list of virtual address regions
to the next line and add the name and map status to make it clearer
what we are looking at.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:31 -05:00
Jordan Crouse c0ee979469 drm/msm: Split msm_gem_get_iova into two steps
Split the operation of msm_gem_get_iova into two operations:
1) allocate an iova and 2) map (pin) the backing memory int the
iommu. This is the first step toward allowing memory pinning
to occur independently of the iova management.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:31 -05:00
Jordan Crouse 70dc51b447 drm/msm: Remove sgt from the mmu unmap function
The scatter gather table doesn't need to be passed in for the
MMU unmap function.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:31 -05:00
Jordan Crouse 1e29dff004 drm/msm: Add a common function to free kernel buffer objects
Buffer objects allocated with msm_gem_kernel_new() are mostly
freed the same way so we can save a few lines of code with a
common function.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:30 -05:00
Jordan Crouse d6852b4b2d drm/msm/a6xx: Track and manage a6xx state memory
The a6xx GPU state allocates a LOT of memory. Add a bit of
infrastructure to track the memory allocations in the GPU structure
and delete them when the state is destroyed much the same way
that devm works with the device model as a whole.  This protects
against the developer accidentally forgetting to add a kfree() to
an ever growing list.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:30 -05:00
Jordan Crouse 1707add815 drm/msm/a6xx: Add a6xx gpu state
Add support for gathering and dumping the a6xx GPU state including
registers, GMU registers, indexed registers, shader blocks,
context clusters and debugbus.

v2: Fix bugs discovered by Sharat Masetty

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:30 -05:00
Jordan Crouse b9fc230252 drm/msm/adreno: Don't capture register values if target doesn't define them
If the GPU target doesn't define a list of registers then gracefully skip
capturing and/or printing them. This is used by more complex targets like
6xx that have other means of capturing register values.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:29 -05:00
Jordan Crouse 983674e24b drm/msm/gpu: Move gpu_poll_timeout() to adreno_gpu.h
The gpu_poll_timeout() function can be useful to multiple targets so
mvoe it into adreno_gpu.h from the a5xx code.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:29 -05:00
Jordan Crouse 896a248a90 drm/msm/gpu: Only store local command buffers in the GPU state
Instead of trying to store all the tagged buffers from a hanging
submit only store the command buffers that were not imported.
This cuts down on the amount of data stored in the GPU state to
the base minimum of useful information.

The downside is that this will make it more difficult to
successfully replay a hang with just the GPU state but there
isn't any reason why that functionality can't be added back
in later once we've figured out how to better communicate
such massive amounts of data.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:29 -05:00
Jordan Crouse 4241db42e4 drm/msm/gpu: Add trace events for tracking GPU submissions
Add trace events to track the progress of a GPU submission
msm_gpu_submit occurs at the beginning of the submissions,
msm_gpu_submit_flush happens when the submission is put on
the ringbuffer and msm_submit_flush_retired is sent when
the operation is retired.

To make it easier to track the operations a unique sequence
number is assigned to each submission and displayed in each
event output so a human or a script can easily associate
the events related to a specific submission.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:28 -05:00
Jordan Crouse 568692102b drm/msm/gpu: Add per-submission statistics
Add infrastructure to track statistics for GPU submissions
by sampling certain perfcounters before and after a submission.

To store the statistics, the per-ring memptrs region is
expanded to include room for up to 64 entries - this should
cover a reasonable amount of inflight submissions without
worrying about losing data. The target specific code inserts
PM4 commands to sample the counters before and after
submission and store them in the data region. The CPU can
access the data after the submission retires to make sense
of the statistics and communicate them to the user.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:28 -05:00
Jordan Crouse 93f7abf19d drm/msm: Gracefully handle failure in _msm_gem_kernel_new
If any of the function calls in _msm_gem_kernel_new fail we need
to make sure to dereference the GEM object with the appropriate
function for the current locking state.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:28 -05:00
Jordan Crouse 546ec7b471 drm/msm/gpu: Allocate the correct size for the GPU memptrs
Allocate the correct buffer size for the GPU memptrs. The incorrect
size hasn't affected us thus far since the incorrect size was larger
than the intended size and we're still stuck on page sized
granularity anyway but technically correct is the best kind of
correct.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:27 -05:00
Rob Clark ccdf7e28b4 drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:27 -05:00
Jeykumar Sankaran 01665c64b4 drm/msm/dpu: set geometry for iommu domain
Specify geometry for DPU iommu domain which sets
the address space for gem allocations.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Suggested-by: Jordan Crouse <jcrouse@codeaurora.org>
Suggested-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Acked-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:27 -05:00
Mamta Shukla 6a41da17e8 drm: msm: Use DRM_DEV_* instead of dev_*
Use DRM_DEV_INFO/ERROR/WARN instead of dev_info/err/debug to generate
drm-formatted specific log messages so that it will be easy to
differentiate in case of multiple instances of driver.

Signed-off-by: Mamta Shukla <mamtashukla555@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 13:05:22 -05:00
Sean Paul 84511abc47 drm/msm: dpu: Remove checks from dpu_plane_destroy_state()
They're not needed.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:30 -05:00
Sean Paul aa4df9bf28 drm/msm: dpu: Clean up _dpu_core_video_mode_intf_connected()
Local variable is not needed and condition can't be hit.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:30 -05:00
Sean Paul 0841851f3b drm/msm: dpu: Remove empty/useless labels
I noticed an empty label while driving by and decided to use
coccinelle to see if there were any more. Here's the spatch and the
invocation:
---

@@
identifier lbl;
expression E;
@@

- goto lbl;
+ return E;
...
- lbl:
        return E;

@@
identifier lbl;
@@

- goto lbl;
+ return;
...
- lbl:
-       return;

---
spatch --allow-inconsistent-paths --sp-file file.spatch --dir
drivers/gpu/drm/msm/disp/dpu1 --in-place
---

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:29 -05:00
Sean Paul 58fba464ea drm/msm: dpu: Remove 'inline' from several functions
Per chapter 15 of coding-style, removing 'inline' keyword from functions
that are larger than a typical macro. In a couple of cases I've
simplified the function and kept the inline.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:29 -05:00
Sean Paul bf711751c8 drm/msm: dpu: Remove _dpu_encoder_power_enable()
It's unused, remove it.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:29 -05:00
Sean Paul 37686b5ec4 drm/msm: dpu: Remove unused functions from msm_media_info.h
These functions aren't used anywhere, remove them.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:28 -05:00
Sean Paul 01b09d53ad drm/msm: Remove dpu_encoder_phys_ops->hw_reset()
We call out of the virt encoder into phys only to call back into the
virt for hw reset. So remove the indirection and just call the virt
function directly.

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:28 -05:00
Bruce Wang 9a5e3fce4b drm/msm/dpu: Replace dpu_crtc_reset by atomic helper
Since we removed all suspend logic from the crtc code (see patch 3/4),
dpu_crtc_reset does the same things as drm_atomic_helper_crtc_reset, so let's
just replace it with a call to the atomic helper.

v3: added patch to patchset

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:28 -05:00
Bruce Wang 7a007a121d drm/msm/dpu: Remove suspend state tracking from crtc
Since drm core's modeset locks serialize atomic commits, we don't need to
track whether or not we're in a suspended state from inside the crtc for
dpu_crtc_enable/disable. This patch removes the suspend logic from the crtc and
removes the relevant tracing from dpu_trace. Since we removed all calls
to dpu_kms_is_suspend_state, we can remove that function and the
suspend_state field of dpu_kms as well.

v2: added patch to patchset
v3: reworded commit body and moved deletion of dpu_kms_is_suspend_state and
suspend_state to this patch

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:27 -05:00
Bruce Wang 3750e78c72 drm/msm: Cut dpu_kms hooks from msm_pm_suspend/resume
Removes the traces of the non-atomic helper calls in
msm_pm_suspend/resume since we just deleted those functions (see patch
1). Also removes the drm_kms_helper_poll_disable/enable calls, since
the DRM_CONNECTOR_POLL_CONNECT flag is never set so periodic polling
doesn't happen anyways.

v2: reorganized patch order
v3: made error checks less severe

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:27 -05:00
Bruce Wang b2b83523b1 drm/msm/dpu: Remove dpu_kms_pm_suspend/resume
PM resume was crashing during dpu_kms_pm_resume. This patch removes
dpu_kms_pm_suspend/resume so that msm_pm_suspend/resume uses the atomic
helpers instead (see next patch). This patch also removes
dpu_kms_is_suspend_blocked since it is never called.

v2: Reorganized patches in patchset

Signed-off-by: Bruce Wang <bzwang@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:27 -05:00
Sean Paul 812eeeb6b5 drm/msm: dpu: Add tracing around CTL_FLUSH
I found these tracepoints useful for debugging cursor/ctl, someone else
might find them useful too

Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11 12:51:15 -05:00
Andrey Grodzovsky c554206077 drm/amdgpu: Fix DEBUG_LOCKS_WARN_ON(depth <= 0) in amdgpu_ctx.lock
If CS is submitted using guilty ctx, we terminate amdgpu_cs_parser_init
before locking ctx->lock, latter in amdgpu_cs_parser_fini we still are
trying to release the lock just becase parser->ctx != NULL.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11 11:16:14 -05:00
Deepak Rawat 0660d8cd83 drm: Fix docs warning in drm_damage_helper.c
Modify description to match actual argument list.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2018-12-11 15:20:13 +01:00
Colin Ian King d74380ba0e drm/selftest: fix spelling mistake "dimention" -> "dimension"
There is a spelling mistake in a pr_err message, fix this.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2018-12-11 15:19:42 +01:00
Brian Norris 63238173b2 Revert "drm/rockchip: Allow driver to be shutdown on reboot/kexec"
This reverts commit 7f3ef5dedb.

It causes new warnings [1] on shutdown when running the Google Kevin or
Scarlet (RK3399) boards under Chrome OS. Presumably our usage of DRM is
different than what Marc and Heiko test.

We're looking at a different approach (e.g., [2]) to replace this, but
IMO the revert should be taken first, as it already propagated to
-stable.

[1] Report here:
http://lkml.kernel.org/lkml/20181205030127.GA200921@google.com

WARNING: CPU: 4 PID: 2035 at drivers/gpu/drm/drm_mode_config.c:477 drm_mode_config_cleanup+0x1c4/0x294
...
 Call trace:
  drm_mode_config_cleanup+0x1c4/0x294
  rockchip_drm_unbind+0x4c/0x8c
  component_master_del+0x88/0xb8
  rockchip_drm_platform_remove+0x2c/0x44
  rockchip_drm_platform_shutdown+0x20/0x2c
  platform_drv_shutdown+0x2c/0x38
  device_shutdown+0x164/0x1b8
  kernel_restart_prepare+0x40/0x48
  kernel_restart+0x20/0x68
...
 Memory manager not clean during takedown.
 WARNING: CPU: 4 PID: 2035 at drivers/gpu/drm/drm_mm.c:950 drm_mm_takedown+0x34/0x44
...
  drm_mm_takedown+0x34/0x44
  rockchip_drm_unbind+0x64/0x8c
  component_master_del+0x88/0xb8
  rockchip_drm_platform_remove+0x2c/0x44
  rockchip_drm_platform_shutdown+0x20/0x2c
  platform_drv_shutdown+0x2c/0x38
  device_shutdown+0x164/0x1b8
  kernel_restart_prepare+0x40/0x48
  kernel_restart+0x20/0x68
...

[2] https://patchwork.kernel.org/patch/10556151/
    https://www.spinics.net/lists/linux-rockchip/msg21342.html
    [PATCH] drm/rockchip: shutdown drm subsystem on shutdown

Fixes: 7f3ef5dedb ("drm/rockchip: Allow driver to be shutdown on reboot/kexec")
Cc: Jeffy Chen <jeffy.chen@rock-chips.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Vicente Bergas <vicencb@gmail.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: stable@vger.kernel.org
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20181205181657.177703-1-briannorris@chromium.org
2018-12-11 15:15:57 +01:00
Jani Nikula cb6f4c2c34 Merge tag 'gvt-next-2018-12-07' of https://github.com/intel/gvt-linux into drm-intel-next-fixes
gvt-next-2018-12-07

- Fix -next regression on shadow ctx's ppgtt destroy (Xiong)
- Update force-to-nonpriv register list (Yan)
- three typo fixes

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
From: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181207043659.GI12743@zhen-hp.sh.intel.com
2018-12-11 11:48:44 +02:00
Ben Skeggs 8ff01abccc drm/nouveau/ce/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:01 +10:00
Ben Skeggs 1b2a5aff35 drm/nouveau/fifo/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:01 +10:00
Ben Skeggs 7f7bc32e23 drm/nouveau/disp/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:01 +10:00
Ben Skeggs 1a38496cdd drm/nouveau/dma/tu106: initial support
Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:00 +10:00
Ben Skeggs bb1e3ff701 drm/nouveau/therm/tu106: initial support
Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:00 +10:00
Ben Skeggs 25a46a4a95 drm/nouveau/pmu/tu106: initial support
Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:00 +10:00
Ben Skeggs f5459f34f5 drm/nouveau/fault/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:38:00 +10:00
Ben Skeggs 340e96a7c3 drm/nouveau/bar/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:59 +10:00
Ben Skeggs 70ec09080d drm/nouveau/mmu/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:59 +10:00
Ben Skeggs 13f91e8e5a drm/nouveau/ltc/tu106: initial support
Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:59 +10:00
Ben Skeggs cfcfb6d0a3 drm/nouveau/fb/tu106: initial support
Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:59 +10:00
Ben Skeggs 75794c4124 drm/nouveau/imem/tu106: initial support
Appears to be compatible with NV50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:59 +10:00
Ben Skeggs 2fedee302d drm/nouveau/tmr/tu106: initial support
Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:58 +10:00
Ben Skeggs 25e6a89076 drm/nouveau/bus/tu106: initial support
Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:58 +10:00
Ben Skeggs 476740843b drm/nouveau/mc/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:58 +10:00
Ben Skeggs 6a9207ecf5 drm/nouveau/fuse/tu106: initial support
Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:58 +10:00
Ben Skeggs 52c887539d drm/nouveau/i2c/tu106: initial support
Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:57 +10:00
Ben Skeggs 1b0a475482 drm/nouveau/gpio/tu106: initial support
Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:57 +10:00
Ben Skeggs 8d12c4846d drm/nouveau/ibus/tu106: initial support
Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:57 +10:00
Ben Skeggs 73010b8e2b drm/nouveau/top/tu106: initial support
Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:57 +10:00
Ben Skeggs 9d7693fe07 drm/nouveau/devinit/tu106: initial support
Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:56 +10:00
Ben Skeggs b0216803e3 drm/nouveau/bios/tu106: initial support
No real surprised here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:56 +10:00
Ben Skeggs a39cb42a75 drm/nouveau/pci/tu106: initial support
Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:56 +10:00
Ben Skeggs 2cc0d7c0f7 drm/nouveau/core: recognise TU106
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:56 +10:00
Ben Skeggs 2d583ade74 drm/nouveau/core: increase maximum number of nvdec instances to 3
RTX2070 appears to have 3 copies of the engine.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:55 +10:00
Ben Skeggs 563737c525 drm/nouveau/kms/tu104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:55 +10:00
Ben Skeggs c36322d23d drm/nouveau/ce/tu104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:55 +10:00
Ben Skeggs 641d0b3056 drm/nouveau/fifo/tu104: initial support
Various different bits and pieces vs GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:55 +10:00
Ben Skeggs 114b6556db drm/nouveau/disp/tu104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:54 +10:00
Ben Skeggs aff70760be drm/nouveau/dma/tu104: initial support
Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:54 +10:00
Ben Skeggs 5a991efdfa drm/nouveau/therm/tu104: initial support
Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:54 +10:00
Ben Skeggs e7e0e946bb drm/nouveau/pmu/tu104: initial support
Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:54 +10:00
Ben Skeggs 17fb2807c6 drm/nouveau/fault/tu104: initial support
New registers.

Currently uncertain how exactly to mask fault buffer interrupts.  This will
likely be corrected at around the same time as the new MC interrupt stuff
has been properly figured out and implemented.

For the moment, it shouldn't matter too much.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:54 +10:00
Ben Skeggs 838efaa574 drm/nouveau/bar/tu104: initial support
New registers.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:53 +10:00
Ben Skeggs 7986f813c6 drm/nouveau/mmu/tu104: initial support
New flush method.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:53 +10:00
Ben Skeggs 01e0930617 drm/nouveau/ltc/tu104: initial support
Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:53 +10:00
Ben Skeggs 5386148b31 drm/nouveau/fb/tu104: initial support
Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:53 +10:00
Ben Skeggs c44349b054 drm/nouveau/imem/tu104: initial support
Appears to be compatible with NV50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:52 +10:00
Ben Skeggs ead5bf1e3c drm/nouveau/tmr/tu104: initial support
Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:52 +10:00
Ben Skeggs 75ad1b0020 drm/nouveau/bus/tu104: initial support
Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:52 +10:00
Ben Skeggs f2e55b9ea9 drm/nouveau/mc/tu104: initial support
Things are a bit different here on Turing, and will require further changes
yet once I've investigated them more thoroughly.

For now though, the existing GP100 code is compatible enough with one small
hack to forward on fault buffer interrupts.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:52 +10:00
Ben Skeggs 575d583ab6 drm/nouveau/fuse/tu104: initial support
Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:51 +10:00
Ben Skeggs 298fd472ea drm/nouveau/i2c/tu104: initial support
Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:51 +10:00
Ben Skeggs 3273483c32 drm/nouveau/gpio/tu104: initial support
Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:51 +10:00
Ben Skeggs ba9070d3ec drm/nouveau/ibus/tu104: initial support
Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:51 +10:00
Ben Skeggs 67e5abb78d drm/nouveau/top/tu104: initial support
Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:50 +10:00
Ben Skeggs 43d61cda30 drm/nouveau/devinit/tu104: initial support
The GPU executes DEVINIT itself now, which makes our lives a bit easier.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:50 +10:00
Ben Skeggs acbe55a5d4 drm/nouveau/bios/tu104: initial support
No real surprises here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:50 +10:00
Ben Skeggs 2d7ca8cb19 drm/nouveau/pci/tu104: initial support
Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:50 +10:00
Ben Skeggs 344d9c8f35 drm/nouveau/core: recognise TU104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:50 +10:00
Ben Skeggs cb55cd0c66 drm/nouveau/kms/nv50-: allow more flexibility with lut formats
Will be required for Turing.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:49 +10:00