Commit Graph

9 Commits

Author SHA1 Message Date
Lukas Wunner a4729c3506
spi: rb4xx: Don't leak SPI master in probe error path
If the calls to devm_clk_get(), devm_spi_register_master() or
clk_prepare_enable() fail on probe of the Mikrotik RB4xx SPI driver,
the spi_master struct is erroneously not freed.

Fix by switching over to the new devm_spi_alloc_master() helper.

Fixes: 05aec35787 ("spi: Add SPI driver for Mikrotik RB4xx series boards")
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Cc: <stable@vger.kernel.org> # v4.2+: 5e844cc37a5c: spi: Introduce device-managed SPI controller allocation
Cc: <stable@vger.kernel.org> # v4.2+
Cc: Bert Vermeulen <bert@biot.com>
Link: https://lore.kernel.org/r/369bf26d71927f60943b1d9d8f51810f00b0237d.1607286887.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-07 14:18:55 +00:00
Christopher Hill 9a436c62fb
spi: rb4xx: update driver to be device tree aware
This patch updates the spi driver spi-rb4xx.c to be device tree aware

Signed-off-by: Christopher Hill <ch6574@gmail.com>
Link: https://lore.kernel.org/r/20200521183631.37806-2-ch6574@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-22 14:13:17 +01:00
Christopher Hill 678e5e1e42
spi: rb4xx: null pointer bug fix
This patch fixes a null pointer bug in the spi driver spi-rb4xx.c by
moving the private data initialization to earlier in probe

Signed-off-by: Christopher Hill <ch6574@gmail.com>
Link: https://lore.kernel.org/r/20200521183631.37806-1-ch6574@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-05-22 14:13:16 +01:00
YueHaibing 7d4c208326
spi: rb4xx: use devm_platform_ioremap_resource() to simplify code
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20190904135918.25352-25-yuehaibing@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-04 17:21:21 +01:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Axel Lin bed2e8f4e8
spi: rb4xx: Use SPI_BPW_MASK to set bits_per_word_mask
Improve readability a bit.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-10 12:48:06 +01:00
Axel Lin b2b3024ca5 spi: rb4xx: Fix checking return value of devm_ioremap_resource()
devm_ioremap_resource() returns ERR_PTR on failure.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-01 17:35:54 +01:00
Bert Vermeulen 4a1ae8be45 spi: rb4xx: Fix set_cs logic.
As it turns out, the set_cs() enable parameter refers to the logic level
on the CS pin, not the state of chip selection.

This broke functionality of the LEDs behind the CPLD, or at least delayed
the commands until another one came in to toggle CS.

Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-20 21:34:59 +01:00
Bert Vermeulen 05aec35787 spi: Add SPI driver for Mikrotik RB4xx series boards
This driver mediates access between the connected CPLD and other devices
on the bus.

The m25p80-compatible boot flash and (some models) MMC use regular SPI,
bitbanged as required by the SoC. However the SPI-connected CPLD has
a two-wire mode, in which two bits are transferred per SPI clock
cycle. The second bit is transmitted with the SoC's CS2 pin.

Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-18 13:57:58 +01:00