Commit Graph

663902 Commits

Author SHA1 Message Date
Alex Deucher a5bde2f964 drm/amdgpu: add basic support for atomfirmware.h (v3)
This adds basic support for asics that use atomfirmware.h
to define their vbios tables.

v2: rebase
v3: squash in num scratch reg fix

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:17 -04:00
Alex Deucher 43bf11bd92 drm/amdgpu: move atom scratch setup into amdgpu_atombios.c
There will be a slightly different version for atomfirmware.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:17 -04:00
Alex Deucher 0cdd500560 amdgpu: detect if we are using atomfirmware or atombios for vbios (v2)
Supposedly atomfirmware rom header is 3.3 atombios is 1.1.

v2: rebased on newer kernel

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:16 -04:00
Alex Deucher 1fadf42ed5 drm/amdgpu: add the new atomfirmware interface header
soc15 asics have a new vbios interface.  These headers
define that interface.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:15 -04:00
Nicolai Hähnle f34678187a drm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freed
We will add the fence to freed buffer objects in a later commit, to ensure
that the underlying memory can only be re-used after all references in
page tables have been cleared.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:15 -04:00
Eric Huang 923d26db85 drm/amd/powerplay: restore disabling power containment on Fiji (v2)
Power containment will degrade performance in some compute tests.
Restore disabling it as before code refining in powerplay.

v2: only in the compute profile

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:14 -04:00
Alex Deucher a2140e00e0 drm/amdgpu/gfx8: further KIQ parameter cleanup
The ring structure already has what we need.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:13 -04:00
Alex Deucher 345346108b drm/amdgpu/gfx8: store the eop gpu addr in the ring structure
Avoids passing around additional parameters during setup.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:13 -04:00
Alex Deucher 015c23600a drm/amdgpu/gfx8: reduce the functon params for mpq setup
Everything we need is in the ring structure.  No need to
pass all the bits explicitly.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:12 -04:00
Alex Deucher f2effd49e7 drm/amdgpu/gfx8: reserve kiq eop object before unmapping it
It's required.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:12 -04:00
Alex Deucher 0104cf2536 drm/amdgpu/gfx8: fold loops in kiq_resume()
No need to loop through the compute queues twice.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:11 -04:00
Alex Deucher 2e263c824a drm/amdgpu/gfx8: test KIQ before compute rings
If KIQ isn't working, the compute rings won't work either.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:10 -04:00
Alex Deucher 6a6f380f07 drm/amdgpu/gfx8: reserve mqd objects before mapping them
It's required.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:10 -04:00
Alex Deucher 0875a24296 drm/amdgpu/gfx8: rename some functions
To better match where they are used.  Called from sw_init
and sw_fini.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:09 -04:00
Alex Deucher b0ac2a32ad drm/amdgpu/gfx8: whitespace cleanup
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:08 -04:00
Rex Zhu 0d52c6a13e drm/amdgpu: load mc firware in driver for Polaris.
load mc ucode in driver if VBIOS not loaded
a full version of MC ucode,

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: jimqu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:08 -04:00
Chunming Zhou aacbbc8bc1 drm/amdgpu: fix duplicated code
it could come from branch merge.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:07 -04:00
Rex Zhu 739e9fffde drm/amdgpu: enable gfx/system/vce clockgating on Polars12.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:06 -04:00
Rex Zhu 1c622002b1 drm/amd/powerplay: add a new register define for APU in VI.
the ixcurrent_pg_status addr is different between APU and DGPU.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:06 -04:00
Eric Huang 170d6e94e5 drm/amdgpu: enable GFX/UVD/VCE PG for Bristol
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:05 -04:00
Tom St Denis d1aff8ec49 drm/amd/amdgpu: Set VCE/UVD off during late init
Forces VCE/UVD off during late init to ensure they're powered off
correctly during boot.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:05 -04:00
Colin Ian King f917c2ad92 drm/amdgpu: remove redundant outer loop and remove commented out code
The outer loop is redundant and can be removed as it is doing nothing
useful. Also remove some commented out code that is not being used.

Detected by CoverityScan, CID#1402073

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:04 -04:00
Chunming Zhou 153de9dff9 drm/amd/sched: revise priority number
big number is to high priority.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:03 -04:00
Alex Deucher 8eafd505db drm/amdgpu: bump version for PRT support
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:03 -04:00
Junwei Zhang 27f6d61036 drm/amdgpu: fix before and after mapping judgement for replace mapping
If the before mapping is 1 page size, so its start and last will be same.
Thus below condition will become false, then to free the before mapping.
   > if (before->it.start != before->it.last)
But in this case, we need the before mapping of 1 page size.
So does after mapping.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:02 -04:00
Christian König 80f95c579d drm/amdgpu: add a VM mapping replace operation v2
Add a new operation to replace mappings in a VM with a new one.

v2: Fix Jerry's comment, separate out clear operation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:01 -04:00
Christian König dc54d3d174 drm/amdgpu: implement AMDGPU_VA_OP_CLEAR v2
A new VM operation to remove all mappings in a range.

v2: limit unmapped area as noted by Jerry

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:01 -04:00
Christian König 663e4577a5 drm/amdgpu: separate page table allocation from mapping
This makes it easier to implement a replace operation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:00 -04:00
Christian König 4388fc2ab0 drm/amdgpu: make set_prt callback optional and fix error handling
PRT support is completely implemented now and we left it
turned on accidentially in the error path.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:59 -04:00
Alex Deucher d319c2bcc6 drm/amdgpu/vi: add missing error handling when setting uvd dclk
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:59 -04:00
Alex Deucher 8085c69968 drm/amdgpu/vi: remove duplicate CG flags
GFX_MGLS was added twice.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:58 -04:00
Andrew F. Davis 93a4aec218 drm/amd/powerplay: remove unneeded conversions to bool
Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:58 -04:00
Andrew F. Davis 7e91366420 drm/amdgpu: remove unneeded conversions to bool
Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:57 -04:00
Andres Rodriguez c98b5c9714 drm/amdgpu: add macro to retrieve timeline name v2
This helps de-duplicate a long expression and removes overly long lines.

v2: Rename macro and undef it

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:56 -04:00
Andres Rodriguez ced2ef66dc drm/amdgpu: replace fence pointer with fence data in traces
Fence data is easier to read and allows us to correlate to identify
corresponding dma_fence ftrace events.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:56 -04:00
Andres Rodriguez 2359419fa5 drm/amdgpu: remove useless pointers from traces
Remove pointers which provide redundant information which is already
easier to deduce from other fields.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:55 -04:00
Andres Rodriguez f6fd20304a drm/amdgpu: use sched_job id instead of pointer for tracing
Pointers get reallocated and they are hard to read for humans. Use ids
instead.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:54 -04:00
Andres Rodriguez 373eadfa6a drm/amdgpu: more ftrace formatting consistency fixes
Consistent formatting makes it easier to read the logs and apply simple
awk oneliners.

I missed some of these on my last patch.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:54 -04:00
Andres Rodriguez 93f8b36738 drm/amd/sched: add a unique job id to amd_sched_job
A unique id is useful for debugging and tracing. Intended to replace
pointers in ftrace output.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:53 -04:00
Roger.He 8fb6e528c3 drm/amdgpu: increase IH ring buffer size to avoid overflow
We originally limited the IH to 4k on tonga since it
uses bus addresses directly rather than GPU MC addresses,
so it needs contigous physical memory.  This brings it
inline with other asics.

Signed-off-by: Roger.He <Hongbo.He@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:53 -04:00
Alex Deucher d2d51d8192 drm/amdgpu: don't init GDS pool if GDS size is 0 (v2)
SI cards don't expose GDS as a separate pool.  The CP manages
GDS and the UMDs use special CP packets to allocate GDS memory.

v2: drop extra whitespace change

bug: https://bugzilla.kernel.org/show_bug.cgi?id=194867

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:52 -04:00
Alex Deucher 11ba13e179 drm/amdgpu/gfx6: drop gds unrefs
Leftover from gfx7 code.  gfx6 never sets up the gds buffers
in the first place.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:51 -04:00
Rex Zhu 2667989927 drm/amdgpu: refine vce_3.0 code.
fix logic error in hw_fini and
set_clockgating_state functions.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:51 -04:00
Rex Zhu 03a5f1df5b drm/amdgpu: refine vce2.0 dpm sequence
start vce first then enable vce dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:50 -04:00
Alex Deucher c5e38e1194 drm/radeon: add new ATIF ACPI method
Used for fetching external GPU information.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:49 -04:00
Alex Deucher 8285052ef1 drm/amdgpu: add new ATIF ACPI method
Used for fetching external GPU information.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:49 -04:00
Leo Liu 166c8178fb drm/amdgpu: get cs support of AMDGPU_HW_IP_UVD_ENC
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:48 -04:00
Leo Liu 63defd3f67 drm/amdgpu: add AMDGPU_HW_IP_UVD_ENC to info query
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:47 -04:00
Leo Liu a50798b6c7 uapi/drm: add AMDGPU_HW_IP_UVD_ENC
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:47 -04:00
Leo Liu 50c3e23299 drm/amdgpu: add uvd enc ring type and functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:46 -04:00