Commit Graph

73 Commits

Author SHA1 Message Date
Helge Deller 5c38602d83 parisc: Re-enable interrupts early
Since kernel 3.9 we re-enable interrupts quite late due to commit c207a76bf1
("parisc: only re-enable interrupts if we need to schedule or deliver signals
when returning to userspace"). At that time the parisc kernel had no dedicated
IRQ stack, and this commit prevented kernel stack overflows.

But since commit 200c880420 ("parisc: implement irq stacks") we now have an
IRQ stack, so we may be safe now.  And when CONFIG_DEBUG_STACKOVERFLOW=y is
enabled, we can even check at runtime for overflows.

Signed-off-by: Helge Deller <deller@gmx.de>
2016-12-12 22:21:50 +01:00
Helge Deller f39cce654f parisc: Add cfi_startproc and cfi_endproc to assembly code
Add ENTRY_CFI() and ENDPROC_CFI() macros for dwarf debug info and
convert assembly users to new macros.

Signed-off-by: Helge Deller <deller@gmx.de>
2016-10-05 22:54:40 +02:00
Helge Deller 5fece5ad24 parisc: Use long jump to reach ftrace_return_to_handler()
Depending on config options we will need to use a long jump to reach
ftrace_return_to_handler().  Additionally only compile the
parisc_return_to_handler code when CONFIG_FUNCTION_GRAPH_TRACER is set.

Signed-off-by: Helge Deller <deller@gmx.de>
2016-05-23 23:44:44 +02:00
Helge Deller 4df3c9ec12 parisc: Merge ftrace C-helper and assembler functions into .text.hot section
When enabling all-branch ftrace support (CONFIG_PROFILE_ALL_BRANCHES)
the kernel gets really huge and some ftrace assembler functions like
mcount can't reach the ftrace helper functions which are written in C.
Avoid this problem of too distant branches by moving the ftrace C-helper
functions into the .text.hot section which is put in front of the
standard .text section by the linker.

Signed-off-by: Helge Deller <deller@gmx.de>
2016-05-22 21:46:21 +02:00
Helge Deller 366dd4ea9d parisc: Fix ftrace function tracer
Fix the FTRACE function tracer for 32- and 64-bit kernel.
The former code was horribly broken.

Reimplement most coding in assembly and utilize optimizations, e.g. put
mcount() and ftrace_stub() into one L1 cacheline.

Signed-off-by: Helge Deller <deller@gmx.de>
2016-04-14 17:47:19 +02:00
Helge Deller 736d216933 parisc: Add Huge Page and HUGETLBFS support
This patch adds huge page support to allow userspace to allocate huge
pages and to use hugetlbfs filesystem on 32- and 64-bit Linux kernels.
A later patch will add kernel support to map kernel text and data on
huge pages.

The only requirement is, that the kernel needs to be compiled for a
PA8X00 CPU (PA2.0 architecture). Older PA1.X CPUs do not support
variable page sizes. 64bit Kernels are compiled for PA2.0 by default.

Technically on parisc multiple physical huge pages may be needed to
emulate standard 2MB huge pages.

Signed-off-by: Helge Deller <deller@gmx.de>
2015-11-22 12:23:10 +01:00
Helge Deller 4182d0cdf8 parisc: Initialize the fault vector earlier in the boot process.
A fault vector on parisc needs to be 2K aligned.  Furthermore the
checksum of the fault vector needs to sum up to 0 which is being
calculated and written at runtime.

Up to now we aligned both PA20 and PA11 fault vectors on the same 4K
page in order to easily write the checksum after having mapped the
kernel read-only (by mapping this page only as read-write).
But when we want to map the kernel text and data on huge pages this
makes things harder.
So, simplify it by aligning both fault vectors on 2K boundries and write
the checksum before we map the page read-only.

Signed-off-by: Helge Deller <deller@gmx.de>
2015-11-22 12:22:43 +01:00
John David Anglin 01ab605704 parisc: Fix some PTE/TLB race conditions and optimize __flush_tlb_range based on timing results
The increased use of pdtlb/pitlb instructions seemed to increase the
frequency of random segmentation faults building packages. Further, we
had a number of cases where TLB inserts would repeatedly fail and all
forward progress would stop. The Haskell ghc package caused a lot of
trouble in this area. The final indication of a race in pte handling was
this syslog entry on sibaris (C8000):

 swap_free: Unused swap offset entry 00000004
 BUG: Bad page map in process mysqld  pte:00000100 pmd:019bbec5
 addr:00000000ec464000 vm_flags:00100073 anon_vma:0000000221023828 mapping: (null) index:ec464
 CPU: 1 PID: 9176 Comm: mysqld Not tainted 4.0.0-2-parisc64-smp #1 Debian 4.0.5-1
 Backtrace:
  [<0000000040173eb0>] show_stack+0x20/0x38
  [<0000000040444424>] dump_stack+0x9c/0x110
  [<00000000402a0d38>] print_bad_pte+0x1a8/0x278
  [<00000000402a28b8>] unmap_single_vma+0x3d8/0x770
  [<00000000402a4090>] zap_page_range+0xf0/0x198
  [<00000000402ba2a4>] SyS_madvise+0x404/0x8c0

Note that the pte value is 0 except for the accessed bit 0x100. This bit
shouldn't be set without the present bit.

It should be noted that the madvise system call is probably a trigger for many
of the random segmentation faults.

In looking at the kernel code, I found the following problems:

1) The pte_clear define didn't take TLB lock when clearing a pte.
2) We didn't test pte present bit inside lock in exception support.
3) The pte and tlb locks needed to merged in order to ensure consistency
between page table and TLB. This also has the effect of serializing TLB
broadcasts on SMP systems.

The attached change implements the above and a few other tweaks to try
to improve performance. Based on the timing code, TLB purges are very
slow (e.g., ~ 209 cycles per page on rp3440). Thus, I think it
beneficial to test the split_tlb variable to avoid duplicate purges.
Probably, all PA 2.0 machines have combined TLBs.

I dropped using __flush_tlb_range in flush_tlb_mm as I realized all
applications and most threads have a stack size that is too large to
make this useful. I added some comments to this effect.

Since implementing 1 through 3, I haven't had any random segmentation
faults on mx3210 (rp3440) in about one week of building code and running
as a Debian buildd.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # v3.18+
Signed-off-by: Helge Deller <deller@gmx.de>
2015-07-10 21:47:47 +02:00
Kirill A. Shutemov f24ffde432 parisc: expose number of page table levels on Kconfig level
We would want to use number of page table level to define mm_struct.
Let's expose it as CONFIG_PGTABLE_LEVELS.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Helge Deller <deller@gmx.de>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-04-14 16:49:02 -07:00
Helge Deller c78c2b7e04 parisc: hpux - Remove hpux gateway page
Drop code to create HP-UX gateway page and syscall entry code.

Signed-off-by: Helge Deller <deller@gmx.de>
2015-02-16 22:35:06 +01:00
John David Anglin b63a2bbc0b parisc: make interrupt and interruption stack allocation reentrant
The get_stack_use_cr30 and get_stack_use_r30 macros allocate a stack
frame for external interrupts and interruptions requiring a stack frame.
They are currently not reentrant in that they save register context
before the stack is set or adjusted.

I have observed a number of system crashes where there was clear
evidence of stack corruption during interrupt processing, and as a
result register corruption. Some interruptions can still occur during
interruption processing, however external interrupts are disabled and
data TLB misses don't occur for absolute accesses. So, it's not entirely
clear what triggers this issue. Also, if an interruption occurs when
Q=0, it is generally not possible to recover as the shadowed registers
are not copied.

The attached patch reworks the get_stack_use_cr30 and get_stack_use_r30
macros to allocate stack before doing register saves. The new code is a
couple of instructions shorter than the old implementation. Thus, it's
an improvement even if it doesn't fully resolve the stack corruption
issue. Based on limited testing, it improves SMP system stability.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-05-24 22:35:36 +02:00
John David Anglin f0a18819e2 parisc: fix SMP races when updating PTE and TLB entries in entry.S
Currently, race conditions exist in the handling of TLB interruptions in
entry.S.  In particular, dirty bit updates can be lost if an accessed
interruption occurs just after the dirty bit interruption on a different
cpu.  Lost dirty bit updates result in user pages not being flushed and
general system instability.  This change adds lock and unlock macros to
synchronize all PTE and TLB updates done in entry.S.  As a result,
userspace stability is significantly improved.

Signed-off-by: John David Anglin  <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-05-11 21:13:04 +02:00
Helge Deller 200c880420 parisc: implement irq stacks
Default kernel stack size on parisc is 16k.  During tests we found that the
kernel stack can easily grow beyond 13k, which leaves 3k left for irq
processing.

This patch adds the possibility to activate an additional stack of 16k per CPU
which is being used during irq processing.  This implementation does not yet
uses this irq stack for the irq bh handler.

The assembler code for call_on_stack was heavily cleaned up by John
David Anglin.

CC: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-05-07 22:30:35 +02:00
John David Anglin c207a76bf1 parisc: only re-enable interrupts if we need to schedule or deliver signals when returning to userspace
Helge and I have found that we have a kernel stack overflow problem
which causes a variety of random failures.
Currently, we re-enable interrupts when returning from an external
interrupt incase we need to schedule or delivery
signals.  As a result, a potentially unlimited number of interrupts
can occur while we are running on the kernel
stack.  It is very limited in space (currently, 16k).  This change
defers enabling interrupts until we have
actually decided to schedule or delivery signals.  This only occurs
when we about to return to userspace.  This
limits the number of interrupts on the kernel stack to one.  In other
cases, interrupts remain disabled until the
final return from interrupt (rfi).

Signed-off-by: John David Anglin  <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-05-07 20:33:03 +02:00
John David Anglin bbbfde7820 parisc: use long branch in fork_like macro
The "b" branch instruction used in the fork_like macro only can handle
17-bit pc-relative offsets.
This fails with an out of range offset with some .config files.
Rewrite to use the "be" instruction which
can branch to any address in a space.

Signed-off-by: John David Anglin  <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-05-06 23:09:48 +02:00
Helge Deller 6a45716abb parisc: fix partly 16/64k PAGE_SIZE boot
This patch fixes partly PAGE_SIZEs of 16K or 64K by adjusting the
assembler PTE lookup code and the assembler TEMPALIAS code.  Furthermore
some data alignments for PAGE_SIZE have been limited to 4K (or less) to
not waste too much memory with greater page sizes. As a side note, the
palo loader can (currently) only handle up to 10 ELF segments which is
fixed with tighter aligning as well.

My testings indicated that the ldci command in the sba iommu coding
needed adjustment by the PAGE_SHIFT value and that the I/O PDIR Page
size was only set to 4K for my machine (C3000).

All this fixes partly the boot, but there are still quite some caching
problems left.  Examples are e.g. the symbios logic driver which is
failing:

sym0: <896> rev 0x7 at pci 0000:00:0f.0 irq 69
sym0: PA-RISC Firmware, ID 7, Fast-40, SE, parity checking
CACHE TEST FAILED: DMA error (dstat=0x81).sym0: CACHE INCORRECTLY CONFIGURED.

and the tulip network driver which doesn't seem to work correctly
either:

Sending BOOTP requests .net eth0: Setting full-duplex based on MII#1
link partner capability of 05e1
..... timed out!

Beside those kernel fixes glibc will need fixes too to be able to handle
>4K page sizes.

Signed-off-by: Helge Deller <deller@gmx.de>
2013-05-06 23:08:32 +02:00
Linus Torvalds 9e2d59ad58 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull signal handling cleanups from Al Viro:
 "This is the first pile; another one will come a bit later and will
  contain SYSCALL_DEFINE-related patches.

   - a bunch of signal-related syscalls (both native and compat)
     unified.

   - a bunch of compat syscalls switched to COMPAT_SYSCALL_DEFINE
     (fixing several potential problems with missing argument
     validation, while we are at it)

   - a lot of now-pointless wrappers killed

   - a couple of architectures (cris and hexagon) forgot to save
     altstack settings into sigframe, even though they used the
     (uninitialized) values in sigreturn; fixed.

   - microblaze fixes for delivery of multiple signals arriving at once

   - saner set of helpers for signal delivery introduced, several
     architectures switched to using those."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: (143 commits)
  x86: convert to ksignal
  sparc: convert to ksignal
  arm: switch to struct ksignal * passing
  alpha: pass k_sigaction and siginfo_t using ksignal pointer
  burying unused conditionals
  make do_sigaltstack() static
  arm64: switch to generic old sigaction() (compat-only)
  arm64: switch to generic compat rt_sigaction()
  arm64: switch compat to generic old sigsuspend
  arm64: switch to generic compat rt_sigqueueinfo()
  arm64: switch to generic compat rt_sigpending()
  arm64: switch to generic compat rt_sigprocmask()
  arm64: switch to generic sigaltstack
  sparc: switch to generic old sigsuspend
  sparc: COMPAT_SYSCALL_DEFINE does all sign-extension as well as SYSCALL_DEFINE
  sparc: kill sign-extending wrappers for native syscalls
  kill sparc32_open()
  sparc: switch to use of generic old sigaction
  sparc: switch sys_compat_rt_sigaction() to COMPAT_SYSCALL_DEFINE
  mips: switch to generic sys_fork() and sys_clone()
  ...
2013-02-23 18:50:11 -08:00
John David Anglin 1c4c6597b6 parisc: Fix comment describing setup of access rights in entry.S
This comment describes incredibly subtle code, so it should be right!

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-02-20 22:46:46 +01:00
Al Viro 6e26aab98c parisc: switch to generic sigaltstack
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03 18:16:05 -05:00
John David Anglin 34360f080c parisc: improve ptrace support for gdb single-step
Various GCC tests use gdb to simulate a multithreaded application. Many of
these tests have been failing on parisc linux.

GCC does this by using gdb to single-step the application, then gdb is used to
call other test specific code. Where this fails is when the application is
stepped into the delay slot of a taken branch. This sets the PSW B bit. When
the test specific code is executed, this usually clears the PSW B bit.
Currently, gdb is not allowed to set the B bit. So, the code falls through what
should be a taken branch.

The attached patch adds the PSW B bit to the set of bits that gdb is allowed to
set. In order to set the B bit, the trace system call must return using an
interrupt restore. The patch also modifies this code to use the saved IAOQ
values when they are saved by a ptrace syscall or interruption.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-01-07 23:06:27 +01:00
Al Viro 415bfae9e9 parisc: switch to generic fork/vfork/clone
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-28 22:36:46 -05:00
Al Viro 363806ddd2 parisc: switch to saner kernel_execve() semantics
ACKed-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-10-21 22:38:16 -04:00
Al Viro ff0ab8af9c parisc: optimizations in copy_thread() and friends
* in user thread case the registers had been copied as part of task_struct
already; no need to do it in copy_thread().
* no need to store kernel stack pointer into regs->r21; we know its offset
anyway.
* no need to clobber r3 in sys_fork_wrapper and friends - r28 will do just
as well and *it* will be overwritten anyway.
* no need to mess with storing the return address for child - it should just
use syscall_exit.
* no need to bother with separate stack frame for sys_clone() - just branch
there and be done with that.
* no need to bother with wrapper_exit - we need it only on the child_return,
so let's just do it there.
* use the same ksp for kernel threads and userland ones, while we are at it,
and let ret_from_kernel_execve() go through the normal syscall_exit.  More
straightforward is better here...

[fixes from jejb folded]

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-10-14 19:36:37 -04:00
Al Viro 7f1f311ac7 parisc: switch to generic sys_execve()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-10-14 19:36:37 -04:00
Al Viro 4e5ed85ab5 parisc: switch to generic kernel_execve()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-10-14 19:36:36 -04:00
Al Viro a44e060fc5 parisc: switch to generic kernel_thread()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-10-14 19:36:30 -04:00
Al Viro 6fd84c0831 TIF_RESTORE_SIGMASK can be set only when TIF_SIGPENDING is set
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-06-01 12:58:50 -04:00
Linus Torvalds fb21affa49 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull second pile of signal handling patches from Al Viro:
 "This one is just task_work_add() series + remaining prereqs for it.

  There probably will be another pull request from that tree this
  cycle - at least for helpers, to get them out of the way for per-arch
  fixes remaining in the tree."

Fix trivial conflict in kernel/irq/manage.c: the merge of Andrew's pile
had brought in commit 97fd75b7b8 ("kernel/irq/manage.c: use the
pr_foo() infrastructure to prefix printks") which changed one of the
pr_err() calls that this merge moves around.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal:
  keys: kill task_struct->replacement_session_keyring
  keys: kill the dummy key_replace_session_keyring()
  keys: change keyctl_session_to_parent() to use task_work_add()
  genirq: reimplement exit_irq_thread() hook via task_work_add()
  task_work_add: generic process-context callbacks
  avr32: missed _TIF_NOTIFY_RESUME on one of do_notify_resume callers
  parisc: need to check NOTIFY_RESUME when exiting from syscall
  move key_repace_session_keyring() into tracehook_notify_resume()
  TIF_NOTIFY_RESUME is defined on all targets now
2012-05-31 18:47:30 -07:00
James Bottomley 2f649c1f6f [PARISC] fix TLB fault path on PA2.0 narrow systems
commit 5e185581d7
Author: James Bottomley <JBottomley@Parallels.com>

    [PARISC] fix PA1.1 oops on boot

Didn't quite fix the crash on boot.  It moved it from PA1.1 processors to
PA2.0 narrow kernels.  The final fix is to make sure the [id]tlb_miss_20 paths
also work.  Even on narrow systems, these paths require using the wide
instructions becuase the tlb insertion format is wide.  Fix this by
conditioning the dep[wd],z on whether we're being called from _11 or _20[w]
paths.

Tested-by: Helge Deller <deller@gmx.de>
Cc: stable@vger.kernel.org
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2012-05-25 10:52:17 +01:00
Al Viro 617c62a9fc parisc: need to check NOTIFY_RESUME when exiting from syscall
... not just on return from interrupt

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-05-23 22:09:20 -04:00
James Bottomley 5e185581d7 [PARISC] fix PA1.1 oops on boot
All PA1.1 systems have been oopsing on boot since

commit f311847c2f
Author: James Bottomley <James.Bottomley@HansenPartnership.com>
Date:   Wed Dec 22 10:22:11 2010 -0600

    parisc: flush pages through tmpalias space

because a PA2.0 instruction was accidentally introduced into the PA1.1 TLB
insertion interruption path when it was consolidated with the do_alias macro.
Fix the do_alias macro only to use PA2.0 instructions if compiled for 64 bit.
Cc: stable@vger.kernel.org  #2.6.39+
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2012-05-16 11:14:45 +01:00
James Bottomley d7dd2ff11b [PARISC] only make executable areas executable
Currently parisc has the whole kernel marked as RWX, meaning any
kernel page at all is eligible to be executed.  This can cause a
theoretical problem on systems with combined I/D TLB because the act
of referencing a page causes a TLB insertion with an executable bit.
This TLB entry may be used by the CPU as the basis for speculating the
page into the I-Cache.  If this speculated page is subsequently used
for a user process, there is the possibility we will get a stale
I-cache line picked up as the binary executes.

As a point of good practise, only mark actual kernel text pages as
executable.  The same has to be done for init_text pages, but they're
converted to data pages (and the I-Cache flushed) when the init memory
is released.

Signed-off-by: James Bottomley <James.Bottomley@suse.de>
2011-04-15 12:55:18 -05:00
Lucas De Marchi 25985edced Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-31 11:26:23 -03:00
James Bottomley 8b4ae3342d eliminate special FLUSH flag from page table
This was used to flush a region even if the page table entry had been
cleared.  In theory this was never necessary, but now we've switched to
alias based flushing, the whole set of code associated with it can be dumped.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
2011-01-15 08:45:54 -06:00
James Bottomley f311847c2f parisc: flush pages through tmpalias space
The kernel has an 8M tmpailas space (originally designed for copying
and clearing pages but now only used for clearing).  The idea is
to place zeros into the cache above a physical page rather than into
the physical page and flush the cache, because often the zeros end up
being replaced quickly anyway.

We can also use the tmpalias space for flushing a page.  The difference
here is that we have to do tmpalias processing in the non access data and
instruction traps.  The principle is the same: as long as we know the physical
address and have a virtual address congruent to the real one, the flush will
be effective.

In order to use the tmpalias space, the icache miss path has to be enhanced to
check for the alias region to make the fic instruction effective.

Signed-off-by: James Bottomley <James.Bottomley@suse.de>
2011-01-15 08:44:40 -06:00
John David Anglin 9b437bca16 parisc: Remove unnecessary macros from entry.S
The EXTR, DEP and DEPI macros are unnecessary.  There are PA 1.X
pneumonics available with the same functionality, and the DEP and DEPI
macros conflict with assembler pneumonics.

Tested on a variety of 32 and 64-bit systems.

Signed-off-by: John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
2010-05-30 05:47:28 -04:00
John David Anglin c2dc988ec5 parisc: Delete unnecessary nop's in entry.S
Signed-off-by: John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
2010-05-30 05:45:22 -04:00
John David Anglin 8f6c0c2bf1 parisc: Avoid interruption in critical region in entry.S
Signed-off-by: John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
2010-05-30 05:44:36 -04:00
Kyle McMartin ecd3d4bc06 parisc: stop using task->ptrace for {single,block}step flags
task->ptrace flags belong to generic code, so instead thief some
TIF_ bits to use. Somewhat risky conversion of code to test TASK_FLAGS
instead of TASK_PTRACE in assembly, but it looks alright in the end.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-09-27 23:07:22 -04:00
David Howells d0420c83f3 KEYS: Extend TIF_NOTIFY_RESUME to (almost) all architectures [try #6]
Implement TIF_NOTIFY_RESUME for most of those architectures in which isn't yet
available, and, whilst we're at it, have it call the appropriate tracehook.

After this patch, blackfin, m68k* and xtensa still lack support and need
alteration of assembly code to make it work.

Resume notification can then be used (by a later patch) to install a new
session keyring on the parent of a process.

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

cc: linux-arch@vger.kernel.org
Signed-off-by: James Morris <jmorris@namei.org>
2009-09-02 21:29:19 +10:00
John David Anglin 2678251b20 parisc: Set correct bit in protection flags
Signed-off-by: John David Anglin <dave@hiauly1.hia.nrc.ca>
Signed-off-by: Helge Deller <deller@gmx.de>
2009-08-02 12:36:05 +02:00
Helge Deller d75f054a2c parisc: add ftrace (function and graph tracer) functionality
This patch adds the ftrace debugging functionality to the parisc kernel.
It will currently only work with 64bit kernels, because the gcc options -pg
and -ffunction-sections can't be enabled at the same time and -ffunction-sections
is still needed to be able to link 32bit kernels.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-03-31 02:51:34 +00:00
Helge Deller afca252387 parisc: allow to build with 16k default kernel page size
Introduce new convert_for_tlb_insert20 macro and use it to replace assembler
statements with hardcoded constants.
This change allows the parisc64 kernel to boot with 16kb default kernel page size,
aka CONFIG_PARISC_PAGE_SIZE_16KB=y.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-03-31 02:51:33 +00:00
Helge Deller 1152a68c42 parisc: use constants instead of numbers in assembly
A few small fixups:
* _PAGE_SIZE_ENCODING_DEFAULT is wrong here, as one might assume that
  it's possible to define the page size that way. This is wrong. Use 0 instead.
* use constants instead of hardcoded numerical values in depi and extru
  while building the PFN out of the pte entry
* use SHRREG instead of extru (iitlba expects the PFN at bits {7..26})

Still wondering why we can use the same register (pte) as extru source
and target register, but it seems to work on PA1.1 and PA2.0...

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-03-31 02:51:33 +00:00
Helge Deller 2cfeb9a675 parisc: add braces around arguments in assembler macros
Add braces around the macro arguments, else for example
"shl %r1, 5-3, %r2" would not expand to what you would assume.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-03-13 01:18:27 -04:00
Kyle McMartin dfcf753bd3 Revert "parisc: fix trivial section name warnings"
This reverts commit bd3bb8c15b.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2008-06-13 10:49:45 -04:00
Kyle McMartin 872f6debca parisc: use conditional macro for 64-bit wide ops
This work enables us to remove -traditional from $AFLAGS on
parisc.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2008-05-15 11:03:43 -04:00
Helge Deller bd3bb8c15b parisc: fix trivial section name warnings
This trivial patch fixes the following section warnings on PARISC:
> WARNING: vmlinux.o (.text.1): unexpected section name.
>The (.[number]+) following section name are ld generated and not expected.
> Did you forget to use "ax"/"aw" in a .S file?
> Note that for example <linux/init.h> contains
> section definitions for use in .S files.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2008-05-15 10:38:54 -04:00
Kyle McMartin 6cc4525d29 [PARISC] Kill off broken irqstack code
It's been unfinished and broken long enough, and I have some ideas on how
to do it more cleanly.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2007-10-18 00:59:31 -07:00
Kyle McMartin 873d50e2e5 [PARISC] Remove hardcoded uses of PAGE_SIZE
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2007-10-18 00:59:27 -07:00