Commit Graph

1292 Commits

Author SHA1 Message Date
Sudhakar Rajashekhara b1466376b2 davinci: Macro to convert GPIO signal to GPIO pin number
Adds a macro to convert the GPIO signal passed as bank number
and signal to GPIO pin number.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:54 +03:00
Chaithrika U S 491214e1f8 davinci: Audio support for DA850/OMAP-L138 EVM
Define resources for McASP used on DA850/OMAP-L138 EVM, add platform
device defintion and Pin Mux configurations.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:53 +03:00
Chaithrika U S e33ef5e3b3 davinci: Audio support for DA830 EVM
Define resources for McASP1 used on DA830/OMAP-L137 EVM, add platform
device defintion, initialization function.  Additionally, this patch
also adds version and FIFO related members to platform data structure.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:52 +03:00
Sudhakar Rajashekhara 5a8d5441f4 davinci: Correct the number of GPIO pins for da850/omap-l138
DA850/OMAP-L138 has 144 pins configurable as GPIO, but
currently this has been configured as 128. This patch
corrects it.

Also, this patch adds the base address for GPIO pins
greater than 128.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:52 +03:00
Sudhakar Rajashekhara 53ca5c9169 davinci: Configure MDIO pins for EMAC
Earlier patch which adds EMAC support for da850/omap-l138
was not configuring the MDIO pins.

Ethernet was working fine with the earlier patch, because
the MDIO pins were configured from the boot loader. This
patch removes that dependency.

Also, this patch populates a member in the emac clk structure
to say that EMAC LPSC sits on controller 1.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:51 +03:00
Sandeep Paulraj cc36e97b0b DaVinci: DM365: Add Support for new Revision of silicon
DM365 RBL has been updated. The variant number has changed for this
new revision of silicon. This patch adds support for the
new revision of DM365.
The name fields are also being updated to reflect the version
of the silicon.

Without this minor fix DM365 REV 1.2 will not boot up

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:50 +03:00
Sandeep Paulraj 866d286953 DaVinci: DM365: Fix Compilation issue due to PINMUX entry
The mask can hold only 8 bit values. This gave a
compilation warning. This patch rectifies the warning.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:50 +03:00
Sandeep Paulraj a0f0202e2a DaVinci: EDMA: Updating default queue handling
EDMA queues in DM365 are a little different than those
on other DaVinci's. On DM365 Q0 and Q1 have the larger
FIFO size. We want Q0 and Q1 to be used by codecs and
DVSDK demos.
MMC driver is the only driver which uses the flag
'EVENTQ_DEFAULT'. So MMC driver should be using Q2 instead of
Q1 on DM365.
This patch allows us to declare a "default queue" from
SOC specific code. If it is not declared then the EDMA
driver assumes a default of queue 1.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:49 +03:00
Sandeep Paulraj 10eef5a8a0 DaVinci: EDMA: Add queue 2 and 3 for DM365 and DM6467
DM365 and DM6467 have 4 queues. The patch updates the
'dma_event_q' enum to reflect this.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:48 +03:00
Kevin Hilman 61aa07328d davinci: audio clocks: use struct device instead of clock names
There is no need to pass clock name strings in platform_data.
Instead, setup clkdev nodes to have correct ASoC device names.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:47 +03:00
Hemant Pedanekar 548197bdf0 davinci: dm646x-evm: Add support for IDE
Controls ATA_RSTn and ATA_PWD through CPLD register 0 to enable ATA. An I2C
driver is added for the same. Calls ide init if enabled in configuration.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:47 +03:00
Sudhakar Rajashekhara 5a4b131508 davinci: Add EMAC support for da850/omap-l138
Ethernet Media Access Controller (EMAC) on da850/omap-l138
supports 10/100 Mbps operation. It also supports Media
Independent Interface (MII) and Reduced Media Independent
Interface (RMII) to physical layer (PHY).

Phy which supports MII is present on the DA850/OMAP-L138
base board and Phy supporting RMII is present on the
UI card. This patch adds support only for the MII Phy.
Support for RMII Phy will be added later.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:45 +03:00
Sudhakar Rajashekhara 0fbc559215 davinci: Add support for DA850/OMAP-L138 EVM board
Add support for the DA850/OMAP-L138 Evaluation Module (EVM)
from TI.  The EVM has User Interface (UI) card which contains
various devices. This UI card can be connected to the base
board. Support for all the devices on the UI card and ones on
the EVM will be added in subsequent patches.

The EVM schematics are not available publicly yet; but should
be available soon.

A new defconfig for this board has been added mainly because
the DA830/OMAP-L137 defconfig forces writethrough cache mode
which is not required on DA850/OMAP-L138.

This patch has been boot tested on DA850/OMAP-L138 EVM
using ramdisk as filesystem.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:45 +03:00
Sudhakar Rajashekhara e1a8d7e2ea davinci: Add base DA850/OMAP-L138 SoC support
The DA850/OMAP-L138 is a new SoC from TI in the same family as
DA830/OMAP-L137.

Major changes include better support for power management,
support for SATA devices and McBSP (same IP as DM644x).

DA850/OMAP-L138 documents are available at
http://focus.ti.com/docs/prod/folders/print/omap-l138.html.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:44 +03:00
Sergei Shtylyov efd911814e davinci: DM646x: pass correct MUSB IRQs
DM646x has MUSB connected to IRQs 13 and 14 (unlike IRQ12 on other platforms),
so pass the correct IRQ resources with the platform device.

Signed-off-by: Dmitry Krivoschekov <dkrivoschekov@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 11:55:38 +03:00
Sudhakar Rajashekhara c96b56c53f davinci: Rearrange the da830/omap-l137 macros and functions
Rearrange the PINMUX macros and pinmux_setup function which
are common between da830/omap-l137 and da850/omap-l138.

Also, replace the da830 string in function names to da8xx.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:02 +03:00
Sudhakar Rajashekhara 2259bbd460 davinci: Pass proper EDMA CC interrupt number for DA830/OMAP-L137
In EDMA resource structure, instead of passing EDMA CC
interrupt, EDMA TC error interrupt number is being passed.

Before the patch:
	root@arago:~# cat /proc/interrupts
	           CPU0
	 12:          0     cp_intc  edma_error
	 13:          0     cp_intc  edma
	Err:

After the patch:
	root@arago:~# cat /proc/interrupts
	           CPU0
	 11:          0     cp_intc  edma
	 12:          0     cp_intc  edma_error
	Err:

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:02 +03:00
Rajashekhara, Sudhakar bea238f65c davinci: Move the da830/omap-l137 #defines to header file
With the introduction of TI da850/omap-l138, some of the macros
defined for da830/omap-l137 will be needed in da850 source file.
So, move the common macros to da8xx.h header file.

Also, modify the macro names from DA830_... to DA8XX_.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:02 +03:00
Hemant Pedanekar 1c92a554fc davinci: dm646x: Add IDE setup
This patch adds platform data and init function for IDE which could be called
from board specific file to register IDE device.

Note that for 594MHz device the transfer mode is limited to UDMA4 since ideclk
rate is less than 100 MHz, which forces udma_mask in palm_bk3710.c to UDMA4,
while for 729MHz device, it is UDMA5.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:02 +03:00
Sekhar Nori 6077d26532 davinci: make arch_idle and arch_reset as inline functions
Make arch_idle and arch_reset inline as inline function.

Not having them inline leads to a warning of this sort when only
one of these functions is used:

arch/arm/mach-davinci/include/mach/system.h:24: warning: 'arch_reset' \
defined but not used

boot, re-boot tested on OMAP-L138 EVM

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:01 +03:00
Kevin Hilman baf09a4cd0 davinci: da830: updates for mach-type name change
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:01 +03:00
Hemant Pedanekar 9eb7115bcc davinci: Move IO device mapping macros from io.h to hardware.h
This patch takes out IO mapping macros from mach/io.h and puts them in
mach/hardware.h avoiding need to include mach/io.h in various files such as
serial.h, vmalloc.h etc.

The main reason to avoid inclusion of mach/io.h is, when default in/out macros
are overridden by machine specific functions (e.g., in case of PCI I/O), they
result into linker error. An example snippet and error snapshot is listed below.

Following code in mach/io.h:

	#define inl(p)  my_inl()

	static inline unsigned int my_inl(unsigned int addr)
	{
		if (IS_PCI_IO(addr))
			return pci_inl ();
		else
			return le32_to_cpu(__raw_readl(__typesafe_io(addr)));
	}

leads to error:
	LD      arch/arm/boot/compressed/vmlinux
	arch/arm/boot/compressed/misc.o: In function `my_inl':
	misc.c:(.text+0x2744): undefined reference to `pci_inl'
	make[2]: *** [arch/arm/boot/compressed/vmlinux] Error 1

This is because mach/io.h gets included in arch/arm/boot/compressed/misc.c
through mach/serial.h but pci.c file, which defines 'pci_inl' doesn't get built
into compressed vmlinux.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:01 +03:00
Hemant Pedanekar 3e25d5f4fd davinci: dm646x: Add clock info and update mux setup for ATA
This patch adds clock data for IDE and also updates pin mux mask for ATA so as
to disable PCI when ATA is selected.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:01 +03:00
Chaithrika U S 25acf553ae davinci: ASoC: Add the platform devices for ASP
1) Registers the platform devices for ASP on dm355, dm644x and dm646x
   so that the machine driver can probe to get ASP related platform
   data.
2) Move towards definition of the asp clocks using physical name(for
   dm355 and dm644x)
3) Add platform data to board specific files.

Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:00 +03:00
David Brownell 7a36071e79 davinci: dm365 gpio irq support
Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs:

 - Flag DM365 chips as using non-banked GPIO interrupts, using a
   new soc_info field.

 - Replace the gpio_to_irq() mapping logic.  This now uses some
   runtime infrastructure, keyed off that new soc_info field,
   which doesn't handle irq_to_gpio().

 - Provide a new irq_chip ... GPIO IRQs handled directly by AINTC
   still need edge triggering managed by the GPIO controller.

DM365 chips no longer falsely report 104 GPIO IRQs as they boot.

Intelligence about IRQ muxing is missing, so for the moment this
only exposes the first eight DM365 GPIOs, which are never muxed.
The next eight are muxed, half with Ethernet (which uses most of
those pins anyway).

Tested on DM355 (10 unbanked IRQs _or_ 104 banked ones) and also
on DM365 (16 unbanked ones, only 8 made available).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:00 +03:00
Sandeep Paulraj af5dbaef76 davinci: DM365 Updating PINMUX Entries
Patch updates DM365 PINMUX by adding entries for Video, SPI 1 - 4,
PWM 0 - 3.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:57:00 +03:00
Mark A. Greer 8593790d60 davinci: da8xx: Add support for DA830/OMAP-L137 EVM board
Add support for the DA830/OMAP-L137 Evaluation Module (EVM)
from TI.  The EVM has User Interface (UI) and Audio cards
that can be connected which contain various devices.
Support for those devices and ones on the EVM will be
added in subsequent patches.

Additional generalizations for future SoCs in da8xx family done by
Sudhakar Rajashekhara and Sekhar Nori.

Signed-off-by: Steve Chen <schen@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:59 +03:00
Mark A. Greer 55c79a40e3 davinci: da8xx: Add base DA830/OMAP-L137 SoC support
The da830/omap l137 is a new SoC from TI that is similar
to the davinci line.  Since its so similar to davinci,
put the support for the da830 in the same directory as
the davinci code.

There are differences, however.  Some of those differences
prevent support for davinci and da830 platforms to work
in the same kernel binary.  Those differences are:

1) Different physical address for RAM.  This is relevant
   to Makefile.boot addresses and PHYS_OFFSET.  The
   Makefile.boot issue isn't truly a kernel issue but
   it means u-boot won't work with a uImage including
   both architectures.  The PHYS_OFFSET issue is
   addressed by the "Allow for runtime-determined
   PHYS_OFFSET" patch by Lennert Buytenhek but it
   hasn't been accepted yet.

2) Different uart addresses.  This is only an issue
   for the 'addruart' assembly macro when CONFIG_DEBUG_LL
   is enabled.  Since the code in that macro is called
   so early (e.g., by _error_p in kernel/head.S when
   the processor lookup fails), we can't determine what
   platform the kernel is running on at runtime to use
   the correct uart address.

These areas have compile errors intentionally inserted
to indicate to the builder they're doing something wrong.

A new config variable, CONFIG_ARCH_DAVINCI_DMx, is added
to distinguish between a true davinci architecture and
the da830 architecture.

Note that the da830 currently has an issue with writeback
data cache so CONFIG_CPU_DCACHE_WRITETHROUGH should be
enabled when building a da830 kernel.

Additional generalizations for future SoCs in the da8xx family done by
Sudhakar Rajashekhara and Sekhar Nori.

Signed-off-by: Steve Chen <schen@mvista.com>
Signed-off-by: Mikhail Cherkashin <mcherkashin@ru.mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:59 +03:00
David Brownell ff255c6caa davinci: dm365 evm cpld support: leds, card detect, other setup
Add basic support for the CPLD on the DM365 EVM board:

 - Read SW5 to set up NAND and keypad vs (someday) OneNAND
 - Export MMC/SD card detect and writeprotect signals
 - LED support (same layout as on DM355 EVM)
 - Static config for video input:
     * external HD imager precludes MMC1, Ethernet, audio
     * else either tvp5146 (SD/default) or tvp7002 (HD)

The video input could actually be switched around dynamically;
change that if/when that's needed (and after those other video
inputs have driver support).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:59 +03:00
Sandeep Paulraj 37b798da5d davinci: dm365: add NAND support to EVM board
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:59 +03:00
Sandeep Paulraj a45c8ba30b davinci: MMC/SD Support for dm365 EVM
Patch adds support for MMC/SD in the DM365 EVM.
Pinmux for MMC/SD slot 1 on the DM365 EVM is also
configured.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:59 +03:00
Sandeep Paulraj 19ff3bf2e8 davinci: dm365: add MMC/SD support
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:58 +03:00
Sandeep Paulraj 15061b5d02 davinci: dm365: add EDMA support
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:58 +03:00
Sandeep Paulraj 8ed0a9d4e7 davinci: dm365: EMAC support for SoC and dm365 EVM
The patch adds Support for EMAC in the DM365 SOC and
the DM365 EVM board.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:58 +03:00
Sandeep Paulraj 9f51315383 davinci: dm365: add mux entries for EDMA, RTC, EMAC, keypad.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:58 +03:00
Sandeep Paulraj a46e9e403c davinci: Adding DM365 entries to Makefile/Kconfig/defconfig
This patch does the following
1) Adds entries to davinci_all_defconfig for DM365
2) Adds entries to the Makefile for DM365
3) Adds entries for DM365 in the Kconfig

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:58 +03:00
Sandeep Paulraj 37dd009563 davinci: Adding DM365 EVM board support
The patch adds support for Evaluation Module (EVM) board for the dm365
SoC.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:57 +03:00
Sandeep Paulraj fb8fcb8913 davinci: Adding DM365 SOC Support
The patch adds base support for new TI SOC DM365, which s
similar to the dm355.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:57 +03:00
Kevin Hilman 5fcd294df2 davinci: remove watchdog from soc_info
watchdog info is not needed in soc_info, platform_device can
be used directly in core code.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:57 +03:00
David Brownell 1d3bba61f6 davinci: sram warning fix
CC      arch/arm/mach-davinci/sram.o
arch/arm/mach-davinci/sram.c: In function 'sram_init':
arch/arm/mach-davinci/sram.c:63: warning: comparison of distinct pointer types lacks a cast

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:57 +03:00
Kevin Hilman f28f03bba4 davinci: Kconfig: enable EVMs by default when SoCs are enabled
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:57 +03:00
Rajashekhara, Sudhakar 98d0e9fc6b davinci: dm644x: Support for dm644x silicon revision 2.1
JTAG ID for DM644x silicon revision 2.1 has changed. An entry for the new
silicon revision needs to be added to the davinci_id structure. Without
this addition, EVMs with new silicon revision fail to boot the kernel.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:57 +03:00
David Griego a23f7dc82d davinci: Fix watchdog reset code
The davinci reset routine, davinci_watchdog_reset(), sets the
TCR register instead of the TGCR register as it should to put
the WDT into its "Initial State".

It also writes the WDTCR register without the proper WDKEY
which is pointless since the register will be write-protected.

Signed-off-by: David Griego <dgriego@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:56 +03:00
Chaithrika U S 75d0fa70e7 davinci: dm646x: Adds McASP clock
Adds McASP clock support for the two instances of mcasp (mcasp0,mcasp1). This
patch is part of the audio support for dm646x series.

Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:56 +03:00
Sudhakar Rajashekhara 2bcb613a79 davinci: EDMA: add support for dm646x
Enables module clock for DM646x EDMA channel controller and transfer
controller.

Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:56 +03:00
Sudhakar Rajashekhara 60902a2cb1 davinci: EDMA: multiple CCs, channel mapping and API changes
- restructure to support multiple channel controllers by using
  additional struct resources for each CC

- interface changes visible to EDMA clients

  Introduce macros to build IDs from controller and channel number,
  and to extract them. Modify the edma_alloc_slot function to take an
  extra argument for the controller.

  Also update ASoC drivers to use API.  ASoC changes
  Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

- Move queue related mappings to dm<soc>.c

  EDMA in DM355 and DM644x has two transfer controllers while DM646x
  has four transfer controllers. Moving the queue to tc mapping and
  queue priority mapping to dm<soc>.c will be helpful to probe these
  mappings from platform device so that the machine_is_* testing will
  be avoided.

- add channel mapping logic

  Channel mapping logic is introduced in dm646x EDMA. This implies
  that there is no fixed association for a channel number to a
  parameter entry number. In other words, using the DMA channel
  mapping registers (DCHMAPn), a PaRAM entry can be mapped to any
  channel. While in the case of dm644x and dm355 there is a fixed
  mapping between the EDMA channel and Param entry number.

Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Reviewed-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-26 10:56:56 +03:00
Jaswinder Singh Rajput 7a33aed825 ARM: includecheck fix: board-sffsdr.c
fix the following 'make includecheck' warning:

  arch/arm/mach-davinci/board-sffsdr.c: mach/common.h is included more than once.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Philip Balister <philip@opensdr.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-25 17:07:02 +01:00
Jaswinder Singh Rajput 78eacf0b03 ARM: includecheck fix: board-dm646x-evm.c
fix the following 'make includecheck' warning:

  arch/arm/mach-davinci/board-dm646x-evm.c: mach/common.h is included more than once.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-25 17:07:02 +01:00
Jaswinder Singh Rajput 6608168486 ARM: includecheck fix: board-dm644x-evm.c
fix the following 'make includecheck' warning:

  arch/arm/mach-davinci/board-dm644x-evm.c: mach/common.h is included more than once.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-25 17:07:01 +01:00
Jaswinder Singh Rajput 7f25b0ac2d ARM: includecheck fix: board-dm355-leopard.c
fix the following 'make includecheck' warning:

  arch/arm/mach-davinci/board-dm355-leopard.c: mach/common.h is included more than once.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-25 17:07:01 +01:00
Jaswinder Singh Rajput 44e96d4521 ARM: includecheck fix: board-dm355-evm.c
fix the following 'make includecheck' warning:

  arch/arm/mach-davinci/board-dm355-evm.c: mach/common.h is included more than once.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-25 17:07:01 +01:00
Linus Torvalds ac1b7c378e Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (63 commits)
  mtd: OneNAND: Allow setting of boundary information when built as module
  jffs2: leaking jffs2_summary in function jffs2_scan_medium
  mtd: nand: Fix memory leak on txx9ndfmc probe failure.
  mtd: orion_nand: use burst reads with double word accesses
  mtd/nand: s3c6400 support for s3c2410 driver
  [MTD] [NAND] S3C2410: Use DIV_ROUND_UP
  [MTD] [NAND] S3C2410: Deal with unaligned lengths in S3C2440 buffer read/write
  [MTD] [NAND] S3C2410: Allow the machine code to get the BBT table from NAND
  [MTD] [NAND] S3C2410: Added a kerneldoc for s3c2410_nand_set
  mtd: physmap_of: Add multiple regions and concatenation support
  mtd: nand: max_retries off by one in mxc_nand
  mtd: nand: s3c2410_nand_setrate(): use correct macros for 2412/2440
  mtd: onenand: add bbt_wait & unlock_all as replaceable for some platform
  mtd: Flex-OneNAND support
  mtd: nand: add OMAP2/OMAP3 NAND driver
  mtd: maps: Blackfin async: fix memory leaks in probe/remove funcs
  mtd: uclinux: mark local stuff static
  mtd: uclinux: do not allow to be built as a module
  mtd: uclinux: allow systems to override map addr/size
  mtd: blackfin NFC: fix hang when using NAND on BF527-EZKITs
  ...
2009-06-22 16:56:22 -07:00
David Woodhouse e635a01ea0 Merge branch 'next-mtd' of git://aeryn.fluff.org.uk/bjdooks/linux 2009-06-08 12:21:27 +01:00
David Brownell 6a4123e581 mtd: nand: davinci_nand, 4-bit ECC for smallpage
Minimal support for the 4-bit ECC engine found on DM355, DM365,
DA830/OMAP-L137, and similar recent DaVinci-family chips.

This is limited to small-page flash for now; there are some page
layout issues for large page chips.  Note that most boards using
this engine (like the DM355 EVM) include 2GiB large page chips.

Sanity tested on DM355 EVM after swapping the socketed NAND for
a small-page one.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-06-05 17:39:36 +01:00
Russell King a22f277bba [ARM] Kconfig: remove 'default n'
Kconfig entries default to n, so there's no need for this to be
explicitly specified.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-31 15:12:25 +01:00
Kevin Hilman b0958aed1e [ARM] 5529/1: davinci: MMC platform support: DMA_32BIT_MASK --> DMA_BIT_MASK(32)
Some DMA_32BIT_MASK usage snuck in with the MMC platform support.
Convert these to the new preferred DMA_BIT_MASK(32).

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-29 19:59:13 +01:00
David Brownell 20e9969b3a davinci: add SRAM allocator
Provide a generic SRAM allocator using genalloc, and vaguely
modeled after what AVR32 uses.  This builds on top of the
static CPU mapping set up in the previous patch, and returns
DMA mappings as requested (if possible).

Compared to its OMAP cousin, there's no current support for
(currently non-existent) DaVinci power management code running
in SRAM; and this has ways to deallocate, instead of being
allocate-only.

The initial user of this should probably be the audio code,
because EDMA from DDR is subject to various dropouts on at
least DM355 and DM6446 chips.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:18:13 -07:00
David Brownell 0d04eb4705 davinci: soc-specific SRAM setup
Package on-chip SRAM.  It's always accessible from the ARM, so
set up a standardized virtual address mapping into a 128 KiB
area that's reserved for platform use.

In some cases (dm6467) the physical addresses used for EDMA are
not the same as the ones used by the ARM ... so record that info
separately in the SOC data, for chips (unlike the OMAP-L137)
where SRAM may be used with EDMA.

Other blocks of SRAM, such as the ETB buffer or DSP L1/L2 RAM,
may be unused/available on some system.  They are ignored here.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:18:12 -07:00
David Brownell b79dbdefd2 davinci: remove remnants of IRAM allocator
Remove remnants of dm6446-specific SRAM allocator, as preparation for
a more generic replacement.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:18:12 -07:00
Kevin Hilman 96ed299fdb davinci: cleanup: move dm355 UART2 define to dm355.c
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:49 -07:00
Mark A. Greer 5570078c0e davinci: Move PINMUX defines to SoC files
Different SoC have different numbers of pinmux registers and other
resources that overlap with each other.  To clean up the code and
eliminate defines that overlap with each other, move the PINMUX
defines to the SoC specific files.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:48 -07:00
Mark A. Greer 3abd5acfff davinci: Add compare register support to timer code
The Timer64p timer has 8 compare registers that can
be used to generate interrupts when the timer value
matches the compare reg's value.  They do not disturb
the timer itself.  This can be useful when there is
only one timer available for both clock events and
clocksource.

When enabled, the clocksource remains a continuous
32-bit counter but the clock event will no longer
support periodic interrupts.  Instead only oneshot
timers will be supported and implemented by setting
the compare register to the current timer value plus
the period that the clock event subsystem is requesting.

Compare registers support is enabled automatically
when the following conditions are met:
1) The same timer is being used for clock events
   and clocksource.
2) The timer is the bottom half (32 bits) of the
   64-bit timer (hardware limitation).
3) The the compare register offset and irq are
   not zero.

Since the timer is always running, there is a hardware
race in timer32_config() between reading the current
timer value, and adding the period to the current
timer value and writing the compare register.
Testing on a da830 evm board with the timer clocked
at 24 MHz and the processor clocked at 300 MHz,
showed the number of counter ticks to do this ranged
from 20-53 (~1-2.2 usecs) but usually around 41 ticks.
This includes some artifacts from collecting the
information.  So, the minimum period should be
at least 5 usecs to be safe.

There is also an non-critical lower limit that
the period should be since there is no point in
setting an event that is much shorter than the
time it takes to set the event, and get & handle
the timer interrupt for that event.  There can
also be all sorts of delays from activities
occuring elsewhere in the system (including
hardware activitis like cache & TLB management).
These are virtually impossible to quantify so a
minimum period of 50 usecs was chosen.  That will
certianly be enough to avoid the actual hardware
race but hopefully not large enough to cause
unreasonably course-grained timers.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:48 -07:00
Mark A. Greer 0b0c4c2a69 davinci: Integrate cp_intc support into low-level irq code
Integrate the Common Platform Interrupt Controller (cp_intc)
support into the low-level irq handling for davinci and similar
platforms.  Do it such that support for cp_intc and the original
aintc can coexist in the same kernel binary.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:47 -07:00
Mark A. Greer b14dc0f994 davinci: Factor out emac mac address handling
Factor out the code to extract that mac address from
i2c eeprom.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:47 -07:00
Mark A. Greer c97909fcf1 davinci: Remove unused i2c eeprom_read/write routines
The dm644x and dm646x board files have i2c eeprom read and
write routines but they are not used so remove them.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:46 -07:00
Mark A. Greer 972412b648 davinci: Move emac platform_data to SoC-specific files
Since most of the emac platform_data is really SoC specific
and not board specific, move it to the SoC-specific files.
Put a pointer to the platform_data in the soc_info structure
so the board-specific code can set some of the platform_data
if it needs to.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:45 -07:00
Mark A. Greer 65e866a974 davinci: Move serial platform_device into SoC-specific files
Currently, there is one set of platform_device and platform_data
structures for all DaVinci SoCs.  The differences in the data
between the various SoCs is handled by davinci_serial_init()
by checking the SoC type.  However, as new SoCs appear, this
routine will become more & more cluttered.

To clean up the routine and make it easier to add support for new
SoCs, move the platform_device and platform_data structures into the
SoC-specific code and use the SoC infrastructure to provide access
to the data.

In the process, fix a bug where the wrong irq is used for uart2
of the dm646x.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:17:41 -07:00
Mark A. Greer a994955cc0 davinci: Make GPIO code more generic
The current gpio code needs to know the number of
gpio irqs there are and what the bank irq number is.
To determine those values, it checks the SoC type.

It also assumes that the base address and the number
of irqs the interrupt controller uses is fixed.

To clean up the SoC checks and make it support
different base addresses and interrupt controllers,
have the SoC-specific code set those values in
the soc_info structure and have the gpio code
reference them there.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28 15:16:30 -07:00
Mark A. Greer 951d6f6d70 davinci: Add watchdog base address flexibility
The watchdog code currently hardcodes the base address
of the timer its using.  To support new SoCs, make it
support timers at any address.  Use the soc_info structure
to do this.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:20:31 -07:00
Mark A. Greer f64691b3ab davinci: Add base address and timer flexibility
The davinci timer code currently hardcodes the timer register
base addresses, the timer irq numbers, and the timers to use
for clock events and clocksource.  This won't work for some
a new SoC so put those values into the soc_info structure
and set them up in the SoC-specific files.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:19:04 -07:00
Mark A. Greer 673dd36f0d davinci: Move interrupt ctlr info to SoC infrastructure
Use the SoC infrastructure to hold the interrupt controller
information (i.e., base address, default priorities,
interrupt controller type, and the number of IRQs).

The interrupt controller base, although initially put
in the soc_info structure's intc_base field, is eventually
put in the global 'davinci_intc_base' so the low-level
interrupt code can access it without a dereference.

These changes enable the SoC default irq priorities to be
put in the SoC-specific files, and the interrupt controller
to be at any base address.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:18:09 -07:00
Mark A. Greer 0e585952ac davinci: Move pinmux setup info to SoC infrastructure
The pinmux register base and setup can be different for different
SoCs so move the pinmux reg base, pinmux table (and its size) to
the SoC infrastructure.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:17:16 -07:00
Mark A. Greer d81d188caf davinci: Add support for multiple PSCs
The current code to support the DaVinci Power and Sleep Controller (PSC)
assumes that there is only one controller.  This assumption is no longer
valid so expand the support to allow greater than one PSC.

To accomplish this, put the base addresses for the PSCs in the SoC
infrastructure so it can be referenced by the PSC code.  This also
requires adding an extra parameter to davinci_psc_config() to specify
the PSC that is to be enabled/disabled.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:16:46 -07:00
Mark A. Greer 66e0c3991c davinci: Add clock init call to common init routine
All of the davinci SoCs need to call davinci_clk_init() so
put the call in the common init routine.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:14:59 -07:00
Mark A. Greer b9ab12797e davinci: Support JTAG ID register at any address
The Davinci cpu_is_davinci_*() macros use the SoC part number
and variant retrieved from the JTAG ID register to determine the
type of cpu that the kernel is running on.  Currently, the code to
read the JTAG ID register assumes that the register is always at
the same base address.  This isn't true on some newer SoCs.

To solve this, have the SoC-specific code set the JTAG ID register
base address in soc_info structure and add a 'cpu_id' member to it.
'cpu_id' will be used by the cpu_is_davinci_*() macros to match
the cpu id.  Also move the info used to identify the cpu type into
the SoC-specific code to keep all SoC-specific code together.

The common code will read the JTAG ID register, search through
an array of davinci_id structures to identify the cpu type.
Once identified, it will set the 'cpu_id' member of the soc_info
structure to the proper value and the cpu_is_davinci_*() macros
will now work.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:14:56 -07:00
Mark A. Greer 79c3c0b729 davinci: Encapsulate SoC-specific data in a structure
Create a structure to encapsulate SoC-specific information.
This will assist in generalizing code so it can be used by
different SoCs that have similar hardware but with minor
differences such as having a different base address.

The idea is that the code for each SoC fills out a structure
with the correct information.  The board-specific code then
calls the SoC init routine which in turn will call a common
init routine that makes a copy of the structure, maps in I/O
regions, etc.

After initialization, code can get a pointer to the structure
by calling davinci_get_soc_info().  Eventually, the common
init routine will make a copy of all of the data pointed to
by the structure so the original data can be made __init_data.
That way the data for SoC's that aren't being used won't consume
memory for the entire life of the kernel.

The structure will be extended in subsequent patches but
initially, it holds the map_desc structure for any I/O
regions the SoC/board wants statically mapped.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 08:14:04 -07:00
Kevin Hilman ac7b75b5bb davinci: EMAC platform support
Add SoC and platform-specific data and init for DaVinci EMAC network
driver.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:16 -07:00
Kevin Hilman 2dbf56aeb7 davinci: MMC platform support
Add SoC and platform-specific data and init for MMC driver.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:16 -07:00
Kevin Hilman e38d92fdcd davinci: DM646x: add base SoC and board support
Add support for DM646x SoC (a.k.a DaVinci HD) and its Evalution
Module (EVM.)

Original support done by Sudhakar Rajashekhara.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:15 -07:00
Kevin Hilman 95a3477fe5 davinci: DM355: add base SoC and board support
In addition, add board support for the DM355 Evaluation Module (EVM)
and the DM355 Leopard board.

Original DM355 EVM support done by Sandeep Paulraj, with significant
updates and improvements by David Brownell.  DM355 Leopord support
done by Koen Kooi.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Koen Kooi <koen@beagleboard.org>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:15 -07:00
Hugo Villeneuve f5ce6a67a7 davinci: DM644x: add support for SFFSDR board
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:15 -07:00
Kevin Hilman fb6313879c davinci: add platform support for watchdog timer
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:15 -07:00
Sergei Shtylyov 0521444d49 davinci: INTC: add support for TI cp_intc
Add support for Texas Instuments Common Platform Interrupt Controller
(cp_intc) used on DA830/OMAP-L137.

Signed-off-by: Steve Chen <schen@mvista.com>
Signed-off-by: Mark Greer <mgreer@mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:14 -07:00
Mark A. Greer 27428e39da davinci: support different UART bases for zImage uncompress
The davinci pre-kernel boot code assumes that all platforms use the
same UART base address for the console.  That assumption is not longer
valid with some newer SoCs so determine the console UART base address
from the machine number passed in from bootloader.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:14 -07:00
Troy Kisky ce8ccaf0ef davinci: interrupts: get_irqnr_and_base: save an instruction
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:14 -07:00
Chaithrika U S 17eb157041 davinci: use 32-bit accesses for low-level debug macros
This patch defines debug macros for low-level debugging for Davinci
based platforms

Tested on :
        - DM644x DaVinci EVM
        - DM646X DaVinciHD EVM
	- DM355 EVM

This patch attempts to solve the low-level debug issue in DM646x. The
UART on DM646x SoC allows only 32-bit access. The existing
debug-macro.S uses the macros from debug-8250.S file. This led to
garbage serial out in the case of DM646x.

The inclusion of debug-8250.S does not allow for run time fix for this
issue.  There are compile time errors due to multiple definitions of
the macros.  Also when building a single image for multiple DaVinci
Platforms, the ifdefs cannot be relied upon.

The solution below does not include the debug-8250.S file and defines
the necessary macros. This solution was arrived at after observing
that word access does not affect the low-level debug messages on
DM644x/DM355.

The other approach to this issue is to use the UART module information
available in the peripheral registers to decide the access
mechanism. But this will have to be done for every access of UART
specifically for DM646x. Also this calls for a modification of the
debug-8250.S file.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:18:14 -07:00
Kevin Hilman dc75602628 davinci: fixups for banked GPIO interrupt handling
This patch seems to get me much more reliable performance using the
GPIO banked interrupts on dm355 for the dm9000 driver.

Changes include:

- init GPIO handling along with normal GPIO init
- mask the level-sensitive bank IRQ during handling

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:17:54 -07:00
David Brownell df4aab46a8 davinci: gpio irq enable tweaks
Fix two IRQ triggering bugs affecting GPIO IRQs:

 - Make sure enabling with IRQ_TYPE_NONE ("default, unspecified")
   isn't a NOP ... default to both edges, at least one must work.

 - As noted by Kevin Hilman, setting the irq trigger type for a
   banked gpio interrupt shouldn't enable irqs that are disabled.

Since GPIO IRQs haven't been used much yet, it's not clear these
bugs could have affected anything.  The few current users don't
seem to have been obviously suffering from these issues.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-26 07:17:54 -07:00
Takashi Iwai 60befb97f5 Merge branch 'fix/asoc' into for-linus
* fix/asoc:
  ASoC: DaVinci EVM board support buildfixes
  ASoC: DaVinci I2S updates
  ASoC: davinci-pcm buildfixes
  pxa2xx-ac97: fix reset gpio mode setting
  ASoC: soc-core: fix crash when removing not instantiated card
2009-05-15 15:38:26 +02:00
David Brownell f492ec9f02 ASoC: DaVinci EVM board support buildfixes
This is a build fix, resyncing the DaVinci EVM ASoC board code
with the version in the DaVinci tree.  That resync includes
support for the DM355 EVM, although that board isn't yet in
mainline.

(NOTE:  also includes a bugfix to the platform_add_resources
call, recently sent by Chaithrika U S <chaithrika@ti.com> but
not yet merged into the DaVinci tree.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-05-15 08:59:07 +01:00
Kevin Hilman a029b706d3 [ARM] 5506/1: davinci: DMA_32BIT_MASK --> DMA_BIT_MASK(32)
As per commit 284901a90a, use
DMA_BIT_MASK(n)

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-07 14:44:47 +01:00
David Brownell 3e9c18e1dc davinci: DM644x: NAND: update partitioning
Update NAND partitioning for the dm6446 evm, unmasking the hidden
data at the beginning and letting the kernel be updated from Linux.

 - This is boot-compatible with TI's software (U-Boot 1.20 and both
   the 2.6.10 and 2.6.18 kernels), in terms of startup and loading
   kernels from flash.

 - In the same way, it's also boot-compatible with mainline U-Boot,
   which stores U-Boot params in block 0 not block 16.

 - It's not quite compatible with systems that previously used NAND
   partitions to hold (filesystem) data.  The compatibilities are a
   bit different based on which kernel was used previously
     + Users of TI/MV kernels no longer see mtd2 "params"
       (mainline u-boot env is in a different place)
	* Filesystem is now mtd2 ... vs mtd3
     + Users of GIT kernels now see mtd0 and mtd1 partitions
	* Filesystem partition starts 640 KBytes earlier
	* Filesystem is now mtd2 ... vs mtd0
     * Linux now *uses* the flash-resident BBT
	* Removes annoying slowdown/hiccup during boot
	* Potentially ~64KB less space available with TI/MV kernels

If you *used* NAND partitions from Linux, there is no solution that's
fully compatible with all previous kernels in those respects ... ergo
this "best compromise".  It'd be good to back back up the filesystem
data; or, carry your own backwards-compatibility patch for awhile.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:50:18 -07:00
Kevin Hilman d0e47fba05 davinci: update DM644x support in preparation for more SoCs
Rework DM644x code into SoC specific and board specific parts.
This is also to generalize the structure a bit so it's easier to add
support for new SoCs in the DaVinci family.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:50:11 -07:00
Kevin Hilman 73d3c68f09 davinci: DM644x: rename board file
Rename DM6446 EVM board file, no functional changes.  Code is updated
and reworked in following patch.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:46 -07:00
Kevin Hilman 5526b3f7e3 davinci: update pin-multiplexing support
Update MUX support to be more general and useful across multiple
SoCs in the DaVinci family.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:46 -07:00
Kevin Hilman 617b925f94 davinci: serial: generalize for more SoCs
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:45 -07:00
s-paulraj@ti.com f9337405b2 davinci: DM355 IRQ Definitions
Adding IRQ defintions for DaVinci DM355 and default interrupt
priorities for DM355

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:44 -07:00
Sudhakar Rajashekhara 9e16469c83 davinci: DM646x: add interrupt number and priorities
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:44 -07:00
Mark A. Greer fe277d9bbb davinci: PSC: Clear bits in MDCTL reg before setting new bits
Clear any set bits in the 'NEXT' field of the MDCTL register in the
Power and Sleep Controller (PSC) before setting any new bits.
This also allows some minor cleanup by removing some no longer
needed lines of code.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:43 -07:00
David Brownell 474dad54ba davinci: gpio bugfixes
Update the DaVinci GPIO code to work better on non-dm6446 parts,
notably the dm355:

 - Only handle the number of GPIOs the chip actually has.  So
   for example on dm6467, GPIO-42 is the last GPIO, and trying
   to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446.

 - Enable GPIO interrupts on each 16-bit GPIO-irq bank ...
   previously, only the first five were enabled, so GPIO-80
   and above (on dm355) wouldn't trigger IRQs.

 - Use the right IRQ for each GPIO bank.  The wrong values were
   used for dm355 chips, so GPIO IRQs got routed incorrectly.

 - Handle up to four pairs of 16-bit GPIO banks ... previously
   only three were handled, so accessing GPIO-96 and up (e.g. on
   dm355) would oops.

 - Update several comments that were dm6446-specific.

Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs
on the DM355 EVM.

One thing this doesn't do is handle the way some of the GPIO
numbers on dm6467 are reserved but aren't valid as GPIOs.  Some
bitmap logic could fix that if needed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:43 -07:00
Kevin Hilman a4768d2275 davinci: add EDMA driver
Original code for 2.6.10 and 2.6.28 series done by Texas Instruments
and MontaVista, but major updates and rework done by Troy Kisky and
David Brownell.

Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:42 -07:00
Kevin Hilman e60990023c davinci: timers: use clk_get_rate()
Use clock framework instead of hard-coded CLOCK_TICK_RATE for
determining timer tick frequencies.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27 09:49:36 -07:00
Kevin Hilman f5c122da54 davinci: add arch_ioremap() which uses existing static mappings
Add arch-specific ioremap() which uses any existing static mappings in
place of doing a new mapping.  From now on, drivers should always use
ioremap() instead of IO_ADDRESS().

In addition, remove the davinci_[read|write]* macros in favor of using
ioremap.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-23 09:31:09 -07:00
Kevin Hilman c5b736d093 davinci: major rework of clock, PLL, PSC infrastructure
This is a significant rework of the low-level clock, PLL and Power
Sleep Controller (PSC) implementation for the DaVinci family.  The
primary goal is to have better modeling if the hardware clocks and
features with the aim of DVFS functionality.

Highlights:
- model PLLs and all PLL-derived clocks
- model parent/child relationships of PLLs and clocks
- convert to new clkdev layer
- view clock frequency and refcount via /proc/davinci_clocks

Special thanks to significant contributions and testing by David
Brownell.

Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-23 09:31:00 -07:00
Kevin Hilman e653034e66 davinci: add runtime CPU detection support
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-23 09:27:59 -07:00
Magnus Damm 8e19608e8b clocksource: pass clocksource to read() callback
Pass clocksource pointer to the read() callback for clocksources.  This
allows us to share the callback between multiple instances.

[hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods]
[akpm@linux-foundation.org: cleanup]
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-21 13:41:47 -07:00
Yang Hongyang 284901a90a dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)

Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:11 -07:00
Linus Torvalds 22ae77bc7a Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (53 commits)
  [MTD] struct device - replace bus_id with dev_name(), dev_set_name()
  [MTD] [NOR] Fixup for Numonyx M29W128 chips
  [MTD] mtdpart: Make ecc_stats more realistic.
  powerpc/85xx: TQM8548: Update DTS file for multi-chip support
  powerpc: NAND: FSL UPM: document new bindings
  [MTD] [NAND] FSL-UPM: Add wait flags to support board/chip specific delays
  [MTD] [NAND] FSL-UPM: add multi chip support
  [MTD] [NOR] Add device parent info to physmap_of
  [MTD] [NAND] Add support for NAND on the Socrates board
  [MTD] [NAND] Add support for 4KiB pages.
  [MTD] sysfs support should not depend on CONFIG_PROC_FS
  [MTD] [NAND] Add parent info for CAFÉ controller
  [MTD] support driver model updates
  [MTD] driver model updates (part 2)
  [MTD] driver model updates
  [MTD] [NAND] move gen_nand's probe function to .devinit.text
  [MTD] [MAPS] move sa1100 flash's probe function to .devinit.text
  [MTD] fix use after free in register_mtd_blktrans
  [MTD] [MAPS] Drop now unused sharpsl-flash map
  [MTD] ofpart: Check name property to determine partition nodes.
  ...

Manually fix trivial conflict in drivers/mtd/maps/Makefile
2009-04-06 14:56:26 -07:00
David Brownell ff4569c752 [MTD] [NAND] davinci_nand driver
This is a device driver for the NAND flash controller found on the various
DaVinci family chips.  It handles up to four SoC chipselects, and some
flavors of secondary chipselect (e.g.  based on upper bits of the address
bus) as used with some multichip packages.  (Including the 2 GiB chips
used on some TI devel boards.)

The 1-bit ECC hardware is supported (3 bytes ECC per 512 bytes data); but
not yet the newer 4-bit ECC (10 bytes ECC per 512 bytes data), as
available on chips like the DM355 or OMAP-L137 and needed with the more
error-prone MLC NAND chips.

This is a cleaned-up version of code that's been in use for several years
now; sanity checked with the new drivers/mtd/tests.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-03-20 12:32:19 +00:00
Russell King be093beb60 [ARM] pass reboot command line to arch_reset()
OMAP wishes to pass state to the boot loader upon reboot in order to
instruct it whether to wait for USB-based reflashing or not.  There is
already a facility to do this via the reboot() syscall, except we ignore
the string passed to machine_restart().

This patch fixes things to pass this string to arch_reset().  This means
that we keep the reboot mode limited to telling the kernel _how_ to
perform the reboot which should be independent of what we request the
boot loader to do.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-03-19 16:20:24 +00:00
David Brownell 34f32c9701 usb: musb: make Davinci *work* in mainline
Now that the musb build fixes for DaVinci got merged (RC3?), kick in
the other bits needed to get it finally *working* in mainline:

 - Use clk_enable()/clk_disable() ... the "always enable USB clocks"
   code this originally relied on has since been removed.

 - Initialize the USB device only after the relevant I2C GPIOs are
   available, so the host side can properly enable VBUS.

 - Tweak init sequencing to cope with mainline's relatively late init
   of the I2C system bus for power switches, transceivers, and so on.

Sanity tested on DM6664 EVM for host and peripheral modes; that system
won't boot with CONFIG_PM enabled, so OTG can't yet be tested.  Also
verified on OMAP3.

(Unrelated:  correct the MODULE_PARM_DESC spelling of musb_debug.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Felipe Balbi <me@felipebalbi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-02-27 14:40:51 -08:00
David Brownell 37daa925cf USB: musb_hdrc: another davinci buildfix (otg related)
The DaVinci code had an implementation of the OTG transceiver glue
too; make it use the new-standard one.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-01-27 16:15:32 -08:00
David Brownell d0e58ae76c [ARM] 5368/1: arch/arm/mach-davinci/usb.c buildfix
From: David Brownell <dbrownell@users.sourceforge.net>
Subject: ARM/mach-davinci/usb.c buildfix

  CC      arch/arm/mach-davinci/usb.o
arch/arm/mach-davinci/usb.c:60: error: 'IRQ_USBINT' undeclared here (not in a function)
make[1]: *** [arch/arm/mach-davinci/usb.o] Error 1

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-24 11:41:18 +00:00
Russell King 80b02c172b [ARM] fix AT91, davinci, h720x, ks8695, msm, mx2, mx3, netx, omap1, omap2, pxa, s3c
arch/arm/mach-at91/at91cap9.c:337: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91rm9200.c:301: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9260.c:351: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9261.c:287: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9263.c:312: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9rl.c:304: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-h720x/h7202-eval.c:38: error: implicit declaration of function 'IRQ_CHAINED_GPIOB'
arch/arm/mach-ks8695/devices.c:46: error: 'KS8695_IRQ_WAN_RX_STATUS' undeclared here (not in a function)
arch/arm/mach-msm/devices.c:28: error: 'INT_UART1' undeclared here (not in a function)
arch/arm/mach-mx2/devices.c:233: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-mx3/devices.c:128: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:140: error: 'INT_730_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:165: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:200: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap2/board-apollon.c:286: error: implicit declaration of function 'omap_set_gpio_direction'
arch/arm/mach-omap2/mcbsp.c:154: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-omap2/mcbsp.c:181: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-pxa/e350.c:36: error: 'IRQ_BOARD_START' undeclared here (not in a function)
arch/arm/plat-s3c/dev-i2c0.c:32: error: 'IRQ_IIC' undeclared here (not in a function)
...

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 16:29:42 +00:00
Linus Torvalds b840d79631 Merge branch 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits)
  x86: export vector_used_by_percpu_irq
  x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and()
  sched: nominate preferred wakeup cpu, fix
  x86: fix lguest used_vectors breakage, -v2
  x86: fix warning in arch/x86/kernel/io_apic.c
  sched: fix warning in kernel/sched.c
  sched: move test_sd_parent() to an SMP section of sched.h
  sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0
  sched: activate active load balancing in new idle cpus
  sched: bias task wakeups to preferred semi-idle packages
  sched: nominate preferred wakeup cpu
  sched: favour lower logical cpu number for sched_mc balance
  sched: framework for sched_mc/smt_power_savings=N
  sched: convert BALANCE_FOR_xx_POWER to inline functions
  x86: use possible_cpus=NUM to extend the possible cpus allowed
  x86: fix cpu_mask_to_apicid_and to include cpu_online_mask
  x86: update io_apic.c to the new cpumask code
  x86: Introduce topology_core_cpumask()/topology_thread_cpumask()
  x86: xen: use smp_call_function_many()
  x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c
  ...

Fixed up trivial conflict in kernel/time/tick-sched.c manually
2009-01-02 11:44:09 -08:00
Rusty Russell 320ab2b0b1 cpumask: convert struct clock_event_device to cpumask pointers.
Impact: change calling convention of existing clock_event APIs

struct clock_event_timer's cpumask field gets changed to take pointer,
as does the ->broadcast function.

Another single-patch change.  For safety, we BUG_ON() in
clockevents_register_device() if it's not set.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Ingo Molnar <mingo@elte.hu>
2008-12-13 21:20:26 +10:30
Russell King b593c278b7 [ARM] davinci: asm/memory.h is not required for mach/vmalloc.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-30 14:42:43 +00:00
Russell King 3719ec5077 [ARM] Ensure that both MAX_DMA_ADDRESS and ISA_DMA_THRESHOLD are defined
Both of these symbols should be defined by a platform, or neither
should be defined.  Ensure that all platforms conform.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-30 13:26:47 +00:00
Russell King 0560cf5aa5 [ARM] Add a common typesafe __io implementation
As Al did for Versatile in 2ad4f86b60,
add a typesafe __io implementation for platforms to use.  Convert
platforms to use this new simple typesafe implementation.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-30 11:45:54 +00:00
Russell King dcea83adc6 [ARM] Hide ISA DMA API when ISA_DMA_API is unset
When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.

This allows us to remove a lot of mach/dma.h files which don't contain
any useful code.  Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-29 18:42:40 +00:00
Russell King b9c78022b0 [ARM] move MAX_DMA_ADDRESS to mach/memory.h
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h,
thereby placing it along side its relative, ISA_DMA_THRESHOLD.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-29 10:50:22 +00:00
Nicolas Pitre b5ee900258 [ARM] remove a common set of __virt_to_bus definitions
Let's provide an overridable default instead of having every machine
class define __virt_to_bus and __bus_to_virt to the same thing.  What
most platforms are using is bus_addr == phys_addr so such is the default.

One exception is ebsa110 which has no DMA what so ever, so the actual
definition is not important except only for proper compilation.  Also
added a comment about the special footbridge bus translation.

Let's also remove comments alluding to set_dma_addr which is not
(and should not) be commonly used.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-28 15:36:49 +00:00
Linus Torvalds 7cc4e87f91 Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits)
  [ARM] 5300/1: fixup spitz reset during boot
  [ARM] 5295/1: make ZONE_DMA optional
  [ARM] 5239/1: Palm Zire 72 power management support
  [ARM] 5298/1: Drop desc_handle_irq()
  [ARM] 5297/1: [KS8695] Fix two compile-time warnings
  [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores.
  [ARM] pxa: allow multi-machine PCMCIA builds
  [ARM] pxa: add preliminary CPUFREQ support for PXA3xx
  [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h
  [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c
  [ARM] pxa/zylonite: add support for USB OHCI
  [ARM] ohci-pxa27x: use ioremap() and offset for register access
  [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph()
  [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource
  [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver
  [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers
  [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c
  [ARM] pxa: simplify DMA register definitions
  [ARM] pxa: make additional DCSR bits valid for PXA3xx
  [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c
  ...

Fixed up conflicts in
	arch/arm/mach-versatile/core.c
	sound/soc/pxa/pxa2xx-ac97.c
	sound/soc/pxa/pxa2xx-i2s.c
manually.
2008-10-11 10:09:45 -07:00
Russell King c97f68145e Merge branch 'for-rmk' of git://source.mvista.com/git/linux-davinci-2.6.git
Merge branch 'davinci' into devel
2008-10-09 21:33:05 +01:00
Russell King 3f30a09a61 Merge branch 'pxa-all' into devel
Conflicts:

	arch/arm/mach-pxa/Kconfig
	arch/arm/mach-pxa/corgi.c
	arch/arm/mach-pxa/include/mach/hardware.h
	arch/arm/mach-pxa/spitz.c
2008-10-09 21:33:02 +01:00
Dmitry Baryshkov d8aa0251f1 [ARM] 5298/1: Drop desc_handle_irq()
desc_handle_irq() was declared as obsolete since long ago.
Replace it with generic_handle_irq()

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-09 15:00:36 +01:00
roelkluin 380b0fdfd0 [ARM] 5249/1: davinci: remove redundant check in davinci_psc_config()
id is unsigned, check is redundant.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-17 20:57:04 +01:00
David Brownell 7bff3c4ce4 ARM: DaVinci: evm sets up many devices
Update DaVinci EVM board setup to work with key drivers which are
now in mainline kernels:

 - I2C adapter (driver: i2c_davinci)
    * three gpio expanders (driver: pcf8574) used for
       - LEDs
       - audio codec control
       - misc device control (including USB VBUS, IDE-vs-CF)
    * at24 (driver: at24) eeprom
 - USB controller (driver: musb_hdrc)
 - IDE controller (driver: palm_bk3710)

This board is the first in-tree client for a number of those drivers,
and adding this board support means the EVM board can be used for some
"real work" ... excepting "DaVinci Technology" video and DSP support
(also available in most OMAP3 chips).

Also renames the flash as "evm_norflash", since NAND may be jumpered.

(Patch contains work by myself, Kevin Hilman, Sergei Shtylyov.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Sergei Shtylyov  <sshtylyov@ru.mvista.com>
2008-09-17 00:31:42 -07:00
David Brownell cece6e5af2 ARM: DaVinci: usb setup
Declare the musb_hdrc platform device for DaVinci.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2008-09-17 00:31:42 -07:00
Komal Shah d395e6ad98 ARM: DaVinci: i2c setup
Davinci I2C initialization infrastructure; will be used by EVM init.

[ dbrownell@users.sourceforge.net: pass platform data into init code ]

Signed-off-by: Komal Shah <komal_shah802003@yahoo.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2008-09-17 00:31:42 -07:00
David Brownell dce1115bc3 ARM: DaVinci: SOC GPIOs use gpiolib
Switch DaVinci SOC gpios over to using the new GPIO library, so it can
access GPIO expanders and other non-SOC GPIOs using the same calls.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2008-09-17 00:31:41 -07:00
Kevin Hilman ac7643e4d3 ARM: DaVinci: Update IO address pointer typechecking
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2008-09-17 00:31:30 -07:00
Russell King fced80c735 [ARM] Convert asm/io.h to linux/io.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-06 12:10:45 +01:00
Russell King a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00
Russell King be50972935 [ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:40:08 +01:00
Denis V. Lunev 40ad35d34f arm: use non-racy method for /proc/davinci_clocks creation
Use proc_create() to make sure that ->proc_fops be setup before gluing PDE to
main tree.

Signed-off-by: Denis V. Lunev <den@openvz.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-04-29 08:06:21 -07:00
Jan Engelhardt 2ffd6e182c [ARM] constify function pointer tables
Signed-off-by: Jan Engelhardt <jengelh@computergmbh.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-02-09 22:46:44 +00:00
Thomas Gleixner 18de5bc4c1 clockevents: fix resume logic
We need to make sure, that the clockevent devices are resumed, before
the tick is resumed. The current resume logic does not guarantee this.

Add CLOCK_EVT_MODE_RESUME and call the set mode functions of the clock
event devices before resuming the tick / oneshot functionality.

Fixup the existing users.

Thanks to Nigel Cunningham for tracking down a long standing thinko,
which affected the jinxed VAIO.

[akpm@linux-foundation.org: xen build fix]
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:15 -07:00
Vladimir Barinov 83f53220f8 [ARM] 4432/5: davinci: pin mux support
Support pin multiplexing configurations driver for TI DaVinci SoC

Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Acked-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 09:57:09 +01:00
Vladimir Barinov 3d9edf09d4 [ARM] 4457/2: davinci: GPIO support
Support GPIO driver for TI DaVinci SoC

Signed-off-by: Vladimir Barinov <vbarino@ru.mvista.com>
Acked-by: David Brownell <david-b@pacbell.net>
Acked-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 09:57:09 +01:00
Vladimir Barinov 3e062b07ad [ARM] 4430/1: davinci: clock control support
Support clock control driver for TI DaVinci SoC

Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 09:57:09 +01:00
Kevin Hilman 7c6337e225 [ARM] 4303/3: base kernel support for TI DaVinci
Add base kernel support for the TI DaVinci platform.

This patch only includes interrupts, timers, CPU identification,
serial support and basic power and sleep controller init.  More
drivers to come.

Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-11 17:26:55 +01:00