Commit Graph

580 Commits

Author SHA1 Message Date
Chunming Zhou 3c4adead84 drm/amdgpu: some clean up for cs_ioctl
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-20 17:02:09 -04:00
Chunming Zhou 4fe6311734 drm/amdgpu: prepare job should be common code path
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-20 17:01:32 -04:00
Chunming Zhou bb977d3711 drm/amdgpu: abstract amdgpu_job for scheduler
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-20 17:00:35 -04:00
Marek Olšák 6055f37afd drm/amdgpu: bump the DRM version for new allowed mem-mapped registers
Used by mesa, etc. for profiling.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-20 16:22:51 -04:00
Bas Nieuwenhuizen 05906dec7d drm/amdgpu: wait on page directory changes. v2
Pagetables can be moved and therefore the page directory update can be necessary
for the current cs even if none of the the bo's are moved. In that scenario
there is no fence between the sdma0 and gfx ring, so we add one.

v2 (chk): rebased

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:23 -04:00
Christian König 432a4ff8b7 drm/amdgpu: cleanup sheduler rq handling v2
Rework run queue implementation, especially remove the odd list handling.

v2: cleanup the code only, no algorithem change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:22 -04:00
Chunming Zhou c3b95d4f9e drm/amdgpu: move prepare work out of scheduler to cs_ioctl
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:21 -04:00
Chunming Zhou 1c8f805af9 drm/amdgpu: fix unnecessary wake up
decrease CPU extra overhead.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:20 -04:00
monk.liu 6d1d0ef743 drm/amdgpu: fix duplicated mapping invoke bug
fix the bug that there is duplicated bo_update_mapping issued

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:51:20 -04:00
monk.liu 1939e3e265 drm/amdgpu: drop bo_list_clone when no scheduler
bo_list_clone() will take a lot of time when bo_list hold too much
elements, like above 7000

Signed-off-by: Monk.Liu <monk.liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:51:19 -04:00
Alex Deucher a895c222e7 drm/amdgpu: disable GPU reset by default
It's not validated yet and causes more harm than good.
Avoids spurious resets.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:19 -04:00
monk.liu a8f5bf0b22 drm/amdgpu: fix type mismatch error
remaining timeout returned by amdgpu_fence_wait_any can be larger than
max int value, thus the truncated 32 bit value in r ends up being
negative while its original long value is positive.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:51:18 -04:00
Chunming Zhou 281b422301 drm/amdgpu: add reference for **fence
fix fence is released when pass to **fence sometimes.
add reference for it.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:17 -04:00
Christian König 1ffd265243 drm/amdgpu: fix waiting for all fences before flipping
Otherwise we might see corruption.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:17 -04:00
Christian König 4127a59e0b drm/amdgpu: fix UVD return code checking
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-and-Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-08-17 16:51:16 -04:00
Christian König 5b232c2a71 drm/amdgpu: remove scheduler fence list v2
Unused and missing proper locking.

v2: add locking comment to commit message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
2015-08-17 16:51:16 -04:00
Christian König 05caae8515 drm/amdgpu: remove amd_sched_wait_emit v2
Not used any more.

v2: remove amd_sched_emit as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:15 -04:00
Christian König 2983e5cef3 drm/amdgpu: remove unecessary scheduler fence callbacks
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:14 -04:00
Christian König db789d3451 drm/amdgpu: fix scheduler fence implementation
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:14 -04:00
Daniel Vetter 5516ab86a8 drm/amdgpu: don't grab dev->struct_mutex in pm functions
Similar to radeon, except that amdgpu doesn't even use struct_mutex to
protect anything like the shared z buffer (sane gpu architecture,
yay!). And the code already grabs the globa adev->ring_lock, so this
code can't race with itself. Which makes struct_mutex completely
redundnant. Remove it.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:13 -04:00
Daniel Vetter db4448f78d drm/amdgpu: Don't take dev->struct_mutex in bo_force_delete
It really doesn't protect anything which doesn't have other locks
already. Also this is run from driver unload code so not much need for
locks anyway.

Same changes as for radeon really.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:13 -04:00
Christian König c548b345d1 drm/amdgpu: remove VI hw bug workaround v3
The workaround simply doesn't work because VM mappings
are controlled by userspace not the kernel.

Additional to that this is just a performance problem
which happens if you have holes in your VM mapping.

v2: adjust virtual addr alignment as well.
v3: fix trivial warning

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu  <monk.liu@amd.com> (v1)
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v2)
2015-08-17 16:51:11 -04:00
Christian König 00d2a2b21d drm/amdgpu: cleanup amdgpu_fence_ring_wait_seq
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:10 -04:00
Christian König 68ed3de434 drm/amdgpu: remove duplicate amdgpu_fence_process implementation
Looks like that somehow got missed while during porting the radeon changes.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:10 -04:00
Christian König 02bc0650bc drm/amdgpu: remove amdgpu_fence_wait
It was just a wrapper for fence_wait anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:09 -04:00
Christian König 713293b825 drm/amdgpu: use the reservation obj wait for the UVD msg
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:08 -04:00
Christian König 3cdb8119d9 drm/amdgpu: remove amdgpu_fence_signaled
The common kernel function does the same thing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:51:08 -04:00
Chunming Zhou f556cb0cae drm/amd: add scheduler fence implementation (v2)
scheduler fence is based on kernel fence framework.

v2: squash in Christian's build fix

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:07 -04:00
Chunming Zhou 4af9f07ccd drm/amdgpu: use kernel submit helper in vm
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:07 -04:00
Chunming Zhou 953e8fd4e7 drm/amdgpu: use amd_sched_job in its backend ops
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:06 -04:00
Christian König 6f0e54a964 drm/amdgpu: cleanup and fix scheduler fence handling v2
v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:05 -04:00
Christian König 91404fb208 drm/amdgpu: merge amd_sched_entity and amd_context_entity v2
Avoiding a couple of casts.

v2: rename c_entity to entity as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:05 -04:00
Christian König 4cd7f42cf8 drm/amdgpu: fix coding style in a couple of places
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:04 -04:00
Christian König ddf94d33d6 drm/amdgpu: remove unused parent entity
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:03 -04:00
Chunming Zhou 4cef92670b drm/amdgpu: process sched job exactly triggered by fence signal
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:03 -04:00
Chunming Zhou 80de5913cf Revert "drm/amdgpu: return new seq_no for amd_sched_push_job"
This reverts commit d1d33da8eb86b8ca41dd9ed95738030df5267b95.

Reviewed-by: Christian K?nig <christian.koenig@amd.com>

Conflicts:
	drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
	drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
2015-08-17 16:51:02 -04:00
Christian König 47f38501f1 drm/amdgpu: cleanup amdgpu_ctx inti/fini v2
Cleanup the kernel context handling.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
2015-08-17 16:51:02 -04:00
Christian König 0e89d0c16b drm/amdgpu: stop leaking the ctx id into the scheduler v2
Id's are for the IOCTL ABI only.

v2: remove tgid as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:01 -04:00
Christian König efd4ccb59a drm/amdgpu: cleanup ctx_mgr init/fini
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:00 -04:00
Christian König 34cb581a7d drm/amdgpu: fix bo list handling in CS
We didn't initialized the mutex in the cloned bo list resulting in nice
warnings from lockdep. Also fixes error handling in this function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:51:00 -04:00
Christian König 351dba7369 drm/amdgpu: reorder the code to avoid forward declerations
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:59 -04:00
Chunming Zhou 7484667c6a drm/amdgpu: move sched job process from isr to fence callback
This way can avoid interrupt lost, and can process sched job exactly.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:59 -04:00
Jammy Zhou 27f6642d06 drm/amdgpu: add amd_sched_next_queued_seq function
This function is used to get the next queued sequence number

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:58 -04:00
Jammy Zhou 63ad8d5882 drm/amdgpu: make last_handled_seq atomic
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:57 -04:00
Jammy Zhou f95b7e3e86 drm/amdgpu: add amd_sched_commit
This function is to update last_emitted_v_seq and wake up the waiters.

It should be called by driver in the run_job backend function

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:57 -04:00
Jammy Zhou ea199cc9f8 drm/amdgpu: return new seq_no for amd_sched_push_job
It is clean to update last_queued_v_seq in the scheduler module

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:56 -04:00
Jammy Zhou dd01d07195 drm/amdgpu: some code refinement v2
Fix the code alignment, etc.

v2: rebase the code

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:56 -04:00
Chunming Zhou 03d3a3e634 drm/amdgpu: fix null pointer by previous cleanup
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:55 -04:00
Chunming Zhou 1763552ee8 drm/amdgpu: add kernel fence in ib_submit_kernel_helper
every sbumission should be able to get a fence.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:54 -04:00
Chunming Zhou ed88a0ee7f drm/amdgpu: use kernel fence for sdma ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:54 -04:00
Chunming Zhou ab3cb0ce9e drm/amdgpu: use kernel fence for gfx ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:53 -04:00
Chunming Zhou 6863bc8bb3 drm/amdgpu: use kernel fence in amdgpu_test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:53 -04:00
Chunming Zhou ed40bfb81a drm/amdgpu: use kernel fence for vce ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:52 -04:00
Chunming Zhou 0e3f154a9e drm/amdgpu: change uvd ib test to use kernel fence directly
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:51 -04:00
Chunming Zhou bb1e38a4be drm/amdgpu: use kernel fence for last_pt_update
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:51 -04:00
Chunming Zhou e40a31159b drm/amdgpu: use kernel fence diretly in amdgpu_bo_fence
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:50 -04:00
Christian König 1d7dd229f5 drm/amdgpu: clean up amd sched wait_ts and wait_signal
Remove code not used at the moment.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:50 -04:00
Christian König 7fc1195901 drm/amdgpu: stop using addr to check for BO move v3
It is theoretically possible that a swapped out BO gets the
same GTT address, but different backing pages while being swapped in.

Instead just use another VA state to note updated areas.
Ported from not upstream yet radeon commit with the same name.

v2: fix some bugs in the original implementation found in the radeon code.
v3: squash in VCE/UVD fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:49 -04:00
monk.liu 7f06c236b9 drm/amdgpu: move wait_queue_head from adev to ring (v2)
thus unnecessary wake up could be avoid between rings
v2:
move wait_queue_head to fence_drv from ring

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:48 -04:00
monk.liu e29551556e drm/amdgpu: re-implement fence_default_wait
use fence_wait_any to implement fence_default_wait

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:48 -04:00
monk.liu 332dfe907b drm/amdgpu: new implement for fence_wait_any (v2)
origninal method will sleep/schedule at the granurarity of HZ/2 and
based on seq signal method, the new implement is based on kernel fance
interface, no unnecessary schedule at all

v2: replace logic of original amdgpu_fence_wait_any

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:47 -04:00
monk.liu 2e536084f2 drm/amdgpu: use kernel fence interface when possible
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:47 -04:00
Chunming Zhou 8128765ce5 drm/amdgpu: use scheduler for VCE ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:46 -04:00
Chunming Zhou 7b5ec43177 drm/amdgpu: use scheduler for UVD ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:45 -04:00
Chunming Zhou 0011fdaa4d drm/amdgpu: use gpu scheduler for sdma ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:45 -04:00
Chunming Zhou 42d13693c0 drm/amdgpu: Use gpu scheduler for gfx ring ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:44 -04:00
Chunming Zhou 3c704e934d drm/amdgpu: add helper function for kernel submission
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:44 -04:00
Chunming Zhou d1ff9086c1 drm/amdgpu: fix seq in ctx_add_fence
if enabling scheduler, then the queued seq is assigned
when pushing job before emitting job.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:43 -04:00
Chunming Zhou 51b9db27d0 drm/amdgpu: wait forever for wait emit
the job must be emitted by scheduler, otherwise scheduler is abnormal.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:42 -04:00
Jammy Zhou 4afcb30383 drm/amdgpu: add amdgpu.sched_hw_submission option
This option can be used to specify the max number of submissions in the
active HW queue. The default value is 2 now.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:42 -04:00
Jammy Zhou 1333f723fb drm/amdgpu: add amdgpu.sched_jobs option
This option can be used to specify the max job number in the job queue,
and it is 16 by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:41 -04:00
Jammy Zhou c0044bc2c6 drm/amdgpu: silent the message for GPU scheduler creation
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:41 -04:00
Christian König 1d3897e056 drm/amdgpu: fix syncing to VM updates
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:40 -04:00
Chunming Zhou afe1008149 drm/amdgpu: add check for callback
it is possible that the callback isn't defined sometimes.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:39 -04:00
Jammy Zhou 02b9f0bfd4 drm/amdgpu: add enable_scheduler module option
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:39 -04:00
Chunming Zhou 176e1ab1b5 drm/amdgpu: protect fence_process from multiple context
fence_process may be called from kthread, user thread and interrupt context.
it is possible to called concurrently, then will wake up fence queue multiple times.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:38 -04:00
Chunming Zhou e0d8f3c34e drm/amdgpu: add sched isr to fence process
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:38 -04:00
Chunming Zhou d5fc5e82a3 drm/amdgpu: dispatch job for vm
use kernel context to submit command for vm

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:37 -04:00
Chunming Zhou 23ca0e4e47 drm/amdgpu: add kernel ctx support (v2)
v2: rebase against kfd changes

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:36 -04:00
Chunming Zhou 4274f5d45c drm/amdgpu: prepare job before push to sw queue for pte ring
user mode will still use pte ring as a normal ring.
if the prepare job generates another command(update pte) on its ring in scheduler,
then will kill scheduler which is going to waiting later job but pending running job.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:36 -04:00
Chunming Zhou 4b559c90bc drm/amdgpu: make sure the fence is emitted before ring to get it.
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:35 -04:00
Chunming Zhou b43a9a7e87 drm/amdgpu: use scheduler user seq instead of previous user seq
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:35 -04:00
Chunming Zhou 049fc527b4 drm/amdgpu: dispatch jobs in cs
BO validation is moved to scheduler except usrptr which must be validated
in user process

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:34 -04:00
Chunming Zhou 372bc1e18c drm/amdgpu: add bo list copy
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:33 -04:00
Chunming Zhou c1b69ed0c6 drm/amdgpu: add backend implementation of gpu scheduler (v2)
v2: fix rebase breakage

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:33 -04:00
Chunming Zhou 2c4888a0d3 drm/amdgpu: disable hw semaphore with scheduler
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:32 -04:00
Chunming Zhou 9cb7e5a91f drm/amdgpu: add context entity init
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:32 -04:00
Alex Deucher b80d8475c1 drm/amdgpu: add scheduler initialization
1. Add kernel parameter option, default 0
2. Add scheduler initialization for amdgpu

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:31 -04:00
Jammy Zhou a72ce6f841 drm/amd: add basic scheduling framework
run queue:
A set of entities scheduling commands for the same ring. It
implements the scheduling policy that selects the next entity to
emit commands from.

entity:
A scheduler entity is a wrapper around a job queue or a group of
other entities. This can be used to build hierarchies of entities.
For example all job queue entities belonging to the same process
may be placed in a higher level entity and scheduled against other
process entities.
Entities take turns emitting jobs from their job queue to the
corresponding hardware ring, in accordance with the scheduler policy.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:30 -04:00
David Zhang 2da78e21d1 drm/amdgpu: Enable the Fiji DID 0x7300 support
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:30 -04:00
Alex Deucher d07f5c4c23 drm/amdgpu: remove VM workaround for Fiji
The bug is fixed in fiji.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
Alex Deucher 188a9bcd6c drm/amdgpu: add support for VCE 3.x on Fiji
VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
David Zhang 974ee3db0f drm/amdgpu: Add Fiji support to the UVD 6.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:28 -04:00
David Zhang 1a5bbb6695 drm/amdgpu: Add Fiji support to the SDMA 3.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:27 -04:00
David Zhang af15a2d51d drm/amdgpu: Add Fiji support to the GFX 8.0 IP module (v2)
v2: agd5f: fix the rb setup.

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:27 -04:00
David Zhang 843908604d drm/amdgpu: Add Fiji support to the DCE 10.0 IP module (v2)
v2: agd5f: fix up XDMA golden settings

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
David Zhang 8e711e1a1a drm/amdgpu: Add Fiji support to SMC and DPM (v2)
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
David Zhang d1c4dcfb76 drm/amdgpu: Add Fiji smu 7.1.3 headers (v2)
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:25 -04:00
David Zhang aa8a3b5395 drm/amdgpu: Add Fiji support to IH module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:24 -04:00
David Zhang 127a262853 drm/amdgpu: Add Fiji support to the GMC 8.5 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:24 -04:00
David Zhang 48299f95f7 drm/amdgpu: Add Fiji DID 0x7300 common support
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:23 -04:00
Alex Deucher 41548ef78b drm/amdgpu: handle conditional support for CIK properly
gfx7 support is not necessary or available if CIK support
is not enabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:23 -04:00
monk.liu e60b344f6c drm/amdgpu: optimize amdgpu_parser_init
use kmalloc_array instead of kcalloc where appropriate and other
cleanups.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:22 -04:00
Jammy Zhou 2f7d10b393 drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)
Make the definitions common for all driver components

v2: fix kfd

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:21 -04:00
Jammy Zhou fa9f1d4e86 drm/amdgpu: add some pptable definitions
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:21 -04:00
Jammy Zhou 0b2daf09cf drm/amdgpu: add some common definitions to amd_shared.h
Add GPU family definitions and timeout value for IP components.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:20 -04:00
Marek Olšák c7890fea04 drm/amdgpu: allow userspace to read more debug registers
Feel free to suggest more.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:20 -04:00
Alex Deucher 8e9198d069 drm/amdgpu: move some atombios definitions to common folder (v2)
the definitions can be shared by different IP components.

v2: fix include path

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:19 -04:00
Christian König 5430a3ffb0 drm/amdgpu: fix UVD/VCE fence handling
We need to return the sequence number to userspace
even when we don't use user fences.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:18 -04:00
Alex Deucher 5ceb54c68a drm/amdgpu: add fence suspend/resume functions
Added to:
- handle draining the ring on suspend
- properly enable/disable interrupts on suspend and resume

Fix breakages from:
commit 467ee3be53d240d08beed2e82a941e820c1ac323
Author: Chunming Zhou <david1.zhou@amd.com>
Date:   Mon Jun 1 14:14:32 2015 +0800

    drm/amdgpu: always enable EOP interrupt v2

Tested-by: Audrey Grodzovsky <audrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:18 -04:00
Chunming Zhou c6a4079bad drm/amdgpu: always enable EOP interrupt v2
v2 (chk): always enable EOP interrupt, independent of scheduler,
	  remove now unused delayed_irq handling.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:17 -04:00
Christian König 7f8a5290f5 drm/amdgpu: rework vm_grab_id interface
This makes assigning VM IDs independent from the use of VM IDs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:16 -04:00
Christian König fc8fa5e428 drm/amdgpu: no updates shouldn't cause vm flush v2
v2 (chk): split fix from original patch

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:16 -04:00
Christian König cf6f1d3949 drm/amdgpu: fix signed overrun in amdgpu_ctx_get_fence
Otherwise the first 16 fences of a context will always signal immediately.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:15 -04:00
Christian König cdecb65b4e drm/amdgpu: fix context memory leak
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:15 -04:00
Christian König 0753b45242 drm/amdgpu: remove amdgpu_fence_recreate
It's not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:14 -04:00
Christian König 21c16bf634 drm/amdgpu: add user fence context map v2
This is a prerequisite for the GPU scheduler to make the order
of submission independent from the order of execution.

v2: properly implement the locking

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:14 -04:00
Christian König 91e1a5207e drm/amdgpu: deal with foreign fences in amdgpu_sync
This also requires some error handling from the callers of that function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:13 -04:00
Alex Deucher 0b492a4c92 drm/amdgpu: cleanup context structure v2
The comment is misleading and incorrect, remove it.

Printing the id is completely meaningless and this practice
can cause a race conditions on command submission.

The flags and hangs fields are completely unused.

Give all fields a common indentation.

v2: remove fpriv reference and unused flags as well, fix debug message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:12 -04:00
rezhu 404b2fa338 drm/amdgpu: add cgs_interface for pg and cg
v3: check whether ip_blocks is enable
v2: add break in the for loop.

Signed-off-by: Rex zhu <rezhu@amd.com>
2015-08-17 16:50:12 -04:00
Jammy Zhou 97baee7170 drm/amdgpu: fix some typo for cgs definitions
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:11 -04:00
Jammy Zhou bf3911b06f drm/amdgpu: add cgs_get_firmware_info interface v2
This new interface can be used by IP components to retrieve the
firmware information from the core driver.

v2: fix one typo

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhou@amd.com>
Signed-off-by: Young Yang <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:11 -04:00
Chunming Zhou 57ff96cf47 drm/amdgpu: implement cgs gpu memory callbacks
This implements the cgs interface for allocating
GPU memory.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:10 -04:00
Chunming Zhou 25da442779 drm/amdgpu: add atom interfaces for CGS
This implements the interface for atombios command
and data table access.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:09 -04:00
Alex Deucher 0cf3be2178 drm/amdgpu: Implement irq interfaces for CGS
This implements the irq src registrar.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:09 -04:00
Chunming Zhou 97cb7f6e6c drm/amdgpu: Implement the pciconfig callbacks for CGS
This implements the pciconfig register accessors.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:08 -04:00
Chunming Zhou aba684d87a drm/amdgpu: Implement mmio callbacks for CGS
This implements the MMIO register accessors.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:08 -04:00
Chunming Zhou d03846af92 drm/amd: Add CGS interfaces
CGS (Common Graphics Services) is an AMD cross component
abstraction layer to designed to better encapsulate
specific IP block drivers so different teams can effectively
work on differnet IP block drivers independently. It provides
a common interface for things like accessing registers,
allocating GPU memory, and registering interrupt sources.
The plan is to eventually move more and more IP drivers to
this interface.  The first user is the ACP IP driver.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:49:52 -04:00
Jammy Zhou 21df89a566 drm/amdgpu: fix one warning message
In function 'amdgpu_uvd_cs_pass2':
warning: 'min_ctx_size' may be used uninitialized in this function
  buf_sizes[0x4] = min_ctx_size;
                 ^
note: 'min_ctx_size' was declared here
  unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size;
                                                          ^
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-08-17 09:50:18 -04:00
Dave Airlie 4eebf60b74 Linux 4.2-rc7
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Merge tag 'v4.2-rc7' into drm-next

Linux 4.2-rc7

Backmerge master for i915 fixes
2015-08-17 14:13:53 +10:00
Dave Airlie 8f9cb50789 Merge tag 'drm-amdkfd-next-fixes-2015-08-05' of git://people.freedesktop.org/~gabbayo/linux into drm-next
Two small bug fixes for the code you pulled for 4.3:

- Used a SHIFT define instead of a MASK define to check if a bit is turned on
  when destroying hqd. Luckily, this is in gfx7 interface file with amdgpu,
  which was used only for bring-up purposes of amdgpu, so no real effect on
  a running system

- Used a logical AND instead of a bitwise AND operator, when initializing
  sdma virtual memory when using SDMA queues

* tag 'drm-amdkfd-next-fixes-2015-08-05' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: fix bug when initializing sdma vm
  drm/amdgpu: fix bug when amdkfd destroys hqd
2015-08-14 10:15:24 +10:00
Alex Deucher b8826b0cbf Revert "drm/amdgpu: Configure doorbell to maximum slots"
This reverts commit 78ad5cdd21.
This commit breaks dpm and suspend/resume on CZ.
2015-08-12 12:24:04 -04:00
Boyuan Zhang 8c8bac59dd drm/amdgpu: add context buffer size check for HEVC
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-12 12:24:03 -04:00
Archit Taneja 2dbaf392d2 drm/amdgpu: Use new drm_fb_helper functions
Use the newly created wrapper drm_fb_helper functions instead of calling
core fbdev functions directly. They also simplify the fb_info creation.

v3:
- Don't touch remove_conflicting_framebuffers

v2:
- Fixed PTR_ERR issue mentioned by kbuild bot

Cc: Fengguang Wu <fengguang.wu@intel.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Oded Gabbay <oded.gabbay@gmail.com>
Cc: "Christian König" <christian.koenig@amd.com>

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-08-06 14:13:06 +02:00
Jammy Zhou 595fd013f7 drm/amdgpu: set fw_version and feature_version for smu fw loading
The fw_version and feature_verion should be set correctly when the
firmwares are loaded by SMU on Tonga/Carrzio/Iceland

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 14:26:50 -04:00
Jammy Zhou cfa2104fbc drm/amdgpu: add feature version for SDMA ucode
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 14:26:50 -04:00
Jammy Zhou 351643d7dd drm/amdgpu: add feature version for RLC and MEC v2
Expose feature version to user space for RLC/MEC/MEC2 ucode as well

v2: fix coding style

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 14:26:49 -04:00
Nicolas Iooss 0fd6429103 drm/amdgpu: increment queue when iterating on this variable.
gfx_v7_0_print_status contains a for loop on variable queue which does
not update this variable between each iteration.  This is bug is
reported by clang while building allmodconfig LLVMLinux on x86_64:

    drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:5126:19: error: variable
    'queue' used in loop condition not modified in loop body
    [-Werror,-Wloop-analysis]
                for (queue = 0; queue < 8; i++) {
                                ^~~~~

Fix this by incrementing variable queue instead of i in this loop.

Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 14:26:48 -04:00
Alex Deucher a0e2f50bdb drm/amdgpu: fix rb setting for CZ
Always set num_rbs to 2 for CZ.  The 1 RB parts are often harvest
configs.  The will get sorted out in mesa when we program
PA_SC_RASTER_CONFIG[_1].

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 14:26:48 -04:00
Oded Gabbay a63c580a52 drm/amdkfd: fix bug when initializing sdma vm
A logical AND operation was used during mask and shift, instead of a
bitwise AND operation. This patch fixes this bug by changing the
operation to bitwise AND.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-30 09:26:15 +03:00
Oded Gabbay e8a64b20eb drm/amdgpu: fix bug when amdkfd destroys hqd
The wrong define was used to check if the hqd is still active

v2: Don't use SHIFT as the MASK is already shifted

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-30 09:26:00 +03:00
monk.liu 194a33643b drm/amdgpu: add new parameter to seperate map and unmap
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29 16:06:45 -04:00
monk.liu e722b71a54 drm/amdgpu: hdp_flush is not needed for inside IB
hdp flush is not needed for IBs that dispatched from kernel inside
because there is no video memory host access

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29 16:06:17 -04:00
monk.liu 93323131d6 drm/amdgpu: different emit_ib for gfx and compute
compute ring didn't use const engine byfar, so ignore CE things in
compute routine

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29 16:05:57 -04:00
Dan Carpenter c193fa91b9 drm/amdgpu: information leak in amdgpu_info_ioctl()
We recently changed the drm_amdgpu_info_device struct so now there is
a 4 byte hole at the end.  We need to initialize it so we don't disclose
secret information from the stack.

Fixes: fa92754e9c ('drm/amdgpu: add VCE harvesting instance query')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-29 15:50:37 -04:00
Alex Deucher 8faf0e08d5 drm/amdgpu: clean up init sequence for failures
If we fail during device init, record what state each
block is in so that we can tear down clearly.

Fixes various problems on device init failure.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-29 15:50:36 -04:00
Alex Deucher acc6a1a69b drm/amdgpu/cz/dpm: properly report UVD and VCE clock levels
VCE, UVD DPM work similarly to SCLK DPM.  Report the current
clock levels for UVD and VCE via debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23 15:10:32 -04:00
Alex Deucher f2d52cd4db drm/amdgpu/cz: implement voltage validation properly
CZ uses a different set of registers compared to previous asics
and supports separate NB and GFX planes.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23 15:09:27 -04:00
Leo Liu fa92754e9c drm/amdgpu: add VCE harvesting instance query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-23 11:09:45 -04:00
Alex Deucher 6a585777c8 drm/amdgpu: implement VCE 3.0 harvesting support (v4)
For boards with bad VCE blocks, only configure the working
block.

v2: use the harvest info for pipe setup
v3: fix mask check as noted by Leo
v4: add dGPU support

Reviewed-by: Christian König <christian.koenig@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23 11:09:44 -04:00