This bit is only supposed to be used with known
buggy PHYs, however some platforms might erroneously
set it. In order to avoid it, let's make sure this
bit is always cleared. If some PHY needs this, we
will need to add a quirk flag.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Instead of passing quirk_ep_out_aligned_size, we can use one extra TRB
to align transfer to wMaxPacketSize.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Allocate a coherent buffer of 1024 bytes (size of a single superspeed
bulk packet) to serve as bounce buffer for an extra TRB needed to align
transfers to wMaxPacketSize.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
DCFG.DEVSPD == 0x3 is not valid and we need to set
DCFG.DEVSPD to 0x1 for full speed mode. Same goes for
DSTS.CONNECTSPD.
Old databooks had 0x3 for full speed in 48MHz mode for
USB1.1 transceivers which was never supported. Newer databooks
don't mention 0x3 at all.
Cc: John Youn <John.Youn@synopsys.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Now that we're handling so many transfers at a time
and for some dwc3 revisions LPM events *must* be
enabled, we can fall into a situation where too many
events fire and we start receiving Overflow events.
Let's do what XHCI does and allocate a full page for
the Event Ring, this will avoid any future issues.
Cc: <stable@vger.kernel.org> # v4.9
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
The dma ops for dwc3 devices are not set properly. So, use a
physical device sysdev, which will be inherited from parent,
to set the hardware / firmware parameters like dma.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Implement interrupt moderation which allows the interrupt rate to be
throttled. To enable this feature the dwc->imod_interval must be set to
1 or greater. This value specifies the minimum inter-interrupt interval,
in 250 ns increments. A value of 0 disables interrupt moderation.
This applies for DWC_usb3 version 3.00a and higher and for DWC_usb31
version 1.20a and higher.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This extra buffer will be used so we can copy
triggered events from our event buffer to this cache
and process all of them later in bottom half
handler.
We need this in order to implement a workaround for
a known erratum in recent DWC3 release.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add a helper function to check if we are running on a DWC_usb3 core.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
The __dwc3_gadget_endpoint_enable() function has access to the endpoint
descriptors via the usb_ep. So we don't need to pass them in as
arguments. The descriptors should be set by the caller prior to calling
usb_ep_enable().
Signed-off-by: John Youn <johnyoun@synopsys.com>
[felipe.balbi@linux.intel.com : minor improvements]
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This will give us a simpler way of figuring out how
many bytes were left in each TRB. It's useful for
cases where we queue only part of an SG-list due to
amount of available TRBs at the time of kicking the
transfer.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
If XferNotReady comes before usb_ep_queue() we will
set our PENDING request flag and wait for a
request. However, originally, we were assuming
usb_ep_queue() would always happen before our first
XferNotReady and that causes a corner case where we
could try to issue ENDTRANSFER command before
STARTTRANSFER.
Let's fix that by tracking endpoints which have been
started.
Reported-by: Janusz Dziedzic <januszx.dziedzic@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Instead of just delaying for 100us, we should
actually wait for End Transfer Command Complete
interrupt before moving on. Note that this should
only be done if we're dealing with one of the core
revisions that actually require the interrupt before
moving on.
[ felipe.balbi@linux.intel.com: minor improvements ]
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
When we change the USB function with configfs dynamically, we possibly
met this situation: one core is doing the control transfer, another core
is trying to unregister the USB gadget from userspace, we must wait for
completing this control tranfer, or it will hang the controller to set
the DEVCTRLHLT flag.
[ felipe.balbi@linux.intel.com: several fixes to the patch
- call complete() before starting following SETUP transfer
- add a macro for ep0_in_setup's timeout
- change commit subject slightly
- break lines at 72 characters (git adds an 8-character tab)
- avoid changes to dwc3_gadget_run_stop() ]
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
For the usb31 IP and from version 2.90a of the usb3 IP, the core
supports HW exit from L1 in HS. Enable it, otherwise the controller may
never exit from LPM to do a transfer.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Member @mem in struct dwc3 is not used in any places. Clean up it.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
DWC3 can tell us which phase of a setup transfer
we're getting into. Let's decode it from the event
to make it easier to debug.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
The cmd argument we pass to
dwc3_send_gadget_ep_cmd() could contain extra
arguments embedded. When checking for StartTransfer
command, we need to make sure to match only lower 4
bits which contain the actual command and ignore the
rest.
Reported-by: Janusz Dziedzic <januszx.dziedzic@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This patch follows the similar fix in dwc2. See
commit 5268ed9d2e ("usb: dwc2: Fix dr_mode validation")
Currently, the dr_mode is only checked against the module configuration.
It also needs to be checked against the hardware capablities.
The driver now checks if both the module configuration and hardware are
capable of the dr_mode value. If not, then it will issue a warning and
fall back to a supported value. If it is unable to fall back to a
suitable value, then the probe will fail.
Behavior summary:
module : actual
HW config dr_mode : dr_mode
---------------------------------
host host any : host
host dev any : INVALID
host otg any : host
dev host any : INVALID
dev dev any : dev
dev otg any : dev
otg host any : host
otg dev any : dev
otg otg any : dr_mode
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
ENDXFER polling is available on version 3.10a and later of the
DWC_usb3 (USB 3.0) controller. With this feature, the software can poll
the CMDACT bit in the DEPCMD register after issuing an ENDXFER command.
This feature is enabled by writing GUCTL2[14].
This feature is NOT available on the DWC_usb31 (USB 3.1) IP.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add revision number constants for the 3.00a and 3.10a releases.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Support to configure the UTMI+ PHY with an 8- or 16-bit
interface via DT. The UTMI+ PHY interface is a hardware
capability, and it's platform dependent. Normally, the
PHYIF can be configured during coreconsultant.
But for some specific USB cores(e.g. rk3399 SoC DWC3),
the default PHYIF configuration value is false, so we
need to reconfigure it by software.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
These two fields will be used in a follow-up patch
to track how many entries of request's sglist we
have already processed. The reason is that if a
gadget driver sends an sglist with more entries then
we can fit in the ring, we will have to continue
processing remaining afterwards.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
We will be using this information to change how we
figure out when we need LST bit. For now, just
update our counters.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
GUCTL1 reg has some useful functions which can be
written by user. For rockchip platform, we set
GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK (bit26, applicable
for the core is programmed to operate in 2.0 device
only) to 1 in bootrom, and after start the kernel,
we want to check whether this bit can be reset to
default 0 after the core reset. Dump GUCTL1 reg from
debugfs is more convenient for us.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
The DWC3_USB31_REVISION_110A macro uses an invalid constant name in its
definition. This is currently not used.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This will allow us to process several endpoints at a
time by making sure that we lock only shared
resources.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
this patch implements the most basic pm_runtime
support for dwc3. Whenever USB cable is dettached,
then we will allow core to runtime_suspend.
Runtime suspending will involve completely tearing
down event buffers and require a full soft-reset of
the IP.
Note that a further optimization could be
implemented once we decide to support hibernation,
which is to allow runtime_suspend with cable
connected when bus is in U3. That's subject to a
separate patch, however.
Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
by holding gadget's IRQ number in dwc->irq_gadget,
it'll be simpler to free_irq() and disable the IRQ
in case an IRQ fires while we are runtime suspended.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
now that we have re-factored dwc3_core_init() and
dwc3_core_exit() we can use them for suspend/resume
operations.
This will help us avoid some common mistakes when
patching code when we have duplicated pieces of code
doing the same thing.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
this patch is in preparation for some further
re-factoring in dwc3 initialization. No functional
changes.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
By adding a pointer to endpoint registers' base
address, we can avoid using our controller-wide
struct dwc3 pointer for everything. At some point
this will allow us to have per-endpoint locks which
will, in turn, let us queue requests to separate
endpoints in parallel.
Because of this change our debugfs interface and io
accessors need to be changed accordingly.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
In all call sites of dwc3_send_gadget_ep_cmd() we
already had a valid dep pointer, so instead of
passing dwc and dep->number, which would be used to
fetch the same pointer we already had, just pass dep
directly.
In other words, we're changing:
struct dwc3_ep *dep = dwc[dep->number];
to just passing struct dwc3_ep *dep as argument.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Instead of using burst size to configure NUMP, we
should be using RxFIFO Size instead. DWC3 is smart
enough to know that it shouldn't burst in case burst
size is 0.
Reported-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Instead of trying hard to stay connected to the
host, it's best (and far easier) to disconnect from
the host already.
Anything relying on KEEP_CONNECT will just have that
ignored, but we don't have proper hibernation
implementation yet, so there are no regressions.
In any case, hibernation is only useful for runtime
PM, not system sleep.
While at that, also remove dwc3.dcfg which has been
rendered unnecessary.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
As of core revision 2.60a the recommended programming model is to set
the ClearPendIN bit when issuing a Clear Stall EP command for IN
endpoints. This is to prevent an issue where some (non-compliant) hosts
may not send ACK TPs for pending IN transfers due to a mishandled error
condition. Synopsys STAR 9000614252.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
In the original DWC3_DCFG_NUMP() was always zero. It looks like the
intent was to shift first and then do the mask.
Fixes: 2a58f9c12b ('usb: dwc3: gadget: disable automatic calculation of ACK TP NUMP')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Now that we calculate DCFG.NUMP, we can disable
dwc3's automatic calculation so we maximize our
chances of very high throughtput through the use of
bursts.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
NumP field of DCFG register is used on NumP field of
ACK TP header and it tells the host how many packets
an endpoint can receive before waiting for
synchronization.
Documentation says it should be set to anything
<=bMaxBurst. Interestingly, however, this setting is
not per-endpoint how it should be (different
endpoints could have different burst sizes), but
things seem to work okay right now.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
if Start Transfer command fails, let's try a little
harder to figure out why the command failed and give
slightly better return codes. This will be usefulf
or isochronous endpoints, at least, which could
decide to retry a given request.
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This helper will be used later to convert trb type
into a human-readable string for debugfs.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
this helper will be used, initially, to dump space
of different queues and fifos in dwc3 to
debugfs. Later, it'll be used to issue remote wakeup
when we want to start a transfer and there's
something in a TX FIFO.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
instead of using a bitwise and, let's rely on the %
operator since that's a lot more clear. Also, GCC
will optimize % 256 to nothing anyway.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
We *know* that we have 1 PAGE (4096 bytes) for our
TRB poll. We also know the size of each TRB and know
that we can fit 256 of them in one PAGE. By using a
u8 type we can make sure that:
enqueue++ % 256;
gets optimized to an increment only.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This makes it clear that we're dealing with a queue
of TRBs. No functional changes. While at that, also
rename start_slot to first_trb_index for similar
reasons.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Some freescale QorIQ platforms require to disable receiver detection
in P3 for correct detection of USB devices. If GUSB3PIPECTL(DISRXDETINP3)
is set, Core will change PHY power state to P2 and then perform receiver
detection. After receiver detection, Core will change PHY power state to
P3. Same quirk would be added in dts file in future patches.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Felipe Balbi